CN201623482U - UUT (Unit Under Test) protection circuit - Google Patents
UUT (Unit Under Test) protection circuit Download PDFInfo
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- CN201623482U CN201623482U CN2009202748083U CN200920274808U CN201623482U CN 201623482 U CN201623482 U CN 201623482U CN 2009202748083 U CN2009202748083 U CN 2009202748083U CN 200920274808 U CN200920274808 U CN 200920274808U CN 201623482 U CN201623482 U CN 201623482U
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Abstract
A UUT (Unit Under Test) protection circuit mainly comprises a hot plug protection circuit, an ID number identification circuit and a control logic circuit, wherein the hot plug protection circuit and the ID number identification circuit are electrically connected through the control logic circuit; and the UUT protection circuit can shield off most influence of abnormal situation on a UUT, thereby achieving the purpose of completely protecting a UUT module and ATE (Automatic Test Equipment).
Description
Technical field
The utility model relates to a kind of UUT protective circuit, is used in automatic test equipment (ATE, the AutomaticTest Equipment) course of work circuit to the protection of tested module (UUT, Unit Under Test) and automatic test equipment ATE.
Background technology
In design during Auto-Test System, be design focal point to the automatic Test Strategy of UUT, and the protection of UUT is not caused enough attention usually.Most of Auto-Test Systems are not protected UUT in the course of the work or only are to do some simple overcurrents, overvoltage protection design on circuit; (above-mentioned abnormal conditions frequency of occurrences when the operation A TE is higher to abnormal conditions such as surge currents (charged plug causes), power supply mistake (module wrong plug cause power supply to insert bus etc. cause); cause the possibility of UUT damage also higher) there is no effective solution, so be poor efficiency and unilateral to the protection of UUT at present.
When circuit board was tested automatically, aspect reason such as, Test Strategy error inconsiderate owing to operating personnel's error, hardware designs caused the degree of impairment of UUT to happen occasionally.In practice, preceding two aspect reasons have caused most damages.At present common situation is, when operating personnel make a fault or other situation when causing that UUT is connected unusually with ATE, UUT almost is unshielded.
The utility model content
The purpose of this utility model provides a kind of UUT protective circuit, masking the influence of most unusual conditions to UUT in real time with hardware, thereby reaches the purpose of protecting UUT and ATE fully.
Technical solution of the present utility model is: a kind of UUT protective circuit, and its special character is: comprise hot plug protective circuit, ID identification circuit and control logic circuit; Wherein hot plug protective circuit and ID identification circuit are electrically connected by control logic circuit.
Above-mentioned control logic circuit comprises and door, d type flip flop, counter and first not gate, second not gate and the 3rd not gate; Described input with door is connected with the ID identification circuit, and an input termination in the described input is to be connected with the ID identification circuit by first not gate; Describedly link to each other with the data input pin D pin of d type flip flop with the output of door; The input end of clock C pin input clock pulse signals of described d type flip flop, described clock pulse signal is through the counting input end A of second not gate as the counting clock enter counter simultaneously; The output Q of described d type flip flop links to each other with the zero clearing input CLR of counter; The output CT of described counter inserts the GATE pin of hot-swapping controller by the 3rd not gate.Make ID identification circuit and hot plug protective circuit by control logic on function in conjunction with as a whole.
Above-mentioned ID identification circuit comprises the resistance of the input that is connected in out-put supply Vsys of ATE system and control logic circuit, has realized automatic anti-error installation, can guarantee the secure match between UUT and the ATE.
Above-mentioned resistance is one or more, and the number of described resistance is corresponding with the number of tested module UUT; When UUT has only when a kind of, resistance is one, and this resistance is to be serially connected with between the input of ATE system out-put supply and control logic circuit; When UUT has when multiple, resistance is a plurality of, and described resistance is to be connected between the pairing input of ATE out-put supply and control logic circuit and its.
Above-mentioned hot plug control circuit is that the hot-swapping controller with models such as ADM4210, ADM1170, ADM1171, ADM1172, LTC4218, TPS2300 or UCC2919 is that core constitutes, and can realize the safe hot plug between UUT and ATE.
The beneficial effects of the utility model are: the related UUT protective circuit of the utility model be hot plug protective circuit and ID identification circuit by control logic circuit in conjunction with as a whole; mask of the influence of most unusual conditions to UUT; especially can avoid the unusual damage that connects UUT of powering state; improve the fail safe of UUT in automatic testing process greatly, simultaneously ATE has been played protective effect.Simultaneously, the utility model design is succinct, and reliability is better, and the realization cost of whole UUT protective circuit is lower, and excellent economy is arranged.
Description of drawings
Fig. 1: model is the hot plug protective circuit schematic diagram of ADM4210;
Fig. 2: model is the hot plug protective circuit schematic diagram of LTC4218;
Fig. 3: ID identification circuit schematic diagram;
Be for Fig. 4 A:ID number the control logic circuit schematic diagrams of 110 hot-swapping controllers when being ADM4210;
Be for Fig. 4 B:ID number the control logic circuit schematic diagrams of 101 hot-swapping controllers when being ADM4210;
Be for Fig. 4 C:ID number the control logic circuit schematic diagram of 011 hot-swapping controller when being ADM4210.
Embodiment
A kind of UUT protective circuit that the utility model is related, this circuit comprises hot plug protective circuit, ID identification circuit, control logic circuit; Wherein hot plug protective circuit and ID identification circuit are electrically connected by control logic circuit.
See Fig. 1, described hot plug protective circuit comprises that model is hot-swapping controller, the first divider resistance R1, the second divider resistance R2, inductive reactance R3, first resistance R 4, second resistance R 5, timing capacitor C 1, filter capacitor C2, capacitor C 3, load filter capacitor C4 and the N channel power field effect transistor N-MOSFET of ADM4210; The power supply input Vcc pin connected system out-put supply Vsys of this hot-swapping controller; This hot-swapping controller enable and the input ON pin that resets by the first divider resistance R1 ground connection, and connect Vsys by the second divider resistance R2; And the ON pin is connected with filter capacitor C2 earth terminal by resistance R 1, and the ON pin connects the Vsys end by resistance R 2 with filter capacitor C2 and is connected, and constitutes the RC filter circuit; The timing setting input TIMER pin of this hot-swapping controller is by timing capacitor C 1 ground connection; The GND pin ground connection of this hot-swapping controller; The load current induction SENSE pin of this hot-swapping controller is connected with the drain D end of power MOSFET, UUT power supply VCC is connected with the source S end of power MOSFET, and the SENSE pin is connected with the power supply input Vcc pin of this hot-swapping controller by inductive reactance R3; The grid gate output GATE pin of this hot-swapping controller is connected with the grid G end of N channel power field effect transistor N-MOSFET by first resistance R 4, and second resistance R 5 and capacitor C 3 ground connection by being connected in series; UUT power supply VCC is by load filter capacitor C4 ground connection.
See Fig. 2, described hot plug protective circuit comprises that model is hot-swapping controller, first resistance R 1, the first divider resistance R2, the second divider resistance R3, the 3rd divider resistance R4, inductive reactance R5, second resistance R 6, the 3rd resistance R 7, the 4th resistance R 8, the 5th resistance R 9, the 6th resistance R 10, timing capacitor C 1, capacitor C 2, load filter capacitor C3, decoupling capacitor C4 and the N channel power field effect transistor N-MOSFET of LTC4218; The model of hot-swapping controller is LTC4218, operating voltage 2.9～26.5V; The power supply input VDD pin connected system out-put supply Vsys of this hot-swapping controller; The power supply of this hot-swapping controller well indicates input PG pin to connect Vsys by first resistance R 1; The under-voltage UV pin of relatively importing of this hot-swapping controller directly is connected with overcurrent indication FLT pin, and connects Vsys by the first divider resistance R2; The overvoltage of this hot-swapping controller is relatively imported the OV pin by the 3rd divider resistance R4 ground connection; The second divider resistance R3 is connected between R2 and the R4; The timing setting input TIMER pin of this hot-swapping controller is by timing capacitor C 1 ground connection; The builtin voltage output INTVCC pin of this hot-swapping controller is by decoupling capacitor C4 ground connection; The GND pin ground connection of this hot-swapping controller; The induction by current anode SENSE+ pin of this hot-swapping controller is connected with Vsys, and the induction by current negative terminal SENSE-pin of this hot-swapping controller is connected with the drain D end of power MOSFET, and inductive reactance R5 is series between SENSE+ and the SENSE-; UUT power supply VCC is connected with the source S end of power MOSFET; The source S link SOURCE pin of this hot-swapping controller is connected with the source S end of power MOSFET; The grid gate output GATE pin of this hot-swapping controller is connected with the grid G end of N channel power field effect transistor N-MOSFET by the 3rd resistance R 7, and the 4th resistance R 8 and capacitor C 2 ground connection by being connected in series; The current monitor output IMON pin of this hot-swapping controller is by second resistance R, 6 ground connection; The electric current of this hot-swapping controller is turned back and is well relatively imported the FB pin with power supply and be connected UUT power supply VCC by the 5th resistance R 9, and by the 6th resistance R 10 ground connection; UUT power supply VCC is by load filter capacitor C3 ground connection.
The model of hot-swapping controller is not limited only to ADM4210 (operating voltage 2.7～16.5V) and LTC4218 (operating voltage 2.9～26.5V); can also be ADM1170 (operating voltage 1.6～16.5V), ADM1171 (operating voltage 2.7～16.5V), ADM1172 (operating voltage 2.7～16.5V), TPS2300 (operating voltage 3～13V) or UCC2919 (hot-swapping controller of models such as operating voltage 3～8V), also can realize UUT+3.3V/+5V hot plug protective circuit.Isolate and the management multiple voltage as need, can adopt the mode that every kind of voltage controls respectively or select hot-swapping controller for use with multivoltage management function.The concrete connected mode of hot plug control circuit can be adjusted according to its needs, can also be with comprising that the circuit that discrete element such as counter, comparator constitutes replaces hot-swapping controller.
Usually when charged circuit board when the base plate of working is extracted, the discharge of shunt capacitance will produce bigger transient current by the low impedance path that may form at this moment on the circuit board on the circuit board, this bigger transient current is called surge.It makes the base plate power supply instantaneous falling occur, thereby causes the operating state mistake, and even more serious meeting causes the parts or the components from being damaged such as metal connecting line of connector, circuit element, circuit board.By an external N channel power field effect transistor (N-MOSFET) and other peripheral cell, cooperate certain control strategy can eliminate surge current, realize the safe hot plug between UUT and ATE.Described peripheral cell is exactly resistance, electric capacity, counter or a comparator etc. required in the circuit.Owing to adopt the discrete component forming circuit that shortcomings such as reliability is low, maintenance cost height are arranged; adopt hot-swapping controller to realize then having that volume is little, in light weight, circuit structure simple, have higher fail safe, reliability and lower advantages such as whole cost, therefore suggestion selects for use hot-swapping controller outer meeting resistance, condenser network to realize the hot plug protective circuit of this UUT protective device.
See Fig. 3, the ID identification circuit is to realize with the circuit that identifies different UUT by using the pull-up resistor circuit that discrete magnitude information is set.Comprise and be connected on the ATE out-put supply Vsys and the pull-up resistor of control logic circuit input.The number of described pull-up resistor is corresponding with the number of tested module UUT, and it also can be a plurality of that this resistance can be one, and resistance is one when a kind of when UUT has only, and is the input that is serially connected with power supply Vsys and control logic circuit; Resistance is a plurality of when multiple when UUT has, and is to be connected to power supply Vsys and its pairing input of control logic circuit.When test, UUT is with after ATE correctly is connected, in a plurality of resistance with pairing that resistance of current tested module be ground connection.
Usually, if UUT wrong plug groove position when test will cause UUT and ATE and adapter (TUA, Test Unit Adapter) power supply circuits not match, might cause damage to UUT and ATE.This circuit solution is discrete amount identification signal on adapter and UUT, promptly ID number.ID number corresponding one by one with every kind of UUT.Be respectively 110,101,011 discrete magnitude ID number as tested module UUTa, b, c.(tested module is a) by can linking to each other (in like manner ID1, ID2 with also link to each other with a ground pin on tested module b, the c respectively after ATE correctly is connected) with a ground pin on the tested module a after adapter and the correct physical connection of ATE at UUT for ID0, like this when module a correctly inserts, that the discrete magnitude state of ID0, ID1, ID2 is respectively is low, high, high (be ID number be 110), but the discrete magnitude identifying information of generation module a correspondence thus.In the ATE running; control logic can be judged this discrete magnitude identifying information in real time; when the discrete magnitude identifying information reads when wrong; control logic can be cut off the UUT power supply; the state of the Gate signal that test macro also can provide according to control logic changes exception handles over to; thereby prevent that automatically UUT/TUA from falsely dropping, UUT is played a protective role.
Described control logic circuit comprises and door, d type flip flop, counter and first not gate, second not gate and the 3rd not gate; Described input with door is connected with the ID identification circuit, an input in the described input (this input UUT with understand after ATE correctly is connected with UUT on a ground pin continuous) be to be connected with the ID identification circuit by first not gate; Describedly link to each other with the data input pin D pin of d type flip flop with the output of door; The input end of clock C pin input clock pulse signals of described d type flip flop, described clock pulse signal is through the counting input end A of second not gate as the counting clock enter counter simultaneously; The output Q of described d type flip flop links to each other with the zero clearing input CLR of counter; The output CT of described counter inserts the GATE pin of hot-swapping controller by the 3rd not gate.
See Fig. 4 A, when tested module a tested, ID number when supposing correct the connection was 110, and then the position of first not gate is determined thereupon.After module a and the correct physical connection of ATE, ID0 can link to each other with a ground pin on the module a, and ID0 is drop-down to be low level, and this moment, ID1, ID2 still were high level by drawing on the Vsys.The ID discrete magnitude information of correspondence is 110 during so correct connect.After the ID0 negate with ID1, ID2 by linking to each other with Men Yuyi d type flip flop, the output of d type flip flop links to each other with the zero clearing input of one 42 system counters, clock pulse signal PCLK (the control logic special use of control logic, can be provided with according to actual needs) both as the input of the clock of d type flip flop, oppositely after again as the counting clock input of 42 system counters.When being 110 ID number, the high level of d type flip flop data input D is delivered to the Q output on the just edge of clock, the signal that forms a similar clock is constantly with 42 system counter O resets, this hour counter is disregarded number, the state of Gate signal is by hot-swapping controller decision (on off operating mode of Gate signal controlling N channel power field effect transistor N-MOSFET, N-MOSFET control UUT power supply VCC); When being not 110 ID number, the low level of d type flip flop data input D is delivered to the Q output on the just edge of clock, the signal that forms can not be with 4 the 2 timely zero clearings of system counter, 42 system counters begin counting, behind the meter full 3 times (can be provided with according to actual needs) the Gate signal drawn and be low level, N channel power field effect transistor N-MOSFET disconnects, and cuts off UUT power supply VCC, and promptly this moment, hot-swapping controller was inoperative.Hot-swapping controller is monitored the UUT electric current in real time by external inductive reactance, when UUT electric current, voltage just often, the state of Gate signal is determined by the ID marker circuit.When hot-swapping controller detects current/voltage burr, surge, short circuit, overvoltage/under-voltage etc. when unusual, the ID marker circuit is inoperative, and hot-swapping controller is directly according to the state of self hardware logic decision Gate signal.Abnormal conditions are in case occur, hot-swapping controller enters the current-limit mode power supply immediately, if (time delay is determined by timing capacitor in current limliting time-delay expiration, can be provided with according to actual needs) do not eliminate yet unusually, then the Gate signal is drawn and be low level, disconnect N-MOSFET, cut off UUT power supply Vcc, this moment, the ID marker circuit was inoperative.The model of hot-swapping controller can be selected according to actual needs.Vsys is system's out-put supply (promptly being integrated in the output that programmable power supply provided among the ATE) among the figure, VCC is the UUT power supply, PCLK is the clock pulse signal of control logic, and PRESET is the control logic reset signal, and Gate is the gate-control signal of control N-MOSFET break-make.
See Fig. 4 B, during tested module b test, after module b and the correct physical connection of ATE, ID1 can link to each other with a ground pin on the module b, and ID1 is drop-down to be low level, and this moment, ID0, ID2 still were high level by drawing on the Vsys.The ID discrete magnitude information of correspondence is 101 during so correct connect.After the ID1 negate with ID0, ID2 by linking to each other with d type flip flop with door, the remaining circuit workflow is identical with module a test.
See Fig. 4 C, during tested module c test, after module c and the correct physical connection of ATE, ID2 can link to each other with a ground pin on the module c, and ID2 is drop-down to be low level, and this moment, ID0, ID1 still were high level by drawing on the Vsys.The ID discrete magnitude information of correspondence is 011 during so correct connect.After the ID2 negate with ID0, ID1 by linking to each other with d type flip flop with door, the remaining circuit workflow is identical with module a, module b test.
A kind of UUT protective circuit that the utility model is related; by the secure match that the hot plug protective circuit has realized UUT and ATE is set; by being set, tested module ID identification circuit realized automatic anti-error installation; both by control logic on function in conjunction with as a whole; cooperate and realize that UUT connects defencive function; make UUT only just can be in electriferous state when correct in normal connection of electrical characteristics with circuit; thereby realized shielding in real time the function of unusual condition infringement by hardware; improve the fail safe of UUT in automatic testing process greatly, simultaneously ATE has been played protective effect.
Claims (6)
1. a UUT protective circuit comprises the hot plug protective circuit, it is characterized in that: also comprise control logic circuit and ID identification circuit; Wherein hot plug protective circuit and ID identification circuit are electrically connected by control logic circuit.
2. UUT protective circuit according to claim 1 is characterized in that: described control logic circuit comprises and door, d type flip flop, counter and first not gate, second not gate and the 3rd not gate; Described input with door is connected with the ID identification circuit, and an input termination in the described input is to be connected with the ID identification circuit by first not gate; Describedly link to each other with the data input pin D pin of d type flip flop with the output of door; The input end of clock C pin input clock pulse signals of described d type flip flop, described clock pulse signal is through the counting input end A of second not gate as the counting clock enter counter simultaneously; The output Q of described d type flip flop links to each other with the zero clearing input CLR of counter; The output CT of described counter inserts the GATE pin of hot-swapping controller by the 3rd not gate.
3. UUT protective circuit according to claim 1 and 2 is characterized in that: described ID identification circuit is made of the one or more resistance between the input that is connected in ATE out-put supply Vsys and control logic circuit.
4. UUT protective circuit according to claim 3 is characterized in that: described resistance is one; This resistance string is coupled between ATE out-put supply Vsys and the control logic circuit.
5. UUT protective circuit according to claim 4 is characterized in that: described resistance is a plurality of; Described resistance is between the input that is connected in ATE out-put supply Vsys and the described control logic circuit correspondingly.
6. according to claim 4 or 5 described UUT protective circuits, it is characterized in that: described hot plug protective circuit is to be that the hot-swapping controller of ADM4210, ADM1170, LTC4218, TPS2300 or UCC2919 is that core constitutes with the model.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202748083U CN201623482U (en) | 2009-12-28 | 2009-12-28 | UUT (Unit Under Test) protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202748083U CN201623482U (en) | 2009-12-28 | 2009-12-28 | UUT (Unit Under Test) protection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN201623482U true CN201623482U (en) | 2010-11-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009202748083U Expired - Lifetime CN201623482U (en) | 2009-12-28 | 2009-12-28 | UUT (Unit Under Test) protection circuit |
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| CN (1) | CN201623482U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107546725A (en) * | 2017-08-11 | 2018-01-05 | 上海空间电源研究所 | A kind of spacecraft discharge circuit overvoltage protective system |
-
2009
- 2009-12-28 CN CN2009202748083U patent/CN201623482U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107546725A (en) * | 2017-08-11 | 2018-01-05 | 上海空间电源研究所 | A kind of spacecraft discharge circuit overvoltage protective system |
| CN107546725B (en) * | 2017-08-11 | 2019-04-12 | 上海空间电源研究所 | A kind of spacecraft discharge circuit overvoltage protective system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20101103 Effective date of abandoning: 20091228 |