CN201601665U - Phase-locked difference frequency output frequency synthesizer - Google Patents
Phase-locked difference frequency output frequency synthesizer Download PDFInfo
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- CN201601665U CN201601665U CN2009202517360U CN200920251736U CN201601665U CN 201601665 U CN201601665 U CN 201601665U CN 2009202517360 U CN2009202517360 U CN 2009202517360U CN 200920251736 U CN200920251736 U CN 200920251736U CN 201601665 U CN201601665 U CN 201601665U
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Abstract
The utility model relates to a phase-locked difference frequency output frequency synthesizer. The circuit connection of the synthesizer includes that a reference oscillating source 1 generates high-stability frequency signals to an integrated phase-locked loop PLL1; a closed-loop circuit is formed by the phase-locked loop PLL1, a loop filter, a dual-modulus prescalar and a voltage-controlled oscillator 1; radio-frequency signals outputted by the voltage-controlled oscillator 1 are connected with a 3dB power divider 1; one route of the 3dB power divider 1 is simultaneously used for a loop and frequency division monitoring; the other route of the 3dB power divider 1 is connected to a power divider 2; an output route of the power divider 2 is outputted after being amplified and isolated; the other route of the power divider 2 is inputted to carrier frequency generated by a frequency mixer and a closed-loop circuit 2 for frequency discrimination; a reference oscillating source 2 is connected with an integrated phase-locked loop PLL2; a closed-loop circuit 2 is formed by the phase-locked loop PLL2, a loop filter and a voltage-controlled oscillator 2; radio-frequency signals outputted by the voltage-controlled oscillator 2 are connected with a 3dB power divider 3; one route of the 3dB power divider 3 is used for a loop; the other route of the 3dB power divider 3 is inputted to a power divider 4; and two branches of the power divider 4 are used for amplifying and isolating output and detecting output by frequency division. The phase-locked difference frequency output frequency synthesizer has the advantages of convenient use, stability, reliability, perfect interfaces and capability of checking completeness of the synthesizer only through computer measurement.
Description
Technical field
The utility model relates to a kind of exciter, particularly a kind of phase-locked difference frequency output frequency synthesizer that is used for metric wave instrument landing ground installation.
Background technology
Phase-locked difference frequency output frequency synthesizer is carrier frequency (navigation channel, the clearance) signal that metric wave instrument landing ground installation (ILS) provides two-way variable simultaneously, should have characteristics such as frequency difference is fixed, phase locking, frequency stability is good, phase noise is low, also should possess corresponding supervision, measurement and data transmission interface.At present, known product design mainly is divided into two classes, and a class is to adopt crystal oscillator frequency multiplication mode to produce required frequency, and shortcoming is that the phase stability of two-way carrier frequency output is poor, and is big with the change of external conditions amount, and can not change required frequency arbitrarily; An other class is that loop frequency division multiple is excessive, causes spuious component to be difficult to suppress, and the monitoring interface imperfection.
Summary of the invention
For overcoming the deficiency that prior art exists, the utility model provides a kind of employing phase-locked loop fractional frequency division technology, and the two-way output frequency is stable, the effect of phase locking thereby reach, and functional interface is carried out perfect phase-locked difference frequency output frequency synthesizer.
The utility model for achieving the above object, the technical scheme of being taked is: a kind of phase-locked difference frequency output frequency synthesizer, it is characterized in that: export the two-way frequency-splitting simultaneously and fix, and the carrier frequency of phase locking, circuit connecting relation is: reference oscillation source 1 produces the frequency signal of high stability to integrated phase lock PLL1, phase-locked loop pll 1, loop filter, dual-modulus prescaler, voltage controlled oscillator 1 is formed closed loop circuit 1, the radiofrequency signal of voltage controlled oscillator 1 output links to each other with 3dB power splitter 1, wherein one the road is used for loop and frequency division monitoring simultaneously, other one the road is connected to power splitter 2, power splitter 2 outputs one tunnel are through amplifying, isolate back output, the carrier frequency that other one road input mixer and closed loop circuit 2 produce is carried out frequency discrimination; Reference oscillation source 2 links to each other with integrated phase lock PLL2, phase-locked loop pll 2, loop filter, voltage controlled oscillator 2 are formed closed loop circuit 2, the radiofrequency signal of voltage controlled oscillator 2 outputs links to each other with 3dB power splitter 3, wherein one the tunnel is used for loop, other one the tunnel inputs to power splitter 4,4 two branch roads of power splitter are respectively applied for amplification, isolate output and frequency division detects output, and phase-locked loop pll 1, PLL2 are controlled by external signal, carry out frequency translation.
Characteristics of the present utility model are: two-way outgoing carrier frequency, phase locking, spuious inhibition well (65dB), the frequency stability height, little (about 20cm * the 10cm * 2cm) of volume, can be loaded in the 6u standard subrack, can in working band, change radio frequency channel arbitrarily by computer control, easy to use, reliable and stable, interface is perfect, only can check its integrity by computer measurement.
Description of drawings
Fig. 1 is a circuit side connector block diagram of the present utility model and as Figure of abstract.
Embodiment
In conjunction with Fig. 1, the utility model is further set forth.In this example, the reference source of loop 1 is selected the compensation crystal oscillator of 20MHz for use, its phase noise can reach-110dBc@100Hz, phase-locked loop adopts the ADF family chip of AD company, have fractional frequency division and phase discrimination function concurrently, loop filter adopts the two-stage active power filtering, to reduce to export spuious influence, voltage controlled oscillator is selected Z-COM company corresponding product for use, the phase demodulation frequency of loop 1 is 50kHz, output frequency can be selected conversion between 100MHz-120MHz, channel spacing is 50kHz, and whole loop is in a kind of dynamic equilibrium state, and phase-locked loop pll carries out the frequency division phase demodulation to the frequency signal from reference source and voltage controlled oscillator, produce phase demodulation voltage, the control voltage controlled oscillator produces required frequency f
0Loop 2 is identical with loop 1 principle, just its phase demodulation frequency is 10kHz, this phase demodulation frequency is produced by output filtering behind frequency mixer of voltage controlled oscillator 1 and voltage controlled oscillator 2, the frequency and the phase relation of loop 1 and loop 2 have been introduced in this design simultaneously, the phase place that has guaranteed the output of two-way carrier wave locks mutually, and frequency mixer is selected HITTITE company corresponding product for use, and the intermodulation performance is good, loop 2 output frequencies are corresponding with loop 1, are f
0-10kHz.
Because two-way output frequency difference is less, be easy to generate mutual crosstalk phenomenon, in order to eliminate this phenomenon to greatest extent, in circuit and structural design, take measures simultaneously, from block diagram as can be seen, carrier wave 1,2 carry out frequency discrimination at the frequency mixer place, can produce interference because of revealing mutually, for effectively addressing this problem, use high-isolation frequency mixer (isolating 40dB between local oscillator and the radio frequency) in the circuit, use a plurality of power splitters and amplifier etc. simultaneously, frequency mixer L0 port see to the isolation of carrier wave 1 be frequency mixer, amplifier, power splitter sum (40dB+20dB+25dB=75dB), in like manner hold isolation to carrier wave 2 greater than 75dB from RF, structurally two loops place respectively in the independent metallic cavity simultaneously, signal connects with radio frequency cable between the two, also should consider the earth point of each integrated package of pressure-stabilizing in the design, carry out the filtering and the decoupling of power supply simultaneously, the power supply of as far as possible eliminating 50Hz is relevant spuious, and this is to improving spuious inhibition, phase noise index and erase amplifier self-excitation etc. all are beneficial to.
Claims (1)
1. phase-locked difference frequency output frequency synthesizer, it is characterized in that: export the two-way frequency-splitting simultaneously and fix, and the carrier frequency of phase locking, circuit is connected to: reference oscillation source 1 produces the frequency signal of high stability to integrated phase lock PLL1, phase-locked loop pll 1, loop filter, dual-modulus prescaler, voltage controlled oscillator 1 is formed closed loop circuit 1, the radiofrequency signal of voltage controlled oscillator 1 output links to each other with 3dB power splitter 1, wherein one the road is used for loop and frequency division monitoring simultaneously, other one the road is connected to power splitter 2, power splitter 2 outputs one tunnel are through amplifying, isolate back output, the carrier frequency that other one road input mixer and closed loop circuit 2 produce is carried out frequency discrimination; Reference oscillation source 2 links to each other with integrated phase lock PLL2, phase-locked loop pll 2, loop filter, voltage controlled oscillator 2 are formed closed loop circuit 2, the radiofrequency signal of voltage controlled oscillator 2 outputs links to each other with 3dB power splitter 3, wherein one the tunnel is used for loop, other one the tunnel inputs to power splitter 4,4 two branch roads of power splitter are respectively applied for amplification, isolate output and frequency division detects output, and phase-locked loop pll 1, PLL2 are controlled by external signal, carry out frequency translation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202517360U CN201601665U (en) | 2009-12-16 | 2009-12-16 | Phase-locked difference frequency output frequency synthesizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202517360U CN201601665U (en) | 2009-12-16 | 2009-12-16 | Phase-locked difference frequency output frequency synthesizer |
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| Publication Number | Publication Date |
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| CN201601665U true CN201601665U (en) | 2010-10-06 |
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| CN2009202517360U Expired - Lifetime CN201601665U (en) | 2009-12-16 | 2009-12-16 | Phase-locked difference frequency output frequency synthesizer |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103427836A (en) * | 2013-07-25 | 2013-12-04 | 京东方科技集团股份有限公司 | Frequency signal generation system and display device |
| CN103684446A (en) * | 2013-12-16 | 2014-03-26 | 天津七六四通信导航技术有限公司 | Frequency synthesizer for distance measuring equipment |
| CN103714375A (en) * | 2013-09-26 | 2014-04-09 | 斯凯瑞利（北京）科技有限公司 | Active tag and radio frequency front-end chip thereof |
| CN104579339A (en) * | 2014-12-08 | 2015-04-29 | 西安电子工程研究所 | Low spurious signal source generating method and device for improving frequency stability |
| CN104868928A (en) * | 2014-02-24 | 2015-08-26 | 沈阳中科奥维科技股份有限公司 | Frequency selection device and method based on WIA-PA protocols |
| CN109510622A (en) * | 2018-12-25 | 2019-03-22 | 成都前锋电子仪器有限责任公司 | A kind of reference circuit system for radio frequency synthetic source |
-
2009
- 2009-12-16 CN CN2009202517360U patent/CN201601665U/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103427836A (en) * | 2013-07-25 | 2013-12-04 | 京东方科技集团股份有限公司 | Frequency signal generation system and display device |
| WO2015010432A1 (en) * | 2013-07-25 | 2015-01-29 | 京东方科技集团股份有限公司 | Frequency signal generation system and display apparatus |
| US9425810B2 (en) | 2013-07-25 | 2016-08-23 | Boe Technology Group Co., Ltd. | Frequency signal generating system and display device |
| CN103714375A (en) * | 2013-09-26 | 2014-04-09 | 斯凯瑞利（北京）科技有限公司 | Active tag and radio frequency front-end chip thereof |
| CN103684446A (en) * | 2013-12-16 | 2014-03-26 | 天津七六四通信导航技术有限公司 | Frequency synthesizer for distance measuring equipment |
| CN103684446B (en) * | 2013-12-16 | 2016-06-08 | 天津七六四通信导航技术有限公司 | A kind of stadimeter frequency synthesizer |
| CN104868928A (en) * | 2014-02-24 | 2015-08-26 | 沈阳中科奥维科技股份有限公司 | Frequency selection device and method based on WIA-PA protocols |
| CN104868928B (en) * | 2014-02-24 | 2018-01-02 | 沈阳中科奥维科技股份有限公司 | A kind of frequency selective device and method based on WIA PA agreements |
| CN104579339A (en) * | 2014-12-08 | 2015-04-29 | 西安电子工程研究所 | Low spurious signal source generating method and device for improving frequency stability |
| CN109510622A (en) * | 2018-12-25 | 2019-03-22 | 成都前锋电子仪器有限责任公司 | A kind of reference circuit system for radio frequency synthetic source |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20101006 |
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| CX01 | Expiry of patent term |