CN201571017U - Dislocation locking prevention mixing circuit of mixing phase-locked loop - Google Patents
Dislocation locking prevention mixing circuit of mixing phase-locked loop Download PDFInfo
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- CN201571017U CN201571017U CN2009202436541U CN200920243654U CN201571017U CN 201571017 U CN201571017 U CN 201571017U CN 2009202436541 U CN2009202436541 U CN 2009202436541U CN 200920243654 U CN200920243654 U CN 200920243654U CN 201571017 U CN201571017 U CN 201571017U
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Abstract
The utility model relates to a dislocation locking prevention mixing circuit of a mixing phase-locked loop, which mainly comprises an image rejection mixer. The image rejection mixer comprises a microwave 90-degree power divider, a medium-frequency 90-degree power divider, a microwave 0-degree power divider, a first mixer and a second mixer, wherein the 0-degree power divider and the 90-degree power divider are respectively connected with the first mixer and the second mixer, and the first mixer and the second mixer are also respectively connected with the medium-frequency 90-degree power divider. The dislocation locking prevention mixing circuit not only reduces the production debugging difficulty of a mixing phase-locked type frequency comprehensive device, enhances the stability of the mixing phase-locked type frequency comprehensive device but also further improves the phase noise of the mixing phase-locked type frequency comprehensive device.
Description
Technical field
The utility model relates to a kind of mixing phase-locked loop error lock prevention mixting circuit, specifically, relate in a kind of frequency synthesizer of the electronic system that is widely used in each microwave band, particularly the mixing phase lock circuitry that has image-reject mixer in military affairs such as radar, missile guidance, communication and the civil area.
Background technology
At present, the mixing phase-locked loop is most widely used frequency synthesis mode.In order to improve the stability of phase-locked loop, present employing be the method that adopts accurate preset voltage.Because the frequency of voltage controlled oscillator is bigger with the working temperature drift, the shortcoming that this method commonly used exists: preset voltage can not guarantee high frequency accuracy in full operating temperature range, when initial predetermined frequency exceeded the pullin banwidth of phase-locked loop, wrong lock or out-of-lock condition can appear in loop; When initial predetermined frequency was near the image frequency of frequency mixer, wrong lock or out-of-lock condition can appear in loop; When the IF-FRE of frequency discrimination phase demodulation was lower than the frequency temperature excursion of voltage controlled oscillator, loop was difficult to reach stable state.
The utility model content
Technical problem to be solved in the utility model provides a kind of mixting circuit that prevents wrong lock for the mixing phase-locked loop, it has not only reduced the production debugging difficulty of mixing phase-locking type frequency synthesizer, strengthen the stability of this type frequency synthesizer, and improved the phase noise of this type frequency synthesizer.
The utility model solves the problems of the technologies described above the technical scheme that is adopted: a kind of mixing phase-locked loop error lock prevention mixting circuit, it is characterized in that, mainly form by image-reject mixer, described image-reject mixer comprises microwave 90 degree power splitters, intermediate frequency 90 degree power splitters, microwave 0 degree power splitter and first frequency mixer, second frequency mixer, described 0 degree power splitter and microwave 90 degree power splitters link to each other with first frequency mixer and second frequency mixer respectively, and described first frequency mixer and second frequency mixer also link to each other with intermediate frequency 90 degree power splitters respectively.
In order better to realize the utility model, this error lock prevention mixting circuit also comprises first power splitter, crystal oscillator frequency divider, frequency discrimination phase demodulation, loop low pass, amplifier, voltage controlled oscillator, second power splitter and first amplifier, described first power splitter, crystal oscillator frequency divider, frequency discrimination phase demodulation, loop low pass, amplifier, voltage controlled oscillator, second power splitter and first amplifier link to each other successively, and described first amplifier is spent power splitter with the microwave 0 in the image-reject mixer and linked to each other; Also input has preset voltage on described amplifier.
Further, this error lock prevention mixting circuit also includes low pass filter, the 3rd amplifier and loop divider, described low pass filter, the 3rd amplifier and loop divider link to each other successively, and described low pass filter is spent power splitters with the intermediate frequency 90 in the described image-reject mixer and is linked to each other, described loop divider is connected with described frequency discrimination phase demodulation, forms a loop.
Simultaneously, this error lock prevention mixting circuit also includes frequency marking and produces, described frequency marking produces respectively with microwave 90 degree power splitters in described first power splitter and the image-reject mixer and links to each other, and the signal of microwave frequency is down-converted to IF-FRE, finishes the inhibition to image frequency simultaneously.
This error lock prevention mixting circuit also includes second amplifier, and coupled filter, and described second amplifier links to each other with second power splitter; Described crystal oscillator is imported by first power splitter.
To sum up, the beneficial effects of the utility model are:
(1) the wrong lock state of the image frequency of having avoided the mixing phase-locked loop to take place has improved the stability of loop.
(2) loop frequency-dividing ratio of mixing phase-locked loop is reduced, improved the phase noise of mixing phase-locking type frequency synthesizer.
Description of drawings
Fig. 1 is a structural representation block diagram of the present utility model.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the utility model is described in further detail, but execution mode of the present utility model is not limited thereto.
Embodiment
As shown in Figure 1, a kind of mixing phase-locked loop error lock prevention mixting circuit, mainly form by image-reject mixer, described image-reject mixer comprises microwave 90 degree power splitters, intermediate frequency 90 degree power splitters, microwave 0 degree power splitter and first frequency mixer, second frequency mixer, described 0 degree power splitter and microwave 90 degree power splitters link to each other with first frequency mixer and second frequency mixer respectively, and described first frequency mixer and second frequency mixer also link to each other with intermediate frequency 90 degree power splitters respectively; This error lock prevention mixting circuit also comprises first power splitter, crystal oscillator frequency divider, frequency discrimination phase demodulation, loop low pass, amplifier, voltage controlled oscillator, second power splitter and first amplifier, described first power splitter, crystal oscillator frequency divider, frequency discrimination phase demodulation, loop low pass, amplifier, voltage controlled oscillator, second power splitter and first amplifier link to each other successively, and described first amplifier is spent power splitter with the microwave 0 in the image-reject mixer and linked to each other; Also input has preset voltage on described amplifier.
This error lock prevention mixting circuit also includes low pass filter, the 3rd amplifier and loop divider, described low pass filter, the 3rd amplifier and loop divider link to each other successively, and described low pass filter is spent power splitters with the intermediate frequency 90 in the described image-reject mixer and is linked to each other, described loop divider is connected with described frequency discrimination phase demodulation, forms a loop.
Simultaneously, this error lock prevention mixting circuit also includes frequency marking and produces, described frequency marking produces respectively with microwave 90 degree power splitters in described first power splitter and the image-reject mixer and links to each other, and the signal of microwave frequency is down-converted to IF-FRE, finishes the inhibition to image frequency simultaneously.
Further, this error lock prevention mixting circuit also includes second amplifier, and coupled filter, and described second amplifier links to each other with second power splitter; Described crystal oscillator is imported by first power splitter.
The utility model discloses a kind of mixing phase-locked loop error lock prevention mixing scheme, adopt image-reject mixer as mixting circuit, replace voltage controlled oscillator in the past to solve the wrong phenomenon of locking of image frequency, reduced the signal frequency of mixing output, reduce the number of times of loop frequency division, improved the phase noise index.The utility model not only has flexible design, produces the characteristics easily of debugging, can also improve simultaneously the stability of mixing phase-locked loop well, improve the phase noise of mixing phase-locked loop well, be mainly used in the frequency synthesizer of electronic system of each microwave radio wave band, particularly military affairs and civil electronic systems such as radar, missile guidance, communication.
As mentioned above, just can realize the utility model preferably.
Claims (7)
1. mixing phase-locked loop error lock prevention mixting circuit, it is characterized in that, mainly form by image-reject mixer, described image-reject mixer comprises microwave 90 degree power splitters, intermediate frequency 90 degree power splitters, microwave 0 degree power splitter and first frequency mixer, second frequency mixer, described 0 degree power splitter and microwave 90 degree power splitters link to each other with first frequency mixer and second frequency mixer respectively, and described first frequency mixer and second frequency mixer also link to each other with intermediate frequency 90 degree power splitters respectively.
2. a kind of mixing phase-locked loop error lock prevention mixting circuit according to claim 1, it is characterized in that, also comprise first power splitter, crystal oscillator frequency divider, frequency discrimination phase demodulation, loop low pass, amplifier, voltage controlled oscillator, second power splitter and first amplifier, described first power splitter, crystal oscillator frequency divider, frequency discrimination phase demodulation, loop low pass, amplifier, voltage controlled oscillator, second power splitter and first amplifier link to each other successively, and described first amplifier is spent power splitter with the microwave 0 in the image-reject mixer and linked to each other.
3. a kind of mixing phase-locked loop error lock prevention mixting circuit according to claim 2 is characterized in that, also input has preset voltage on described amplifier.
4. a kind of mixing phase-locked loop error lock prevention mixting circuit according to claim 3, it is characterized in that, also include low pass filter, the 3rd amplifier and loop divider, described low pass filter, the 3rd amplifier and loop divider link to each other successively, and described low pass filter is spent power splitters with the intermediate frequency 90 in the described image-reject mixer and is linked to each other, described loop divider is connected with described frequency discrimination phase demodulation, forms a loop.
5. a kind of mixing phase-locked loop error lock prevention mixting circuit according to claim 4 is characterized in that, also includes frequency marking and produces, and described frequency marking produces respectively with microwave 90 degree power splitters in described first power splitter and the image-reject mixer and links to each other.
6. a kind of mixing phase-locked loop error lock prevention mixting circuit according to claim 5 is characterized in that, also includes second amplifier, and coupled filter, and described second amplifier links to each other with second power splitter.
7. a kind of mixing phase-locked loop error lock prevention mixting circuit according to claim 6 is characterized in that described crystal oscillator is imported by first power splitter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202436541U CN201571017U (en) | 2009-12-02 | 2009-12-02 | Dislocation locking prevention mixing circuit of mixing phase-locked loop |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202436541U CN201571017U (en) | 2009-12-02 | 2009-12-02 | Dislocation locking prevention mixing circuit of mixing phase-locked loop |
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| Publication Number | Publication Date |
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| CN201571017U true CN201571017U (en) | 2010-09-01 |
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| CN2009202436541U Expired - Fee Related CN201571017U (en) | 2009-12-02 | 2009-12-02 | Dislocation locking prevention mixing circuit of mixing phase-locked loop |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104682955A (en) * | 2015-03-02 | 2015-06-03 | 成都宝通天宇电子科技有限公司 | Frequency-mixed phase-locking high phase-noise broadband microwave source |
| CN106899293A (en) * | 2017-03-13 | 2017-06-27 | 广州海格通信集团股份有限公司 | Frequency synthesizer |
| CN111525923A (en) * | 2020-04-01 | 2020-08-11 | 北京无线电计量测试研究所 | Circuit and method for solving problem of lock losing and lock mistake of broadband frequency mixing phase-locked loop |
| CN115842549A (en) * | 2023-02-15 | 2023-03-24 | 成都天锐星通科技有限公司 | Frequency synthesizer |
| CN117411478A (en) * | 2023-12-12 | 2024-01-16 | 成都世源频控技术股份有限公司 | Low-phase-noise mixing phase-locked circuit with error-locking prevention function |
-
2009
- 2009-12-02 CN CN2009202436541U patent/CN201571017U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104682955A (en) * | 2015-03-02 | 2015-06-03 | 成都宝通天宇电子科技有限公司 | Frequency-mixed phase-locking high phase-noise broadband microwave source |
| CN106899293A (en) * | 2017-03-13 | 2017-06-27 | 广州海格通信集团股份有限公司 | Frequency synthesizer |
| CN111525923A (en) * | 2020-04-01 | 2020-08-11 | 北京无线电计量测试研究所 | Circuit and method for solving problem of lock losing and lock mistake of broadband frequency mixing phase-locked loop |
| CN111525923B (en) * | 2020-04-01 | 2022-05-27 | 北京无线电计量测试研究所 | Circuit and method for solving problem of lock losing and lock mistake of broadband frequency mixing phase-locked loop |
| CN115842549A (en) * | 2023-02-15 | 2023-03-24 | 成都天锐星通科技有限公司 | Frequency synthesizer |
| CN115842549B (en) * | 2023-02-15 | 2023-05-09 | 成都天锐星通科技有限公司 | Frequency synthesizer |
| CN117411478A (en) * | 2023-12-12 | 2024-01-16 | 成都世源频控技术股份有限公司 | Low-phase-noise mixing phase-locked circuit with error-locking prevention function |
| CN117411478B (en) * | 2023-12-12 | 2024-04-23 | 成都世源频控技术股份有限公司 | Low-phase-noise mixing phase-locked circuit with error-locking prevention function |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100901 Termination date: 20131202 |