CN201536253U - USB overcurrent detection and control circuit - Google Patents
USB overcurrent detection and control circuit Download PDFInfo
- Publication number
- CN201536253U CN201536253U CN2009202049036U CN200920204903U CN201536253U CN 201536253 U CN201536253 U CN 201536253U CN 2009202049036 U CN2009202049036 U CN 2009202049036U CN 200920204903 U CN200920204903 U CN 200920204903U CN 201536253 U CN201536253 U CN 201536253U
- Authority
- CN
- China
- Prior art keywords
- resistor
- usb
- module
- operational amplifier
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 25
- 238000005070 sampling Methods 0.000 claims abstract description 19
- 239000003990 capacitor Substances 0.000 claims description 6
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 101000941170 Homo sapiens U6 snRNA phosphodiesterase 1 Proteins 0.000 description 1
- 102100031314 U6 snRNA phosphodiesterase 1 Human genes 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Images
Landscapes
- Power Sources (AREA)
Abstract
The utility model discloses a USB overcurrent detection and control circuit, which comprises a sampling module, an amplifying module, a comparing module, and a CPU, wherein the sampling module samples current signals in a plurality of USB main circuits and converts the current signals to voltage signals; the amplifying module amplifies the voltage signals; the comparing module compares the voltage signals and generates level signals to indicating the real-time current states; the CPU receives the level signals, and then selectively controls switch control modules on a plurality of USB branch circuits after detecting that the current exceeds the set value; and the sampling module, the amplifying module, and the comparing module are connected in series sequentially, and the comparing module is further connected with the CPU. The utility model can selectively process all the USB power supply circuits, and realizes the overcurrent detection and control, so as to ensure the normal work of the product.
Description
Technical Field
The utility model relates to an electronic technology especially relates to USB's detection and protection technique.
Background
There are a number of devices on the market today, such as the following, that are of the USB over-current detection and protection class.
1. Overcurrent protection, namely cutting off a power supply once the outgoing line has an overcurrent condition, and recovering after the overcurrent condition disappears;
2. detecting the overcurrent, wherein the detection pin sends an overcurrent signal after the overcurrent condition occurs, and the overcurrent condition is not processed;
3. the overcurrent detection and protection are adopted, once an overcurrent condition occurs, the power supply is cut off, meanwhile, the detection pin sends an overcurrent signal, and the overcurrent condition is recovered after disappearing;
for example, a chinese patent with patent publication No. CN201149942 published by the chinese patent office has publication No. 2008.11.12, and discloses a USB switching device with an overcurrent protection function and a selectable operating current range, that is, the USB switching device is provided with a plurality of self-recovery fuses, which can facilitate a user to select a current range, and automatically complete overcurrent protection on a USB device through the characteristics of the self-recovery fuses. The technical scheme is as follows: the USB interface module comprises a first USB interface module and a second USB interface module which are connected with each other, wherein the first USB interface is used for being connected with USB equipment, the second USB interface is used for being connected with an upstream USB interface, and a current limiting and selecting module which is used for limiting the current and selecting the working current range is further arranged, the current limiting and selecting module is connected in series on a Vbus signal line or a GND signal line between the first USB interface module and the second USB interface module, and a D + signal line and a D-signal line of the first USB interface module are respectively connected with a D + signal line and a D-signal line of the second USB interface module.
However, some existing electronic devices, such as home multimedia devices, office devices, and the like, are equipped with one or more USB interfaces, and electronic devices described in the prior art are all configured to perform switching-off processing on an overcurrent branch without selection after an overcurrent condition occurs.
Therefore, with the popularization and development of the USB technology, when the electronic device has a situation that the current of the single-path USB power supply circuit is normal and the overall current exceeds the requirement, how to selectively process each USB power supply circuit to enable the product to work normally becomes a problem to be solved urgently.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a USB overflows detection and control circuit, it is normal to appear one way USB supply circuit electric current when electronic equipment, and whole electric current surpasss the condition of requirement, can selectively handle each USB supply circuit, realizes overflowing detection and control, makes the product normally work.
In order to solve the technical problem, the utility model discloses a USB overflows detection and control circuit, wherein, include:
the sampling module is used for sampling current signals in the USB trunk circuits and converting the current signals into voltage signals;
an amplifying module for amplifying the voltage signal;
a comparison module that compares the voltage signals; and
the CPU is used for receiving the voltage signal compared by the comparison module to generate a level signal representing the real-time current state, and selectively controlling the switch control modules on the plurality of USB branches after detecting that the current exceeds a set value; wherein,
the sampling module, the amplifying module and the comparing module are sequentially connected in series, and the comparing module is further connected with the CPU.
Preferably, the sampling module further comprises a first resistor and a second resistor which are connected in parallel, wherein one end of the circuit after being connected in parallel is connected with the 5V power supply network and the amplifying module, and the other end of the circuit after being connected in parallel is connected with two or more paths of USB load networks and the amplifying module.
Preferably, the amplifying module further comprises: the power supply circuit comprises a first operational amplifier, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor, wherein the negative electrode input end of the first operational amplifier is connected with a load network through the third resistor and forms a feedback circuit with the output of the fifth resistor, and the positive electrode input end of the first operational amplifier is connected with a power supply network through the fourth resistor and is grounded through the sixth resistor.
Preferably, the comparing module further comprises: the voltage regulator comprises a second operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor and a voltage regulator tube, wherein the positive input end of the second operational amplifier is connected with the output of the first operational amplifier through the seventh resistor, the negative input end of the second operational amplifier is connected with reference voltage through the eighth resistor, the output end of the second operational amplifier is connected with a general input/output interface GPIO _ IN of the CPU through the ninth resistor, and the voltage regulator tube is connected between the ninth resistor and the general input/output interface GPIO _ IN of the CPU.
Preferably, the switch control module further comprises: an NPN tube, a tenth resistor, an eleventh resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a capacitor and a P-channel MOS tube Q9, wherein one end of the seventeenth resistor is connected with a general input/output interface GPIO _ IN of the CPU, the other end of the seventeenth resistor is connected with a base electrode of the NPN tube, and two ends of the eighteenth resistor are respectively connected with the base electrode and an emitter electrode of the NPN tube
A collector of the NPN transistor is connected to one end of the tenth resistor and one end of the sixteenth resistor, the other end of the sixteenth resistor is connected to the gate of the P-channel MOS transistor Q9 through the eleventh resistor, the other end of the sixteenth resistor also passes through the nineteenth resistor, and the capacitor is connected to the source of the P-channel MOS transistor Q9;
the other end of the tenth resistor and the source of the P-channel MOS transistor Q9 are both connected to the load network, and the drain of the P-channel MOS transistor Q9 is connected to the external USB device PORT USB _ PORT 1.
Compared with the prior art, the utility model discloses following beneficial effect has:
the utility model discloses a USB overflows detection and control circuit utilizes on-off control module, detects out the electric current after the setting value alright with the switch on the branch road of the different USB of selective control when CPU to realize operating condition trunk circuit current detection, the function of the selective shutoff of branch road power supply. Therefore, when the electronic equipment has the condition that the current of the single-path USB power supply circuit is normal and the whole current exceeds the requirement, each USB power supply circuit can be selectively processed, overcurrent detection and control are realized, and the product can normally work.
Drawings
FIG. 1 is a schematic structural diagram of a USB overcurrent detection and control circuit according to a preferred embodiment of the present invention;
fig. 2 is a schematic diagram of a circuit structure of a switch control module in the USB overcurrent detection and control circuit according to a preferred embodiment of the present invention.
Detailed Description
The utility model discloses a USB overflows detection and control circuit, it is normal to appear single-channel USB supply circuit electric current when electronic equipment, and whole electric current surpasss the condition of requirement, can selectively handle each USB supply circuit, makes the product normally work.
As shown in fig. 1, a schematic structural diagram of a USB overcurrent detection and control circuit according to a preferred embodiment of the present invention is shown. The USB over-current detection and control circuit may include: the device comprises a sampling module 11, an amplifying module 12 and a comparing module 13, wherein the sampling module 11, the amplifying module 12 and the comparing module 13 are connected in sequence.
Wherein, the sampling module 11 further comprises two parallel first resistors R1 and second resistors R2. The amplification module 12 may further include: a first operational amplifier U1-A and four resistors: a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6. The comparing module 13 further comprises: a second operational amplifier U1-B, three resistors: a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a voltage regulator tube Z1. The circuit connection relationship may be as shown in the figures and described below.
As shown in fig. 1, one end of the circuit formed by connecting the first resistor R1 and the second resistor R2 in parallel is connected to the 5V power supply network and the amplification module 12, and the other end is connected to two or more USB load networks and the amplification module 12. The sampling module 11 samples current signals in a plurality of USB trunk circuits, and converts the current signals into voltage signals by using resistors therein, the sampling module 11 outputs the voltage signals to the amplifying module 12, the voltage signals are amplified by the amplifying module 12 and then output to the comparing module 13 for comparison, the comparing module 13 outputs a level signal to a CPU (not shown) after comparing the voltage signals to represent a real-time current state, and when the CPU detects that the current exceeds a set value, the CPU can selectively control a switch control module on a USB1 or USB2 branch circuit, thereby realizing the function of selectively turning off the current supplied by the branch circuit in a working state.
The specific operation can be illustrated in detail by fig. 1 and 2, as follows.
The sampling module 11 is used for converting a current signal on a power supply network into a voltage signal, and the structure and the operation process thereof can be as follows.
The 5V is a two-way or multi-way USB power supply network, the USB _ LOAD1 and the USB _ LOAD2 are LOAD networks, and the first resistor R1 and the second resistor R2 are sampling resistors. When no LOAD is connected to the USB _ LOAD1, no current flows through the 5V network, and there is no voltage drop across the first resistor R1 and the second resistor R2, that is, 5V-USB _ LOAD1 is 0V.
When the USB _ LOAD1 or the USB _ LOAD2 network is connected with a LOAD (i.e., a USB device is connected), a current I flows through the 5V network, and a voltage drop occurs across the first resistor R1 and the second resistor R2, i.e., I is generated across the 5V-USB _ LOAD1 (R1// R2).
The voltage signal output by the sampling module 11 is amplified by the amplifying module 12, compared with the reference voltage by the comparing module 13, and then the comparison result is output to the general input/output interface GPIO _ IN, which may be described as follows.
In the amplifying module 12, the negative input terminal of the first operational amplifier U1-a is connected to the load network through the third resistor R3 and forms a feedback circuit with the output pin 1 of the first operational amplifier U1-a through the fifth resistor R5, and the positive input terminal of the first operational amplifier U1-a is connected to the supply network through the fourth resistor R4 and is grounded through the sixth resistor R6.
IN the comparison module 13, the positive input end of the second operational amplifier U1-B is connected with the output end of the first operational amplifier U1-a through the seventh resistor R7, the negative input end of the second operational amplifier U1-B is connected with a reference voltage through the eighth resistor R8, the output end of the second operational amplifier U1-B is connected with a general input/output interface GPIO _ IN of the CPU through a ninth resistor R9, and the regulator tube Z1 is connected between the ninth resistor R9 and the general input/output interface GPIO _ IN of the CPU.
In the amplifying module 12, the third resistor R3 and the fifth resistor R5 have the same resistance, the fourth resistor R4 and the sixth resistor R6 have the same resistance, and the amplification factor of the first operational amplifier U1-a can be adjusted by adjusting the resistances of the four resistors. When the USB _ LOAD1 and the USB _ LOAD2 networks are connected without LOAD, and 5V-USB _ LOAD1 is 0V, the differential input voltages of the first operational amplifier U1-a are equal to each other, the difference is 0V, and after the difference is amplified, the output of the pin 1 of the first operational amplifier U1-a is 0V. VREF is a reference voltage (taking a positive value), a signal output by the pin 1 of the first operational amplifier U1-A is transmitted to the second operational amplifier U1-B, the second operational amplifier U1-B is compared by the reference voltage VREF and then output to the general input/output interface GPIO _ IN of the CPU, and at the moment, the voltage of the pin 1 of the U4-A is smaller than VREF, and the general input/output interface GPIO _ IN of the CPU is at a low level.
When the USB _ LOAD1 and the USB _ LOAD2 networks have LOADs connected, the LOAD current is I, and the differential input voltage of the first operational amplifier U1-A is: the 5V-USB _ LOAD1 is I (R1// R2), the voltage difference is amplified by the first operational amplifier U1-a and then output through the pin 1, the pin 1 of the first operational amplifier U1-a outputs a voltage signal to the second operational amplifier U1-B, and the second operational amplifier U1-B compares the voltage signal with the reference voltage VREF and outputs the voltage signal to the general input/output interface GPIO _ IN of the CPU. When the load current I exceeds a set value, the output voltage of the pin 1 of the first operational amplifier U1-A is larger than the reference voltage VREF, at the moment, the general input/output interface GPIO _ IN of the CPU outputs high level, and the voltage regulator tube Z1 can control the output voltage of the general input/output interface GPIO _ IN of the CPU so as to prevent the GPIO from being burnt out due to overhigh output voltage.
A system GPIO (general purpose input output interface) controls a switch control module according to a detected value of a general purpose input output interface GPIO _ IN of the CPU, thereby implementing flexible control of two USB devices, wherein a schematic diagram of a circuit structure of the switch control module is shown IN fig. 2, and a working process of the switch control module may be as follows.
The switch control module may include: an NPN transistor Q10, a tenth resistor R10, an eleventh resistor R11, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a capacitor C78 and a P-channel MOS transistor Q9.
One end of the seventeenth resistor R17 is connected to the GPIO1 of the CPU, and the other end is connected to the base B of the NPN transistor Q10, and a signal detected by the GPIO _ IN is input from the base B, output from the collector C, and grounded at the emitter E. The base electrode B and the emitter electrode E of the NPN tube Q10 are respectively connected with two ends of the eighteenth resistor R18.
A collector C of the NPN transistor Q10 is connected to one end of the tenth resistor R10 and one end of the sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected to the gate (i.e., the G-pole) of the P-channel MOS transistor Q9 through the eleventh resistor R11, and the other end of the sixteenth resistor R16 is also connected to the source (i.e., the S-pole) of the P-channel MOS transistor Q9 through the nineteenth resistor R19 and the capacitor C78.
The other end of the tenth resistor R10 is connected to the USB _ LOAD1, the sources (i.e., the S-poles) of the P-channel MOS transistors Q9 are all connected to the USB _ LOAD1, and the drains (i.e., the D-poles) of the P-channel MOS transistors Q9 are connected to the USB _ PORT 1.
The operation of the switch control module may be as follows.
When the general input/output interface GPIO _ IN of the CPU detects a high level, the GPIO1 can be controlled to output a high level, the NPN transistor Q10 is IN a conducting state at this time, the gate (i.e., G-pole) of the P-channel MOS transistor Q9 is pulled low and also IN a conducting state, the USB _ LOAD1 voltage is sent to the USB _ PORT1 through the P-channel MOS transistor Q9, and the USB _ PORT1 is a USB device interface power supply network.
When the general input/output interface GPIO _ IN of the CPU detects a high level, which indicates that the USB external load has exceeded a set value, and it is determined that the USB external load is IN an overcurrent state, at this time, the system controls the GPIO1 to output a low level, the NPN transistor Q10 is IN an off state, the gate (i.e., G pole) of the P-channel MOS transistor Q9 is pulled up to a high level by the R10, the P-channel MOS transistor Q9 turns off the USB _ PORT1 when the power supply is cut off, and the USB device stops operating. Until the system detects that the general purpose input output interface GPIO _ IN of the CPU becomes low level again, the system controls the GOIO1 to resume power supply to the USB device.
Two or more switch control modules can be shared IN a system of the electronic equipment and are simultaneously controlled by two or more GPIOs, so that when the general input/output interface GPIO _ IN of the CPU detects an overcurrent signal, one or more paths of power supplies of the USB equipment can be controlled randomly, thereby realizing the effects of total detection and respective turn-off.
To sum up, the utility model discloses a USB overflows detection and control circuit utilizes on-off control module, detects out the electric current after the setting value alright with the switch on the branch road of the different USB of selective control to realize operating condition main line current detection, the function of the selective shutoff of branch road power supply. Therefore, when the electronic equipment has the condition that the current of the single-path USB power supply circuit is normal and the whole current exceeds the requirement, each USB power supply circuit can be selectively processed, overcurrent detection and control are realized, and the product can normally work.
Claims (5)
1. A USB over-current detection and control circuit, comprising:
the sampling module is used for sampling current signals in the USB trunk circuits and converting the current signals into voltage signals;
an amplifying module for amplifying the voltage signal;
a comparison module that compares the voltage signals; and
the CPU is used for receiving the voltage signal compared by the comparison module to generate a level signal representing the real-time current state, and selectively controlling the switch control modules on the plurality of USB branches after detecting that the current exceeds a set value; wherein,
the sampling module, the amplifying module and the comparing module are sequentially connected in series, and the comparing module is further connected with the CPU.
2. The circuit of claim 1, wherein the sampling module further comprises two parallel-connected first and second resistors, wherein one end of the parallel-connected circuit is connected to a 5V power supply network and the amplifying module, and the other end of the parallel-connected circuit is connected to two or more USB load networks and the amplifying module.
3. The circuit of claim 2, wherein the amplification module further comprises: the power supply circuit comprises a first operational amplifier, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor, wherein the negative electrode input end of the first operational amplifier is connected with a load network through the third resistor and forms a feedback circuit with the output of the fifth resistor, and the positive electrode input end of the first operational amplifier is connected with a power supply network through the fourth resistor and is grounded through the sixth resistor.
4. The circuit of claim 3, wherein the comparison module further comprises: the voltage regulator comprises a second operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor and a voltage regulator tube, wherein the positive input end of the second operational amplifier is connected with the output of the first operational amplifier through the seventh resistor, the negative input end of the second operational amplifier is connected with reference voltage through the eighth resistor, the output end of the second operational amplifier is connected with a general input/output interface GPIO _ IN of the CPU through the ninth resistor, and the voltage regulator tube is connected between the ninth resistor and the general input/output interface GPIO _ IN of the CPU.
5. The circuit of claim 1, wherein the switch control module further comprises: an NPN tube, a tenth resistor, an eleventh resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a capacitor and a P-channel MOS tube Q9, wherein one end of the seventeenth resistor is connected with a general input/output interface GPIO _ IN of the CPU, the other end of the seventeenth resistor is connected with a base electrode of the NPN tube, and two ends of the eighteenth resistor are respectively connected with the base electrode and an emitter electrode of the NPN tube;
a collector of the NPN transistor is connected to one end of the tenth resistor and one end of the sixteenth resistor, the other end of the sixteenth resistor is connected to the gate of the P-channel MOS transistor Q9 through the eleventh resistor, the other end of the sixteenth resistor also passes through the nineteenth resistor, and the capacitor is connected to the source of the P-channel MOS transistor Q9;
the other end of the tenth resistor and the source of the P-channel MOS transistor Q9 are both connected to the load network, and the drain of the P-channel MOS transistor Q9 is connected to the external USB device PORT USB _ PORT 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202049036U CN201536253U (en) | 2009-09-18 | 2009-09-18 | USB overcurrent detection and control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202049036U CN201536253U (en) | 2009-09-18 | 2009-09-18 | USB overcurrent detection and control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201536253U true CN201536253U (en) | 2010-07-28 |
Family
ID=42536027
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009202049036U Expired - Fee Related CN201536253U (en) | 2009-09-18 | 2009-09-18 | USB overcurrent detection and control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201536253U (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102591832A (en) * | 2011-01-12 | 2012-07-18 | 深圳艾科创新微电子有限公司 | Current limiting circuit and method of universal serial bus |
| CN102780512A (en) * | 2012-06-20 | 2012-11-14 | 光一科技股份有限公司 | Protective circuit for preventing radio station from uninterrupted transmission |
| CN102938554A (en) * | 2011-08-15 | 2013-02-20 | 上海普锐马电子有限公司 | High-power adjustable clamping circuit for automobile jammer |
| CN102938797A (en) * | 2012-11-05 | 2013-02-20 | Tcl通讯（宁波）有限公司 | Current detection and control device for mobile terminal |
| WO2016115703A1 (en) * | 2015-01-22 | 2016-07-28 | 华为技术有限公司 | Current-limiting protection circuit and electronic device |
| CN107546724A (en) * | 2017-07-17 | 2018-01-05 | 北方电子研究院安徽有限公司 | A kind of input overcurrent protective device |
| CN109417283A (en) * | 2016-05-16 | 2019-03-01 | 赛普拉斯半导体公司 | The adjustable over-current detector circuit of universal serial bus (USB) equipment |
| CN110494759A (en) * | 2017-05-18 | 2019-11-22 | 赛普拉斯半导体公司 | Current sense in USB power control analog subsystem |
| CN112165082A (en) * | 2020-09-21 | 2021-01-01 | 苏州浩创信息科技有限公司 | Interface protection circuit and wearable intelligent device applying same |
-
2009
- 2009-09-18 CN CN2009202049036U patent/CN201536253U/en not_active Expired - Fee Related
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102591832A (en) * | 2011-01-12 | 2012-07-18 | 深圳艾科创新微电子有限公司 | Current limiting circuit and method of universal serial bus |
| CN102591832B (en) * | 2011-01-12 | 2016-08-03 | 深圳艾科创新微电子有限公司 | A kind of USB (universal serial bus) current-limiting circuit |
| CN102938554A (en) * | 2011-08-15 | 2013-02-20 | 上海普锐马电子有限公司 | High-power adjustable clamping circuit for automobile jammer |
| CN102780512A (en) * | 2012-06-20 | 2012-11-14 | 光一科技股份有限公司 | Protective circuit for preventing radio station from uninterrupted transmission |
| CN102938797A (en) * | 2012-11-05 | 2013-02-20 | Tcl通讯（宁波）有限公司 | Current detection and control device for mobile terminal |
| CN102938797B (en) * | 2012-11-05 | 2015-09-23 | Tcl通讯（宁波）有限公司 | A kind of current detection controller of mobile terminal |
| WO2016115703A1 (en) * | 2015-01-22 | 2016-07-28 | 华为技术有限公司 | Current-limiting protection circuit and electronic device |
| US10411464B2 (en) | 2015-01-22 | 2019-09-10 | Huawei Technologies Co., Ltd. | Current-limiting protection circuit and electronic device |
| CN109417283A (en) * | 2016-05-16 | 2019-03-01 | 赛普拉斯半导体公司 | The adjustable over-current detector circuit of universal serial bus (USB) equipment |
| CN109417283B (en) * | 2016-05-16 | 2020-06-12 | 赛普拉斯半导体公司 | Adjustable overcurrent detector circuit for Universal Serial Bus (USB) device |
| CN111650423A (en) * | 2016-05-16 | 2020-09-11 | 赛普拉斯半导体公司 | Adjustable overcurrent detector circuit for Universal Serial Bus (USB) device |
| US10847964B2 (en) | 2016-05-16 | 2020-11-24 | Cypress Semiconductor Corporation | Adjustable over-current detector circuit for universal serial bus (USB) devices |
| CN111650423B (en) * | 2016-05-16 | 2022-06-03 | 赛普拉斯半导体公司 | Adjustable overcurrent detector circuit for Universal Serial Bus (USB) device |
| CN110494759A (en) * | 2017-05-18 | 2019-11-22 | 赛普拉斯半导体公司 | Current sense in USB power control analog subsystem |
| CN107546724A (en) * | 2017-07-17 | 2018-01-05 | 北方电子研究院安徽有限公司 | A kind of input overcurrent protective device |
| CN112165082A (en) * | 2020-09-21 | 2021-01-01 | 苏州浩创信息科技有限公司 | Interface protection circuit and wearable intelligent device applying same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN201536253U (en) | USB overcurrent detection and control circuit | |
| CN103575964B (en) | A kind of over-current detection circuit of power switch pipe and method | |
| CN101562443B (en) | Overvoltage protection circuit and liquid crystal display device drive circuit | |
| US20130021701A1 (en) | Overvoltage and overcurrent protection circuit | |
| CN202586343U (en) | Parallel power-source power unit | |
| CN102609065A (en) | Over-current protection device | |
| CN204241537U (en) | A kind of current collection circuit | |
| CN101931255A (en) | Charging management circuit | |
| CN206481043U (en) | One kind carries multiple-channel output single channel short circuit over-current protection circuit | |
| CN103743934A (en) | High-precision high-side current detection circuit | |
| CN102830254A (en) | USB (Universal serial bus) interface testing load circuit | |
| CN202978247U (en) | Overcurrent protection circuit | |
| CN207977724U (en) | A kind of fire-fighting two lines bus short-circuit protection circuit of hand-held encoder | |
| CN207398813U (en) | Overcurrent protection circuit and electronic equipment | |
| CN202331254U (en) | Current-voltage conversion circuit with over-current protection circuit module | |
| CN206850666U (en) | A kind of doubleway output current foldback circuit | |
| CN216160725U (en) | Current sampling circuit and battery | |
| US20150028935A1 (en) | Circuit breaker and method of controlling a power transistor with a circuit breaker | |
| CN112821729A (en) | H-bridge circuit and neuromuscular electrical stimulation device | |
| CN108345343A (en) | A kind of bidirectional current detection circuit | |
| CN104656724A (en) | Electronic device | |
| CN203660518U (en) | Overcurrent protection circuit of insulated gate bipolar transistor | |
| CN220382790U (en) | Intelligent charging control circuit and electronic equipment | |
| CN204992558U (en) | PROFIBUSPA bus instrumentation's current foldback circuit | |
| CN104880975B (en) | Low-voltage chip controls the interface circuit and low-voltage control circuit of high tension apparatus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100728 Termination date: 20150918 |
|
| EXPY | Termination of patent right or utility model |