CN201497578U

CN201497578U - High-sensitivity readout circuit

Info

Publication number: CN201497578U
Application number: CN2009202274123U
Authority: CN
Inventors: 黄立
Original assignee: Wuhan Guide Infrared Co Ltd
Current assignee: Wuhan Guide Infrared Co Ltd
Priority date: 2009-08-13
Filing date: 2009-08-13
Publication date: 2010-06-02
Anticipated expiration: 2019-08-13

Abstract

The utility model relates to a high-sensitivity readout circuit, which has the following connecting modes: each reference detector is sequentially connected with an integral amplifying circuit, a sampling hold circuit and a buffer through an MOS tube; each buffer is connected with a column gating switch; a column shift register is respectively connected with 2M column gating switches controlled by the column shift register; each detector sensing unit is respectively connected with a row gating switch; a row shift register is respectively connected with N*M row gating switches and used for controlling gating of each detector sensing unit; each row gating switch is respectively sequentially connected with an integral amplifying circuit, a sampling hold circuit and a buffer; and 2M column gating switches are connected with multi-path selectors for outputting simulated signals. The high-sensitivity readout circuit realizes two-row readout and two-row integration, sampling and holding for infrared signals, thereby improving the sensitivity and readout efficiency of infrared detectors to a higher level.

Description

The high sensitivity sensing circuit

Technical field

The utility model belongs to the infrared eye signal and reads application, is specifically related to a kind of two row pixels and reads simultaneously and the two row pixels new type of high sensitivity sensing circuit of integrations simultaneously.

Background technology

Along with the continuous progress of scientific and technological level, integrated circuit (IC) design and manufacturing technology have all obtained development faster, and this provides guarantee for further developing of infrared reading circuit technology.Along with infrared eye military and deepening continuously that civil area is used, people are also more and more higher to the requirement of infrared eye on performance.Mainly show lower noise, higher sensitivity, quicker response and rich functions etc. more.

Present employed infrared eye mainly is refrigeration mode and non-refrigeration type focus planardetector.The integral way of refrigeration mode focus planardetector is a whole battle array integration simultaneously, and then output, so the integral time of refrigeration mode focus planardetector is longer, and sensitivity and signal to noise ratio (S/N ratio) are higher; The integral way of non-refrigeration type focus planardetector is an integration line by line, be exactly to read delegation specifically, integration delegation, therefore the integral time of non-refrigeration detector is shorter, usually have only tens delicate, this is that the performance of non-refrigeration focal surface detector is inferior to one of reason of refrigeration mode focus planardetector.

Domestic and international many countries are all in the research of being devoted to the infrared eye sensing circuit, in the world as Raytheon company, DRS company, Flir-Indigo system house, the NEC of Japan and the SCD company of Israel of the U.S., the ULIS company of France etc.Domestic as 211 in Kunming, Shanghai Institute of Technical Physics, University Of Chongqing, Tsing-Hua University, University of Electronic Science and Technology etc.

The integral way of at present the most frequently used uncooled fpa detector is an integration line by line, this kind playback mode makes that the integral time of single pixel is shorter, and it is lower to read efficient, and sensitivity is not high, signal to noise ratio (S/N ratio) is lower, and then causes noise equivalent temperature difference (NETD) value of non-refrigeration detector bigger.

Summary of the invention

The utility model is in order to overcome problem and the shortcoming that above-mentioned prior art exists, further increased the integral time of non-refrigerated infrared focal plane probe, improve the efficient of reading of non-refrigerated infrared focal plane probe, detection sensitivity and signal to noise ratio (S/N ratio) etc., and provide a kind of new type of high sensitivity sensing circuit, realize that focus planardetector signal two row carry out integration simultaneously, two row carry out signal simultaneously and read.This kind integral way makes be 2 times of playback mode line by line the integral time of single pixel, and NETD is original Doubly, sensitivity is original

Doubly, reading efficient is original 2 times.

The utility model is achieved in that the high sensitivity sensing circuit, by N * M capable gating switch (R), N * M detector sensing unit, a line shift register, a column shift register, 2M the logical switch (COL) of column selection, 2M reference detector, 2M integrating amplification circuit, 2M sampling hold circuit, 2M buffer, a MUX is formed, it is characterized in that: each reference detector through a metal-oxide-semiconductor successively with an integrating amplification circuit, a sampling hold circuit, a buffer connects, each buffer links to each other with the logical switch of a column selection, column shift register links to each other with the logical switch of 2M column selection respectively, and the logical switch of column selection is controlled by column shift register; Each detector sensing unit connects 1 capable gating switch respectively, and line shift register links to each other the gating of control detector sensing unit with N * M capable gating switch respectively; Each row gating switch is connected with an integrating amplification circuit, a sampling hold circuit, a buffer respectively with successively, and 2M the logical switch of column selection is connected with MUX, MUX output simulating signal.Column shift register is realized the control to the logical switch of column selection, the column shift register signal exports MUX to, and by MUX control output, line shift register is realized the control to the row gating switch, the line shift register signal exports MUX to, by MUX control output.

Decoding circuit is chosen the row of 2 in the entire pixel array simultaneously, then this 2 row signal is carried out integration, sampling and maintenance simultaneously, two row picture element signals carry out integration, sampling and maintenance simultaneously, have longer integral time, higher sensitivity, littler NETD and the higher efficient of reading.

The utility model is to choose the row of 2 in the entire pixel array simultaneously, and the signal of 2 row pixels is exported simultaneously, and the signal to 2 row pixels carries out integration, sampling and maintenance etc. simultaneously then.

Gating can be realized by the mode among Fig. 1 in the time of 2 row pixels, and integration, sampling and maintenance can realize by increase integrating amplification circuit, sampling hold circuit, reference detector in the time of two row signals.

The utility model is by improving decoding circuit on sensing circuit, increase integrating amplification circuit, sampling hold circuit, reference detector realize that 2 row of infrared signal are read, 2 row integration, sampling and maintenances etc.Can and read efficient and bring up to higher level the sensitivity of infrared eye like this.

Description of drawings

Fig. 1 is an infrared signal sensing circuit synoptic diagram of the present utility model;

Fig. 2 is the oscillogram of each control signal of the utility model.

Embodiment

The utility model will be further described in conjunction with the accompanying drawings.

The utility model adopts 2 row readout mode simultaneously, and for M (row) * N (OK) array, circuit structure as shown in Figure 1.

As shown in Figure 1, R1...RN/2 represents the row gating switch respectively among the figure; VGFID, GSK are switching voltages; VDET is the detector bias voltage; A is an amplifier; B is a buffer, and COL1...COL2M represents that respectively column selection leads to switch.

Capable gating signal R1 wherein, R2 ... R (N/2) is provided by line shift register.Ri controls 2i-1 simultaneously and 2i is capable.After this two row was by gating, its j row deliver to 2j-1 respectively and the 2j integrating amplification circuit carries out integration, therefore, need 2M integrating amplification circuit.

The signal that integration obtains is through over-sampling/maintenance, and the MUX multichannel is sent to ADC (analog to digital converter) and changes after selecting.The width of MUX MUX should be 2M.

Wherein the column selection messenger is exported by column shift register.When COLi was effective, i road signal was delivered to ADC (analog to digital converter) through MUX and is changed.

The waveform of each control signal as shown in Figure 2.The effective successively time of row gating signal R0, R1......R (N/2) is 2M CLK.The INT signal Ri be between high period effectively, allow signal is carried out integration, but its effective time than the weak point of Ri, maximum can reach 2M CLK.Therefore under certain frame frequency situation, for the single game signal, than integral mode line by line, this pattern can double readout time, thereby reduces noise, reduces NETD, and cost is to have increased by one times integrating amplification circuit.To 2i-1 with 2i is capable when reading, 2M column selection messenger COL1, COL2 ... COL2M is effective successively, and the duration is 1CLK, and the signal that sampling keeps is read.

Gating can be realized by changing decoding circuit in the time of the multirow pixel, and as shown in fig. 1, integration, sampling and maintenance etc. can realize by increase integrating amplification circuit, sampling hold circuit, reference detector in the time of the multirow signal.

The utility model is by changing decoding circuit on sensing circuit, as shown in fig. 1, increase that integrating amplification circuit, sampling hold circuit, reference detector realize that the multirow of infrared signal is read, multirow integration, sampling and maintenance etc.Can and read efficient and bring up to higher level the sensitivity of infrared eye like this.

Claims

1. high sensitivity sensing circuit, by N * M capable gating switch, N * M detector sensing unit, a line shift register, a column shift register, 2M the logical switch of column selection, 2M reference detector, 2M integrating amplification circuit, 2M sampling hold circuit, 2M buffer, a MUX is formed, it is characterized in that: each reference detector through a metal-oxide-semiconductor successively with an integrating circuit, a sampling hold circuit, a buffer connects, each buffer links to each other with the logical switch of a column selection, column shift register links to each other with the logical switch of 2M column selection respectively, and the logical switch of column selection is controlled by column shift register; Each detector sensing unit connects 1 capable gating switch respectively, and line shift register links to each other the gating of control detector sensing unit with N * M capable gating switch respectively; Each row gating switch is connected with an integrating amplification circuit, a sampling hold circuit, a buffer respectively with successively, and 2M the logical switch of column selection is connected with MUX, MUX output simulating signal.