CN201413356Y

CN201413356Y - Back electromotive force zero-crossing detector of brushless DC motor

Info

Publication number: CN201413356Y
Application number: CN2009201565085U
Authority: CN
Inventors: 薛晓明; 时倩
Original assignee: Individual
Current assignee: Individual
Priority date: 2009-06-15
Filing date: 2009-06-15
Publication date: 2010-02-24
Anticipated expiration: 2019-06-15

Abstract

The utility model discloses a back electromotive force zero-crossing detector of a brushless direct current (DC) motor, comprising a line voltage difference detection circuit, a PWM modulation noise cancelling circuit, a zero-crossing comparison circuit and a false zero shielding circuit. When in use, after motor three-phase terminal voltage containing PWM modulating wave is sent into the line voltage difference detection circuit and processed by the PWM modulation noise cancelling circuit, a smooth non-conduction phase back electromotive force signal which is magnified by four times and doesnot contain the PWM modulating wave is output; after being compared by the zero-crossing comparison circuit, a back electromotive force zero-crossing signal containing phase changing moment is obtained; and after a false zero is removed by the false zero shielding circuit, an accurate back electromotive force zero-crossing signal is output. The back electromotive force zero-crossing detector of the brushless DC motor needs no filtering circuit, can adapt to the brushless DC motor controlled by various PWM modulation techniques, and can accurately detect the back electromotive force zero-crossing signal without phase shift within the wide speed range of 0.5%-100% of rated rotating speed.

Description

The brushless direct-current machine counter electromotive zero-crossing detector

Technical field

The utility model relates to a kind of back electromotive force zero-crossing detecting device, particularly relates to a kind of unified accurate detecting device of brushless direct-current machine counter electromotive zero crossing that can adapt to various PWM modulation strategy controls.

Background technology

Brushless DC motor without position sensor detection rotor position is the simplest, practical method is to determine by detecting back electromotive force zero-crossing, because the back electromotive force of winding is to be difficult to the directly physical quantity of measurement, mainly contain two kinds of methods at present: the one, by detecting the motor terminal voltage signal, obtain the zero crossing of winding back-emf signal after comparing indirectly, the deficiency of this method is: need to filter PWM modulating wave in the terminal voltage with electric capacity in testing circuit, can produce phase shift, and change along with the variation of motor speed, make commutation inaccurate, especially when system's speed adjustable range is very wide, phase shift was excessive when motor operated in high frequency, can not implement correct commutation; The 2nd, in PWM copped wave shutoff or conduction period the terminal voltage of motor is sampled, directly obtain the zero crossing of back-emf signal, though this kind method has overcome the deficiency that first method exists, but need adopt the different method of samplings at different PWM modulation strategies, increased manufacturing cost, be unfavorable for that tissue produces, be subjected to the influence of inverter switching device pipe and diode drop simultaneously, when having limited the motor tick-over to the correct detection of back electromotive force zero-crossing.

The utility model content

Technical problem to be solved in the utility model is: a kind of filter capacitor that do not need is provided, phase shift does not appear, be not subjected to the influence of inverter switching device pipe and diode drop, the brushless direct-current machine counter electromotive zero crossing that can adapt to various PWM modulation technique controls is unified detecting device.

The technical scheme that the utility model adopted is:

Comprise the line voltage difference detection circuits, the PWM zoop is eliminated circuit, the zero crossing comparator circuit, falseness screened circuit at zero point, line voltage difference detection circuits interface A, B, C is connected with the triple-phase line of brshless DC motor respectively, the PWM zoop is eliminated circuit and is connected with the line voltage difference detection circuits, the zero crossing comparator circuit is eliminated circuit with the PWM zoop and is connected, falseness screened circuit at zero point is connected with the zero crossing comparator circuit, six commutation signal S1 that do not modulate through PWM, S2, S3, S4, S5, S6 eliminates circuit with the PWM zoop respectively and is connected with falseness screened circuit at zero point.

Described line voltage difference detection circuits comprises resistance R 1A, R2A, R1B, R2B, R1C, R2C, R3A, R3B, R3C, R4A, R4B, R4C, R5A, R5B, R5C, operational amplifier U1A, U1B, U1C, U1D, U1E, U1F, R1A, R1B, the end of R1C respectively with motor triple-phase line A, B, C connects, the end of the other end of R1A and R2A, the end of R3C, the positive terminal of U1A, the end of oppisite phase tandem of U1C, the end of the other end of R1B and R2B, the end of R3A, the positive terminal of U1B, the end of oppisite phase tandem of U1A, the end of the other end of R1C and R2C, the end of R3B, the positive terminal of U1C, the end of oppisite phase tandem of U1B, the end of R4A, the other end of R3A, the tandem of U1A output terminal, the end of R4B, the other end of R3B, the tandem of U1B output terminal, the end of R4C, the other end of R3C, the tandem of U1C output terminal, the other end of R4A, the end of R5A, the end of oppisite phase of U1D, the positive terminal tandem of U1E, the other end of R4B, the end of R5B, the end of oppisite phase of U1E, the positive terminal tandem of U1F, the other end of R4C, the end of R5C, the end of oppisite phase of U1E, the positive terminal tandem of U1D.

Described PWM zoop is eliminated circuit and is comprised operational amplifier U2A, U2B, U2C, U2D, both-end input analog switch U3A, U3B, U3C, or door U4A, U4B, U4C, resistance R 6A, R6B, R6C, R7, the normal phase input end of U2A, U2B, U2C is connected with U1D, the U1E of line voltage difference detection circuits, the output terminal of U1F respectively, also be connected with the input end of U3A, U3B, U3C respectively, the output terminal of U2A, U2B, U2C is connected with separately end of oppisite phase respectively, also is connected with another input end of U3A, U3B, U3C respectively; U3A, U3B, the U3C output terminal respectively with three resistance R 6A, R6B, the end of R6C connects, U3A, U3B, the control end of U3C respectively with U4A, U4B, the output terminal of U4C connects, two input ends of U4A respectively with commutation signal S1, S2 connects, two input ends of U4B respectively with commutation signal S3, S4 connects, two input ends of U4C respectively with commutation signal S5, S6 connects, three resistance R 6A, R6B, the other end of R6C is connected with the normal phase input end of U2D, the inverting input of U2D is connected with output terminal through resistance R 7, the output terminal of U2D, the lower end of diode D1, diode D2 upper end tandem, upper end connection+15V the power supply of diode D1, diode D2 lower end connection-15V power supply.

Described zero crossing comparator circuit operational amplifier U5 positive terminal ground connection, the end of oppisite phase of operational amplifier U5 is connected with the output terminal that the PWM zoop is eliminated circuit computing amplifier U2D.

Described falseness screened circuit at zero point comprises not gate U6, XOR gate U7 and U10, with door U8 and U11, rejection gate U9, d type flip flop U12, resistance R d1 and Rd2, capacitor C d1 and Cd2, the output terminal of zero crossing comparator circuit operational amplifier U5, the end of resistance R d1, the input end of U10, the D end tandem of U12, the other end of Rd1, the end of capacitor C d1, another input end tandem of U10, the output terminal of U10 is connected with the input end of U11, the output terminal of U11 is connected with the clock trigger end C of U12, the output terminal output back electromotive force zero passage square-wave signal of U12, six commutation signal S1 that do not modulate through PWM, S2, S3, S4, S5, corresponding respectively resistance R d2 one end that connects separately of S6, U6 input end separately, input end of U7 separately, the resistance R d2 other end separately, the end of capacitor C d2 separately, another input end tandem of U7 separately, U6 output terminal separately, U7 output terminal separately is connected with the input end of U8 separately, the output terminal of six U8 is connected with six input ends of U9, and the output terminal of U9 is connected with another input end of U11.

Brushless direct-current machine counter electromotive zero-crossing detector of the present utility model, the application simulation switch has been eliminated the PWM zoop and has been obtained the level and smooth non-conduction opposite potential signal of quadruplication, use simple digital circuit and eliminated commutation constantly because the false zero crossing that the conducting simultaneously of motor three phase windings occurs, compare the influence that has realized not being subjected to PWM modulation technique and inverter switching device pipe and diode drop with background technology, need not filter capacitor, realize that under lower speed the back electromotive force zero-crossing signal is not had the purpose that phase shift accurately detects.

Description of drawings

Fig. 1 is a block diagram of the present utility model.

Fig. 2 is the circuit connection diagram of an embodiment of the present utility model.

Among the figure: 1, line voltage difference detection circuits, 2, the PWM zoop eliminates circuit, 3, the zero crossing comparator circuit, 4, false zero point screened circuit.

Embodiment

The utility model is described in further detail below in conjunction with drawings and Examples.

As shown in Figure 1, a kind of brushless direct-current machine counter electromotive zero-crossing detector of the present utility model, vinculum voltage difference detection circuits (1), the PWM zoop is eliminated circuit (2), zero crossing comparator circuit (3), false screened circuit at zero point (4), line voltage difference detection circuits (1) interface A, B, C is connected with the triple-phase line of brshless DC motor respectively, the PWM zoop is eliminated circuit (2) and is connected with line voltage difference detection circuits (1), zero crossing comparator circuit (3) is eliminated circuit (2) with the PWM zoop and is connected, false screened circuit at zero point (4) is connected with zero crossing comparator circuit (3), six commutation signal S1 that do not modulate through PWM, S2, S3, S4, S5, S6 eliminates circuit (2) with the PWM zoop respectively and is connected with false screened circuit at zero point (4).

As shown in Figure 2, line voltage difference detection circuits (1) comprises resistance R 1A, R2A, R1B, R2B, R1C, R2C, R3A, R3B, R3C, R4A, R4B, R4C, R5A, R5B, R5C, operational amplifier U1A, U1B, U1C, U1D, U1E, U1F, R1A, R1B, the end of R1C respectively with motor triple-phase line A, B, C connects, the end of the other end of R1A and R2A, the end of R3C, the positive terminal of U1A, the end of oppisite phase tandem of U1C, the end of the other end of R1B and R2B, the end of R3A, the positive terminal of U1B, the end of oppisite phase tandem of U1A, the end of the other end of R1C and R2C, the end of R3B, the positive terminal of U1C, the end of oppisite phase tandem of U1B, the end of R4A, the other end of R3A, the tandem of U1A output terminal, the end of R4B, the other end of R3B, the tandem of U1B output terminal, the end of R4C, the other end of R3C, the tandem of U1C output terminal, the other end of R4A, the end of oppisite phase of the end U1D of R5A, the positive terminal tandem of U1E, the other end of R4B, the end of R5B, the end of oppisite phase of U1E, the positive terminal tandem of U1F, the other end of R4C, the end of R5C, the end of oppisite phase of U1E, the positive terminal tandem of U1D; The PWM zoop is eliminated circuit (2) and is comprised operational amplifier U2A, U2B, U2C, U2D, both-end input analog switch U3A, U3B, U3C, or door U4A, U4B, U4C, resistance R 6A, R6B, R6C, R7, the normal phase input end of U2A, U2B, U2C is connected with U1D, the U1E of line voltage difference detection circuits (1), the output terminal of U1F respectively, also be connected with the input end of U3A, U3B, U3C respectively, the output terminal of U2A, U2B, U2C is connected with separately end of oppisite phase respectively, also is connected with another input end of U3A, U3B, U3C respectively; U3A, U3B, the U3C output terminal respectively with three resistance R 6A, R6B, the end of R6C connects, U3A, U3B, the control end of U3C respectively with U4A, U4B, the output terminal of U4C connects, two input ends of U4A respectively with commutation signal S1, S2 connects, two input ends of U4B respectively with commutation signal S3, S4 connects, two input ends of U4C respectively with commutation signal S5, S6 connects, three resistance R 6A, R6B, the other end of R6C is connected with the normal phase input end of U2D, the inverting input of U2D is connected with output terminal through resistance R 7, the output terminal of U2D, the lower end of diode D1, diode D2 upper end tandem, upper end connection+15V the power supply of diode D1, diode D2 lower end connection-15V power supply; Zero crossing comparator circuit (3) operational amplifier U5 positive terminal ground connection, the end of oppisite phase of operational amplifier U5 is connected with the output terminal that the PWM zoop is eliminated circuit (2) operational amplifier U2D; False screened circuit at zero point (4) comprises not gate U6, XOR gate U7 and U10, with door U8 and U11, rejection gate U9, d type flip flop U12, resistance R d1 and Rd2, capacitor C d1 and Cd2, the output terminal of zero crossing comparator circuit (3) operational amplifier U5, the end of resistance R d1, the input end of U10, the D end tandem of U12, the other end of Rd1, the end of capacitor C d1, another input end tandem of U10, the output terminal of U10 is connected with the input end of U11, the output terminal of U11 is connected with the clock trigger end C of U12, the output terminal output back electromotive force zero passage square-wave signal of U12, six commutation signal S1 that do not modulate through PWM, S2, S3, S4, S5, corresponding respectively resistance R d2 one end that connects separately of S6, U6 input end separately, input end of U7 separately, the resistance R d2 other end separately, the end of capacitor C d2 separately, another input end tandem of U7 separately, U6 output terminal separately, U7 output terminal separately is connected with the input end of U8 separately, the output terminal of six U8 is connected with six input ends of U9, and the output terminal of U9 is connected with another input end of U11.

U1A of the present utility model, U1B, U1C, U1D, U1E, U1F adopt a slice integrated chip NJM2116M, U2A, U2B, U2C, U2D adopt a slice integrated chip LM324, U3A, U3B, U3C adopt three integrated chip MAX4669, U4A, U4B, U4C adopt a slice integrated chip CD4001, and U5 adopts a slice integrated chip NJM2406F.

Engineering process of the present utility model is:

As shown in Figure 3, the brshless DC motor three phase terminals voltage that contains the PWM modulating wave is eliminated the level and smooth non-conduction opposite potential signal V that output quadruplication after the processing of circuit does not contain the PWM modulating wave through line voltage difference detection circuits and PWM zoop _ABC, V _ABCObtain containing the commutation back electromotive force zero-crossing signal Z at constantly false zero point after relatively through amplitude limiter circuit amplitude limit, zero crossing comparator circuit _ABC, Z _ABCThe square-wave signal Z that has only back electromotive force zero-crossing through the false output at zero point of false screened circuit removal at zero point _ABCO

Above-mentioned embodiment is used for explaining the utility model; rather than the utility model limited; in the protection domain of spirit of the present utility model and claim, any modification and change to the utility model is made all fall in the protection domain of the present utility model.

Claims

1, the brushless direct-current machine counter electromotive zero-crossing detector, it is characterized in that: comprise line voltage difference detection circuits (1), the PWM zoop is eliminated circuit (2), zero crossing comparator circuit (3), false screened circuit at zero point (4), line voltage difference detection circuits (1) interface A, B, C is connected with the triple-phase line of brshless DC motor respectively, the PWM zoop is eliminated circuit (2) and is connected with line voltage difference detection circuits (1), zero crossing comparator circuit (3) is eliminated circuit (2) with the PWM zoop and is connected, false screened circuit at zero point (4) is connected with zero crossing comparator circuit (3), six commutation signal S1 that do not modulate through PWM, S2, S3, S4, S5, S6 eliminates circuit (2) with the PWM zoop respectively and is connected with false screened circuit at zero point (4).

2, brushless direct-current machine counter electromotive zero-crossing detector according to claim 1, it is characterized in that: described line voltage difference detection circuits (1) comprises resistance R 1A, R2A, R1B, R2B, R1C, R2C, R3A, R3B, R3C, R4A, R4B, R4C, R5A, R5B, R5C, operational amplifier U1A, U1B, U1C, U1D, U1E, U1F, R1A, R1B, the end of R1C respectively with motor triple-phase line A, B, C connects, the end of the other end of R1A and R2A, the end of R3C, the positive terminal of U1A, the end of oppisite phase tandem of U1C, the end of the other end of R1B and R2B, the end of R3A, the positive terminal of U1B, the end of oppisite phase tandem of U1A, the end of the other end of R1C and R2C, the end of R3B, the positive terminal of U1C, the end of oppisite phase tandem of U1B, the end of R4A, the other end of R3A, the tandem of U1A output terminal, the end of R4B, the other end of R3B, the tandem of U1B output terminal, the end of R4C, the other end of R3C, the tandem of U1C output terminal, the other end of R4A, the end of R5A, the end of oppisite phase of U1D, the positive terminal tandem of U1E, the other end of R4B, the end of R5B, the end of oppisite phase of U1E, the positive terminal tandem of U1F, the other end of R4C, the end of R5C, the end of oppisite phase of U1E, the positive terminal tandem of U1D.

3, brushless direct-current machine counter electromotive zero-crossing detector according to claim 1, it is characterized in that: described PWM zoop is eliminated circuit (2) and is comprised operational amplifier U2A, U2B, U2C, U2D, both-end input analog switch U3A, U3B, U3C, or door U4A, U4B, U4C, resistance R 6A, R6B, R6C, R7, U2A, U2B, the normal phase input end of U2C respectively with the U1D of line voltage difference detection circuits (1), U1E, the output terminal of U1F is connected, also respectively with U3A, U3B, the input end of U3C connects, U2A, U2B, the output terminal of U2C is connected with separately end of oppisite phase respectively, also respectively with U3A, U3B, another input end of U3C connects; U3A, U3B, the U3C output terminal respectively with three resistance R 6A, R6B, the end of R6C connects, U3A, U3B, the control end of U3C respectively with U4A, U4B, the output terminal of U4C connects, two input ends of U4A respectively with commutation signal S1, S2 connects, two input ends of U4B respectively with commutation signal S3, S4 connects, two input ends of U4C respectively with commutation signal S5, S6 connects, three resistance R 6A, R6B, the other end of R6C is connected with the normal phase input end of U2D, the inverting input of U2D is connected with output terminal through resistance R 7, the output terminal of U2D, the lower end of diode D1, diode D2 upper end tandem, upper end connection+15V the power supply of diode D1, diode D2 lower end connection-15V power supply.

4, brushless direct-current machine counter electromotive zero-crossing detector according to claim 1, it is characterized in that: described zero crossing comparator circuit (3) operational amplifier U5 positive terminal ground connection, the end of oppisite phase of operational amplifier U5 is connected with the output terminal that the PWM zoop is eliminated circuit (2) operational amplifier U2D.

5, brushless direct-current machine counter electromotive zero-crossing detector according to claim 1, it is characterized in that: false screened circuit at zero point (4) comprises not gate U6, XOR gate U7 and U10, with door U8 and U11, rejection gate U9, d type flip flop U12, resistance R d1 and Rd2, capacitor C d1 and Cd2, the output terminal of zero crossing comparator circuit (3) operational amplifier U5, the end of resistance R d1, the input end of U10, the D end tandem of U12, the other end of Rd1, the end of capacitor C d1, another input end tandem of U10, the output terminal of U10 is connected with the input end of U11, the output terminal of U11 is connected with the clock trigger end C of U12, the output terminal output back electromotive force zero passage square-wave signal of U12, six commutation signal S1 that do not modulate through PWM, S2, S3, S4, S5, corresponding respectively resistance R d2 one end that connects separately of S6, U6 input end separately, input end of U7 separately, the resistance R d2 other end separately, the end of capacitor C d2 separately, another input end tandem of U7 separately, U6 output terminal separately, U7 output terminal separately is connected with the input end of U8 separately, the output terminal of six U8 is connected with six input ends of U9, and the output terminal of U9 is connected with another input end of U11.

6, brushless direct-current machine counter electromotive zero-crossing detector according to claim 1, it is characterized in that: U1A, U1B, U1C, U1D, U1E, U1F adopt a slice integrated chip NJM2116M, U2A, U2B, U2C, U2D adopt a slice integrated chip LM324, U3A, U3B, U3C adopt three integrated chip MAX4669, U4A, U4B, U4C adopt a slice integrated chip CD4001, and U5 adopts a slice integrated chip NJM2406F.