CN201298160Y - Reset circuit for singlechip - Google Patents

Abstract

The utility model discloses a reset circuit for singlechip, comprising an RC reset circuit and an anti-jamming circuit; the RC reset circuit is electrically connected with the singlechip to realize the resetting of singlechip; and the anti-jamming circuit is electrically connected with the RC reset circuit to guarantee normal resetting of singlechip. In the utility model, the reset circuit for singlechip can be reliably reset, and the anti-jamming ability and reliability of the reset circuit for singlechip are greatly improved.

Description

Reset circuit of SCM

Technical field

The utility model relates to electronic applications, is specifically related to a kind of reset circuit of SCM.

Background technology

In recent years, single-chip microcomputer is more and more deep and extensive in the application in fields such as industrial automation production, process control, intelligent instrumentation, has improved production efficiency, control of quality and economic benefit effectively.People are also more and more higher to the requirement of its reliability simultaneously, therefore take interference protection measure very crucial to the normal operation of single-chip microcomputer, otherwise single-chip microcomputer is difficult to stablize, operation reliably.

Any single-chip microcomputer all is by executive utility in order just after the reliable reset, so the design of reset circuit of SCM is most important.Reset circuit of SCM is the sensitive part that is subject to noise, and therefore the design to reset circuit requires at first to guarantee that the monolithic function realizes reliable reset, secondly is to make reset circuit have antijamming capability.Accompanying drawing 1 shows the circuit theory diagrams of existing common reset circuit, and accompanying drawing 2 shows the input-output characteristic of this reset circuit reset signal.The problem of this reset circuit is in power supply power-fail moment capacitor C is discharged rapidly, and single-chip microcomputer can not reliable reset, and can not suppress the noise that power supply and switch transmission line seal in.

In addition, the interference of electromagnetic field causes the race of program to fly, and is absorbed in endless loop, thereby monolithic processor controlled system can't be worked on because single-chip microcomputer usually also can be subjected to coming from the outside at work, and unpredictable consequence can take place.

The utility model content

One of the purpose of this utility model provides a kind of reset circuit of SCM that can realize the single-chip microcomputer reliable reset.

The utility model provides a kind of reset circuit of SCM, comprises RC reset circuit, anti-jamming circuit; Described RC reset circuit is electrically connected with single-chip microcomputer, realizes resetting of single-chip microcomputer; Described anti-jamming circuit is electrically connected with the RC reset circuit, guarantees that single-chip microcomputer normally resets.

Described reset circuit of SCM also comprises the reset control circuit, and described reset control circuit is electrically connected with single-chip microcomputer, RC reset circuit respectively, sends reset signal to the RC reset circuit, realizes that by the RC reset circuit single-chip microcomputer resets.

Described reset control circuit is a watchdog circuit.

Described watchdog circuit comprises watchdog chip X25043 or watchdog chip X25045.

Described RC reset circuit comprises resistance R 1, R2, capacitor C 1 and inverter circuit, and described resistance R 1 and R2, capacitor C 1, inverter circuit are in parallel.

Described anti-jamming circuit comprises diode D1 and capacitor C 2, and described diode D1 is in parallel with capacitor C 1; Described capacitor C 2 is in parallel with diode D1.

Described inverter circuit comprises phase inverter chip 74HCI4,74LSI4 or CT4OI4.

The utility model reset circuit of SCM has realized effectively that by the cooperating of RC reset circuit and anti-jamming circuit single-chip microcomputer resets.In addition, be absorbed at single-chip microcomputer under the situation of endless loop, the reset control circuit sends reset signal to the RC reset circuit, and the RC reset circuit receives reset signal and realizes that single-chip microcomputer resets, and has improved the antijamming capability and the stability of reset circuit greatly.

Description of drawings

Fig. 1 is the circuit theory diagrams of existing reset circuit of SCM;

Fig. 2 is the input-output characteristic synoptic diagram of existing reset circuit of SCM reset signal;

Fig. 3 is the structured flowchart of reset circuit of SCM among the embodiment of the present utility model;

Fig. 4 is the structured flowchart of reset circuit of SCM among another embodiment of the present utility model;

Fig. 5 is the circuit theory diagrams of reset circuit of SCM among the embodiment of the present utility model;

Fig. 6 is the input-output characteristic synoptic diagram of reset circuit of SCM reset signal among the embodiment of the present utility model.

The utility model purpose, function and advantage will be in conjunction with the embodiments, are described further with reference to accompanying drawing.

Embodiment

The reset circuit of SCM that the utility model embodiment provides has realized effectively that by the cooperating of RC reset circuit and anti-jamming circuit single-chip microcomputer resets.In addition, be absorbed at single-chip microcomputer under the situation of endless loop, the reset control circuit sends reset signal to the RC reset circuit, and the RC reset circuit receives reset signal, has improved antijamming capability, the reliability and stability of reset circuit of SCM greatly.

Fig. 3 shows the utility model one embodiment reset circuit of SCM, comprises RC reset circuit 10 and anti-jamming circuit 20; Described RC reset circuit 10 is electrically connected with single-chip microcomputer 30, realizes resetting of single-chip microcomputer 30; Described anti-jamming circuit 20 is electrically connected with RC reset circuit 10, guarantees that single-chip microcomputer 30 normally resets.

Fig. 4 shows another embodiment reset circuit of SCM of the utility model, comprises RC reset circuit 10, anti-jamming circuit 20 and reset control circuit 40; Described RC reset circuit 10 is electrically connected with single-chip microcomputer 30, realizes resetting of single-chip microcomputer 30; Described anti-jamming circuit 20 is electrically connected with RC reset circuit 10, guarantees that single-chip microcomputer 30 normally resets.Described reset control circuit 40 is electrically connected with single-chip microcomputer 30, RC reset circuit 10 respectively, sends reset signal to RC reset circuit 10, and RC reset circuit 10 receives reset signal and realizes that single-chip microcomputer 30 resets.Described reset control circuit 40 comprises watchdog circuit.

Fig. 5 shows the circuit theory diagrams of the utility model reset circuit of SCM one embodiment, and single-chip microcomputer 30 adopts 8051 series monolithics in the present embodiment.

Described RC reset circuit 10 comprises resistance R 1, R2, capacitor C 1 and phase inverter chip 74LSI4.Described resistance R 1 and R2, capacitor C 1 are in parallel.Described phase inverter chip 74LSI4 and diode D1, capacitor C 1 are in parallel.Phase inverter also can adopt and comprise phase inverter chip 74HCI4 or CT4O14 herein.

Described anti-jamming circuit 20 comprises diode D1 and capacitor C 2, and described diode D1 is in parallel with capacitor C 1; Described capacitor C 2 is in parallel with diode D1.Wherein, diode D1 can make capacitor C 1 discharge rapidly when power supply power-fail, treat that power up just often realizes the reliable reset of 8051 series monolithics, avoid capacitor C 1 and can not charge again because be full of voltage, thereby cause 8051 series monolithics to be reset once more, cause 8051 series monolithics the phenomenon of paralysis to occur.Can effectively suppress the interference of power supply high frequency noise at the 8051 shunt capacitance C2 of series monolithic reseting port place, further improve 8051 series monolithic reset circuits sealing in capability of restraining noise.

Described reset control circuit 40 adopts watchdog chip X25043, the SO of described watchdog chip X25043, SI, SCK and/the CS pin is connected to four I/O pins of P1.0 to P1.3 of 8051 series monolithics respectively.Watchdog chip X25043 /the WP pin directly links to each other with power Vcc, and/RESET pin is in parallel with resistance R 1 and R2 in the RC reset circuit.Watchdog circuit also can adopt and comprise watchdog chip X25045 herein.

The characteristics of watchdog chip X25043 be with programmable WatchDog Timer, voltage monitoring and EEPROM assembled package in the chip of one 8 pins.8051 series monolithics by the program of writing watchdog chip X25043 pin of operation in the single-chip microcomputer (statement of described program is to be placed on dispersedly in the middle of other control statements of single-chip microcomputer) control I/O pin periodically toward watchdog chip X25043 /send into high level (or low level) on the CS pin.If the P1.3 mouth of 8051 series monolithics carry out one by high level to low level saltus step, watchdog chip X25043 is with selected.In case 8051 series monolithics cause when making a certain program segment be absorbed in the endless loop state behind the program fleet owing to disturbing, the program of writing watchdog chip X25043 pin just can not be performed; At this moment, watchdog chip X25043 will just send reset signal to the RC reset circuit owing to can not get the signal that 8051 series monolithics are sent here, and the RC reset circuit receives reset enable signal 8051 series monolithics and resets.

The concrete course of work of the reset circuit of SCM of present embodiment is: by high level during to low level saltus step, watchdog chip X25043 is selected at the P1.3 of 8051 series monolithics pin.Watchdog chip X25043 detects power source voltage Vcc, if power source voltage Vcc is lower than setting value (as 4V voltage), then send reset signal (low level) to the RC reset circuit by/RESET pin, surpass setting value (as 4V voltage) a period of time (as minimum 100ms) up to power source voltage Vcc, watchdog chip X25043 /RESET pin output signal just can become high level, the end that resets of 8051 series monolithics.

After resistance R 1 in the RC reset circuit receives reset signal (low level), supply voltage is drawn high, because supply voltage is drawn high, capacitor C 1 can be regarded short circuit as, thereby make reset signal become high level signal with the rising of supply voltage, reset signal this moment (high level) realizes resetting of 8051 series monolithics by the RESET pin of phase inverter 74LSI4 output low level to single-chip microcomputer.Simultaneously, capacitor C 2 is charged, and when power down, capacitor C 1 discharge, the level of reset signal is step-down progressively, waits for reset signal next time.By the input-output characteristic of the present embodiment reset circuit of SCM reset signal shown in Fig. 6 as can be known, the reset circuit of SCM that present embodiment proposed can effectively make chip microcontroller reset, and has improved the antijamming capability of reset signal.

In addition, when using the WatchDog Timer of watchdog chip X25043, can select the house dog fixed time interval to send timing signal.If 8051 series monolithics are not response in fixed time interval, watchdog chip X25043 /RESET pin output pulse width is minimum to be the 100ms reset signal, realizes that by the RC reset circuit 8051 series monolithics reset.

The foregoing description is the utility model preferred implementation; but embodiment of the present utility model is not restricted to the described embodiments; other any do not deviate from change, the modification done under spirit of the present utility model and the principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, be included within the protection domain of the present utility model.

Claims (7)

1, a kind of reset circuit of SCM is characterized in that, comprising:

RC reset circuit, anti-jamming circuit;

Described RC reset circuit is electrically connected with single-chip microcomputer, realizes resetting of single-chip microcomputer;

Described anti-jamming circuit is electrically connected with the RC reset circuit, guarantees that single-chip microcomputer normally resets.

2. reset circuit of SCM according to claim 1 is characterized in that, also comprises:

The reset control circuit, described reset control circuit is electrically connected with single-chip microcomputer, RC reset circuit respectively, sends reset signal to the RC reset circuit, realizes that by the RC reset circuit single-chip microcomputer resets.

3. reset circuit of SCM according to claim 2 is characterized in that:

Described reset control circuit is a watchdog circuit.

4. reset circuit of SCM according to claim 3 is characterized in that:

Described watchdog circuit comprises watchdog chip X25043 or watchdog chip X25045.

5. according to each described reset circuit of SCM of claim 1 to 4, it is characterized in that:

Described RC reset circuit comprises resistance R 1, R2, capacitor C 1 and inverter circuit, and described resistance R 1 and R2, capacitor C 1, inverter circuit are in parallel.

6. reset circuit of SCM according to claim 5 is characterized in that:

Described anti-jamming circuit comprises diode D1 and capacitor C 2, and described diode D1 is in parallel with capacitor C 1; Described capacitor C 2 is in parallel with diode D1.

7. reset circuit of SCM according to claim 5 is characterized in that:

Described inverter circuit comprises phase inverter chip 74HCI4,74LS14 or CT4O14.

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