CN201142678Y - Alternation synchronous sampling real-time compensating device based on phase lock loop - Google Patents
Alternation synchronous sampling real-time compensating device based on phase lock loop Download PDFInfo
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- CN201142678Y CN201142678Y CN 200720157906 CN200720157906U CN201142678Y CN 201142678 Y CN201142678 Y CN 201142678Y CN 200720157906 CN200720157906 CN 200720157906 CN 200720157906 U CN200720157906 U CN 200720157906U CN 201142678 Y CN201142678 Y CN 201142678Y
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- 230000001360 synchronised effect Effects 0.000 title claims description 6
- 238000006243 chemical reaction Methods 0.000 claims abstract description 4
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Abstract
The utility model discloses a phase-locked loop based alternating synchronizing sampling real-time compensating device which solves the problem that the prior compensating method cannot well inhibit sampling errors in the analog-to-digital conversion. Furthermore, the device has the advantages of synchronizing sampling, simple structure, convenient use, effectively inhibited sampling error, realized real-time compensation, etc. The structure of the device is as follows: the input end of a second-order low-pass filter circuit receives a grid synchronizing signal and the output end thereof is sequentially connected with a zero-crossing comparison circuit and a phase-locked loop circuit; the phase-locked loop circuit and a frequency dividing circuit carry out two-way communication; the output end of the frequency circuit is connected with a sampling control circuit of a microprocessor; the output of the circuit is connected with an analog multi-way switch; the input end of the multi-way switch is connected with a ground signal and an input passage of a voltage circuit, and the output end thereof is connected with the input end of an AD converter; the output end of the AD converter is connected with the sampling control circuit of the microprocessor.
Description
Technical field
The utility model relates to synchronized sampling real-time compensation apparatus used in a kind of electric power system, relates in particular to a kind of interleaving synchronization sampling real time compensation device based on phase-locked loop.
Background technology
In the process that analog quantity is converted to digital quantity, exist " " zero compensation of passage, be about to " " digital quantity of channel sample comes the sample digital quantity result of other analog quantitys of compensation for calibrating errors as the digital zero of standard.Traditional compensation method is generally: sampling earlier before other analog quantitys of sampling " ", being worth the reference that is used as with post-sampling with this then, generally can not change in this value sampling process afterwards.Because external interference and digital high-frequency signal are to the factors such as interference on simulation ground, analog references " " often exist and fluctuate, above-mentioned compensation way is not owing to be real-time dynamic compensation to the analog quantity of sampling, thus to a certain extent to because " " the inhibition effect of the sampling error that causes of fluctuation be not very desirable.
Summary of the invention
The purpose of this utility model is exactly in order to solve at present when the analog-to-digital conversion existing compensation way sampling error to be suppressed problems such as effect is bad, take into account the requirement of synchronized sampling simultaneously, provide a kind of have simple in structure, easy to use, can effectively suppress sampling error, realize the interleaving synchronization sampling real time compensation device based on phase-locked loop of advantages such as real-Time Compensation.
For achieving the above object, the utility model adopts following technical scheme:
A kind of interleaving synchronization sampling real time compensation device based on phase-locked loop, it comprises second-order low-pass filter circuit, zero passage voltage comparison circuit, phase-locked loop circuit, frequency dividing circuit, microprocessor samples control circuit, A/D convertor circuit and analog multichannel switch circuit; Wherein, the second-order low-pass filter circuit input end receives the synchronized signal, and its output is connected with phase-locked loop circuit with the zero passage voltage comparison circuit successively, and phase-locked loop circuit is connected with the two-way closed loop of frequency dividing circuit; The frequency dividing circuit output also is connected with the microprocessor samples control circuit simultaneously, this circuit output end is connected with analog multichannel switch, this analog multichannel switch input also is connected with the potential circuit input channel with earth signal, its output is connected with the AD converter input, and the AD converter output is connected with the input of microprocessor samples control circuit.
The harmonic wave that secondary in the utility model in the second-order low-pass filter circuit filtering electrical network and secondary are above obtains pure fundamental signal; The zero passage voltage comparison circuit is converted to square-wave signal with the fundamental signal of second-order low-pass filter; Phase-locked loop circuit and frequency dividing circuit carry out synchronizing and frequency doubling to signal, and it can be frequencys multiplication such as 128 or 256 or 512.
The microprocessor samples control circuit is the DSP circuit, and it switches earth signal and effective power current signal alternately according to the synchronizing frequency doubling signal control analog multichannel switch circuit of phase-locked loop, with the AD conversion that interlocks.
The utility model proposes a kind of novel interleaving synchronization sampling real-Time Compensation technology based on phase-locked loop.Whole system is made up of seven parts such as second-order low-pass filter circuit, zero passage voltage comparison circuit, phase-locked loop circuit, frequency dividing circuit, microprocessor samples control circuit, A/D convertor circuit and analog multichannel switch circuit.Pass through alternating sampling, microcontroller with ought last time be gathered " " digital quantity of signal compensates the voltage and current signal that ought last time gather, accomplish to " " real-time dynamic compensation, thereby can farthest eliminate " " on ripple to the influence of systematic sampling precision.
The beneficial effects of the utility model are: simple in structure, easy to use, and the sampling precision height.
Description of drawings
Fig. 1 is a structural representation of the present utility model.
Wherein, 1, the second-order low-pass filter circuit, 2, the zero passage voltage comparison circuit, 3, phase-locked loop circuit, 4, frequency dividing circuit, 5, the microprocessor samples control circuit, 6, A/D convertor circuit, 7, analog multichannel switch circuit.
Embodiment
Below in conjunction with accompanying drawing and embodiment the utility model is described further.
Among Fig. 1, the utility model comprises second-order low-pass filter circuit 1, zero passage voltage comparison circuit 2, phase-locked loop circuit 3, frequency dividing circuit 4, microprocessor samples control circuit 5, A/D convertor circuit 6 and analog multichannel switch circuit 7; Wherein, second-order low-pass filter circuit 1 input receives the synchronized signal, and its output is connected with phase-locked loop circuit 3 with zero passage voltage comparison circuit 2 successively, 3 of phase-locked loop circuits and 4 two-way connections of frequency dividing circuit; Frequency dividing circuit 4 outputs also are connected with microprocessor samples control circuit 5 simultaneously, this circuit output end is connected with analog multichannel switch 7, these analog multichannel switch 7 inputs also are connected with the potential circuit input channel with earth signal, its output is connected with A/D convertor circuit 6 inputs, and A/D convertor circuit 6 outputs are connected with the input of microprocessor samples control circuit 5.The harmonic wave that secondary in the second-order low-pass filter circuit 1 filtering electrical network and secondary are above obtains pure fundamental signal.Zero passage voltage comparison circuit 2 is converted to square-wave signal with the fundamental signal of second-order low-pass filter 1.4 pairs of signals of phase-locked loop circuit 3 and frequency dividing circuit carry out synchronizing and frequency doubling, and it can be frequencys multiplication such as 128 or 256 or 512.
Claims (2)
1, a kind of interleaving synchronization sampling real time compensation device based on phase-locked loop is characterized in that: it comprises second-order low-pass filter circuit, zero passage voltage comparison circuit, phase-locked loop circuit, frequency dividing circuit, microprocessor samples control circuit, A/D convertor circuit and analog multichannel switch circuit; Wherein, the second-order low-pass filter circuit input end receives the synchronized signal, and its output is connected with phase-locked loop circuit with the zero passage voltage comparison circuit successively, phase-locked loop circuit then with the frequency dividing circuit both-way communication; The frequency dividing circuit output also is connected with the microprocessor samples control circuit simultaneously, this circuit output end is connected with analog multichannel switch, this analog multichannel switch input also is connected with the potential circuit input channel with earth signal, its output is connected with the AD converter input, and the AD converter output is connected with the input of microprocessor samples control circuit.
2, the interleaving synchronization sampling real time compensation device based on phase-locked loop according to claim 1, it is characterized in that: described microprocessor samples control circuit is the DSP circuit, its control analog multichannel switch circuit switches earth signal and effective power current signal alternately, with the AD conversion that interlocks.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200720157906 CN201142678Y (en) | 2007-11-29 | 2007-11-29 | Alternation synchronous sampling real-time compensating device based on phase lock loop |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200720157906 CN201142678Y (en) | 2007-11-29 | 2007-11-29 | Alternation synchronous sampling real-time compensating device based on phase lock loop |
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| Publication Number | Publication Date |
|---|---|
| CN201142678Y true CN201142678Y (en) | 2008-10-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 200720157906 Expired - Lifetime CN201142678Y (en) | 2007-11-29 | 2007-11-29 | Alternation synchronous sampling real-time compensating device based on phase lock loop |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103634004A (en) * | 2013-11-27 | 2014-03-12 | 苏州贝克微电子有限公司 | Circuit for removing harmonic distortion in sampling and retaining circuit |
| CN109120267A (en) * | 2018-10-25 | 2019-01-01 | 南方电网科学研究院有限责任公司 | Power signal synchronous sampling system and method |
| US11375908B2 (en) | 2016-10-21 | 2022-07-05 | Huawei Technologies Co., Ltd. | Blood pressure detection signal sampling and compensation method and apparatus, and blood pressure signal collection system |
-
2007
- 2007-11-29 CN CN 200720157906 patent/CN201142678Y/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103634004A (en) * | 2013-11-27 | 2014-03-12 | 苏州贝克微电子有限公司 | Circuit for removing harmonic distortion in sampling and retaining circuit |
| US11375908B2 (en) | 2016-10-21 | 2022-07-05 | Huawei Technologies Co., Ltd. | Blood pressure detection signal sampling and compensation method and apparatus, and blood pressure signal collection system |
| CN109120267A (en) * | 2018-10-25 | 2019-01-01 | 南方电网科学研究院有限责任公司 | Power signal synchronous sampling system and method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: STATE ELECTRIC NET CROP. Effective date: 20130311 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20130311 Address after: 250002 No. 500 South Second Ring Road, Shandong, Ji'nan Patentee after: Shandong Research Inst. of Electric Power Patentee after: State Grid Corporation of China Address before: 250002 No. 500 South Second Ring Road, Shandong, Ji'nan Patentee before: Shandong Research Inst. of Electric Power |
|
| CX01 | Expiry of patent term |
Granted publication date: 20081029 |