CN200962132Y - Conduction board for analog static field mapping - Google Patents
Conduction board for analog static field mapping Download PDFInfo
- Publication number
- CN200962132Y CN200962132Y CN 200620098865 CN200620098865U CN200962132Y CN 200962132 Y CN200962132 Y CN 200962132Y CN 200620098865 CN200620098865 CN 200620098865 CN 200620098865 U CN200620098865 U CN 200620098865U CN 200962132 Y CN200962132 Y CN 200962132Y
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- electrode
- substrate
- current
- field mapping
- carrying plate
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Abstract
The utility model relates to a conductive plate simulating the electrostatic field mapping which comprises a base board (1), an electrode (2), and a line conductor (5) connected with the electrode (2). The electrode (2) is arranged on the positive side of the base board (1) which is coated with a conductive ink layer (3). The conductive plate achieves high planeness, long life and great experimental effects without the contact of the electrode and the probe when in experiment.
Description
Technical field
The utility model relates to the analog electrostatic field mapping technical field, particularly the current-carrying plate of analog electrostatic field mapping use.
Background technology
Because directly describing electrostatic field has difficulties, and the distribution of the distribution of steady current field and electrostatic field can be expressed with identical mathematical formulae, so come analog electrostatic field with the steady current field usually, the equipotential line of surveying and drawing various electric fields by the current potential between the potential electrode, and then analyze the distribution situation of electrostatic field.Therefore, analog electrostatic field mapping is the Physical Experiment that domestic and international institution of higher learning generally offer.
The experimental provision of present analog electrostatic field mapping comprises conductive paper, electrode, probe.Electrode is pressed on the conductive paper, during mapping, loads steady voltage on electrode, and probe slides on the conductive paper between the electrode, with the current potential on the each point on the conductive paper between the potential electrode.
Adopt conductive paper in the experiment, have following defective: 1, probe slides on conductive paper, and conductive paper is scratched by probe easily, the carrying out of influence experiment; 2, the conductive paper flatness is not high, causes experiment effect not good enough; 3, electrode is in the top of conductive paper, and it is a lot of to exceed conductive paper, and probe is very easily run into, and can cause the surveying instrument damage; 4, electrode is pressed on the conductive paper by self weight, between electrode and the conductive paper to contact uniformity coefficient bad, influence experiment effect.
Summary of the invention
Technical problem to be solved in the utility model is: a kind of electric current-conducting plate for simulating electrostatic field mapping is provided, and the flatness height of this current-carrying plate, long service life, during experiment, electrode can not run into by probe, and experiment effect is good.
The utility model solves the problems of the technologies described above the technical scheme that is adopted:
Electric current-conducting plate for simulating electrostatic field mapping, it comprises substrate, electrode, the lead that is connected with electrode; Electrode is arranged on the front of substrate, also is coated with conductive ink layer on the substrate front side.
In the such scheme, have the hole on the substrate of electrode below, lead passes the hole and is connected with the bottom of electrode from the back side of substrate.
In the such scheme, the part surface of electrode exposes.
In the such scheme, conductive ink layer coated electrode edge 1-3mm.
In the such scheme, electrode is divided into upper and lower two-layer, and electrode lower floor contacts with the front of substrate; Lower floor is a copper film, and the upper strata is the tin film.
Compared with prior art, the utility model current-carrying plate has the following advantages:
1, current-carrying plate has certain degree of hardness, and the flatness height, can not scratched by probe;
2, even with contacting with current-carrying plate, experiment effect is not good for current-carrying plate flatness height, probe;
3, the height of electrode surface is lower than the electrically conductive ink laminar surface, and lead is arranged on the back side, and probe can not run into, and can not cause the surveying instrument damage;
4, conductive ink layer cover part electrode can guarantee that conductive ink layer contacts with electrode;
5, electrode lower floor is made of copper, and the upper strata is made by tin, and the tin film can prevent the electrode surface corrosion.
The utility model current-carrying plate cost is low, reliability is high, can be widely used in fields such as Physical Experiment, electric field research.
Description of drawings
Fig. 1 is the utility model embodiment Facad structure synoptic diagram
Fig. 2 is the A-A cutaway view Amplified image of Fig. 1
Embodiment
The utility model electric current-conducting plate for simulating electrostatic field mapping embodiment shown in 1,2, it comprises substrate 1, electrode 2, the lead 5 that is connected with electrode 2; Electrode 2 is arranged on the front of substrate 1, has hole 4 on the substrate 1 of electrode 2 belows, and lead 5 passes hole 4 and is connected with the bottom of electrode 2 from the back side of substrate 1.
Substrate also is coated with conductive ink layer 3 on 1 front.The part surface of electrode 2 exposes, conductive ink layer 3 coated electrodes 2 edge 1-3mm.
Electrode is divided into upper and lower two-layer, and electrode lower floor contacts with the front of substrate 1; Lower floor is a copper film 7, and the upper strata is a tin film 6.
The material of preparation the utility model electric current-conducting plate for simulating electrostatic field mapping is printed circuit board (PCB) (PCB), and the substrate of printed circuit board (PCB) is an epoxy resin board, and the front of substrate is covered with copper film.
The preparation method of the utility model electric current-conducting plate for simulating electrostatic field mapping is:
According to design, stay part copper film in the front of printed circuit board (PCB), the copper film that stays forms the lower floor of electrode; Have hole 4 on the substrate below the electrode 21, lead 5 passes hole 4 and welds with the bottom of electrode 2 from the back side of substrate 1.At the electroplating surfaces with tin of electrode 2, form the upper strata of electrode.Utilize silk screen that electrically conductive ink evenly is printed between the electrode in the front of substrate 1, conductive ink layer 3 coated electrodes 2 edge 1-3mm, the surface of the other parts of electrode 2 exposes.Be placed on the baking of the inherent 50-70 degree of baking oven temperature range then got final product in 30-120 minute.
The processing flow process of the utility model current-carrying plate is simple, and cost is low, and the metal film flatness is good, and can not scratched by probe, therefore, the long service life of current-carrying plate, experiment effect is good.
Claims (5)
1, electric current-conducting plate for simulating electrostatic field mapping is characterized in that: it comprises substrate (1), electrode (2), the lead (5) that is connected with electrode (2); Electrode (2) is arranged on the front of substrate (1), and substrate (1) also is coated with conductive ink layer (3) on the front.
2, current-carrying plate as claimed in claim 1 is characterized in that: have hole (4) on the substrate (1) of electrode (2) below, lead (5) passes hole (4) and is connected with the bottom of electrode (2) from the back side of substrate (1).
3, current-carrying plate as claimed in claim 1 is characterized in that: the part surface of electrode (2) exposes.
4, current-carrying plate as claimed in claim 3 is characterized in that: conductive ink layer (3) coated electrode (2) edge 1-3mm.
5, current-carrying plate as claimed in claim 1 is characterized in that: electrode is divided into upper and lower two-layer, and electrode lower floor contacts with the front of substrate (1); Lower floor is copper film (7), and the upper strata is tin film (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620098865 CN200962132Y (en) | 2006-09-07 | 2006-09-07 | Conduction board for analog static field mapping |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620098865 CN200962132Y (en) | 2006-09-07 | 2006-09-07 | Conduction board for analog static field mapping |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN200962132Y true CN200962132Y (en) | 2007-10-17 |
Family
ID=38798649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200620098865 Expired - Fee Related CN200962132Y (en) | 2006-09-07 | 2006-09-07 | Conduction board for analog static field mapping |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN200962132Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101441275B (en) * | 2008-11-18 | 2011-11-09 | 吉林大学 | Three-dimensional direct current field indoor array type observation electrode plate |
-
2006
- 2006-09-07 CN CN 200620098865 patent/CN200962132Y/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101441275B (en) * | 2008-11-18 | 2011-11-09 | 吉林大学 | Three-dimensional direct current field indoor array type observation electrode plate |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20071017 |