CN1971540A - Control system and method of multipath input data - Google Patents

Control system and method of multipath input data Download PDF

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Publication number
CN1971540A
CN1971540A CN 200610144112 CN200610144112A CN1971540A CN 1971540 A CN1971540 A CN 1971540A CN 200610144112 CN200610144112 CN 200610144112 CN 200610144112 A CN200610144112 A CN 200610144112A CN 1971540 A CN1971540 A CN 1971540A
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data
input data
road
input
synchrodata
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CN100533414C (en
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杨作兴
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Vimicro Corp
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Vimicro Corp
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Abstract

A controlling method for multiplex input data is used to process the input data of n channel with the same sampling frequency. The method includes: the n channels input data are converted into n channels synchronous data; when the counter receives the data frame synchronous signal is valid, and the counter starts countering repeatedly; the sampling frequency of the data frame synchronous data is same with the input data. The invention converts the multiplex input data into the single-channel complex data, and just needs an input buffer control and a buffer to transmit the multiplex input data to the processor, reduce the cost of device and the complexity, and improve the processing performance of multiplex data.

Description

A kind of control system of multipath input data and control method thereof
Technical field
The present invention relates to a kind of control system and control method thereof of multipath input data, the control system and the control method thereof of the multipath input data that particularly a kind of sample frequency is identical.
Background technology
In voice data processing system, there is multichannel data to deliver in the processor usually and handles.And processor often has only a bus, and this just needs input data control circuit that the input data are controlled, and will import data and send to processor by processor data bus in certain sequence.
Fig. 1 is multichannel data is delivered to processor through input Data Control module a synoptic diagram.As shown in Figure 1,4 circuit-switched data: input data 1, input data 2, input data 3 and input data 4 need be delivered in the processor and handle, and input Data Control module sends to processor by processor data bus in a certain order with 4 tunnel input data.
According to characteristic and the processor of input data to data require different, input has the implementation method of various input Data Control modules at multichannel data.If have only in the multipath input data at any one time one the tunnel effectively or processor only be concerned about wherein a certain circuit-switched data at any one time, at this moment importing Data Control is exactly that simple multi-way switch switches.But in speech processing system, input data audio stream often, data are continuous uninterrupted, and processor needs each road input data usually simultaneously, do not allow the excessive deferral of data, do not allow loss of data.In order to reach this purpose, often adopt the many buffer memorys shown in Figure 2 and the input control method of many cache controllers.In Fig. 2, the input-buffer controller of multipath input data by separately deposits buffer memory separately respectively in, and the data in buffer memory reach some, as half-full or when almost expiring, the data in the buffer memory sent to processor.
It is exactly to have wasted too much steering logic and buffer memory that there are main weak point in the many buffer memorys as shown in Figure 2 and the input control method of many cache controllers, especially obvious when this way in the input data source is many.In addition, also there is the shortcoming of poor synchronization in this input control method.
Summary of the invention
Technical matters to be solved by this invention is, overcome the deficiency of multipath input data control system in the prior art and control method thereof, a kind of low cost is proposed, the control system of the multipath input data that the equipment complexity is low and control method thereof,, do not lose and deliver to processor and handle the little delay of multipath input data with less Resources Consumption.
In order to address the above problem, the invention provides a kind of control method of multipath input data, be used for the identical n road input data of sample frequency are handled, this method comprises:
Convert n road input data to n road synchrodata respectively;
Counter begins repeat count when being effective at the data-frame sync signal that receives;
The count value of counter output is exported 1 road complex data as switch controlling signal gating n road synchrodata successively;
In addition, describedly convert n road input data to n road synchrodata be operating as respectively: at rising edge clock, and input latchs input data i when to enable i be high, and the output signal of latch is exactly synchrodata i; Wherein, 1≤i≤n.
In addition, described counter adds 1 with the clock frequency of each clock period.
In addition, the frequency of data-frame sync signal be described input data i sample frequency k doubly, wherein, 1≤i≤n, k are the integer more than or equal to 1.
In addition, when the switch controlling signal value of described counter generation is i, described multi-channel switch module input-output data i; Wherein, 1≤i≤n.
In addition, described complex data is saved in the buffer memory by the input-buffer control module.
The present invention also provides a kind of control system of multipath input data, comprises the input-buffer control module, buffer unit, processor; Caching control unit is kept in the buffer memory by the data of buffer memory bus with input; Processor extracts the data of preserving in the buffer unit by processor bus and caching control unit and correspondingly handles; This device also comprises:
Data synchronisation unit is used to receive n road input data and clock signal and converts n road input data to n road synchrodata respectively;
Counter is used to receive identical clock signal and the data-frame sync signal of clock signal that receives with above-mentioned data synchronisation unit, and begins repeat count and count value is exported as switch controlling signal when receiving the data-frame sync signal;
Multi-channel switch module is used to receive the above-mentioned n road synchrodata that is generated by data synchronisation unit, and passes through in proper order by n road synchrodata according to switch controlling signal, thereby output single channel complex data is to above-mentioned input-buffer control module.
In addition, described data synchronisation unit comprises n road latch, and is height and clock signal when being in rising edge at enable signal, exports above-mentioned input data.
In addition, described multi-channel switch module comprises n road input end, and selects a road in the said n routes input end as output data according to switch controlling signal.
The present invention also provides a kind of control device of multipath input data, comprises data synchronisation unit, is used to receive n road input data and clock signal and converts n road input data to n road synchrodata respectively; This device also comprises:
Counter is used for receive clock signal and data-frame sync signal, and begins repeat count and count value is exported as switch controlling signal when receiving the data-frame sync signal;
Multi-channel switch module comprises n road input end, is used to receive the above-mentioned n road synchrodata that is generated by data synchronisation unit, and passes through in proper order by n road synchrodata according to switch controlling signal, thus output single channel complex data;
Above-mentioned data synchronisation unit comprises n road latch, and is that height and clock signal are when being in rising edge, with described input data output at enable signal.
The present invention is according to the characteristics of voice data, by multipath input data being converted to the single channel complex data, only needing an input-buffer control and an input-buffer multipath input data can be delivered to processor handles, reduce equipment cost and complexity, and improved the performance that multipath synchronous data is handled.
Description of drawings
Fig. 1 is multipath input data is delivered to processor through input Data Control module a synoptic diagram;
Fig. 2 is the synoptic diagram that in the prior art multipath input data is adopted the multipath input data control method of many buffer memorys and many cache controllers;
Fig. 3 is the system architecture synoptic diagram of multipath input data control system of the present invention;
Fig. 4 is the oscillogram that multipath input data arrives the conversion of single channel complex data;
Fig. 5 is the system architecture synoptic diagram of the lock unit of multipath input data control system of the present invention;
Fig. 6 is the system architecture synoptic diagram of the multi-channel switch module of multipath input data control system of the present invention;
Fig. 7 is the synoptic diagram that comprises 2 data unit of multichannel data in the complex data.
Embodiment
Basic ideas of the present invention are, the multi-path audio-frequency data that data sampling rate is identical is a synchrodata through clock synchronization, and convert the single channel complex data to and deliver to processor and handle.
The present invention is done to describe further with 4 tunnel input data instances below in conjunction with drawings and Examples.
In audio frequency processing system, processor is handled multipath input data simultaneously if desired, these data have a common characteristic usually so, that is exactly that their data sampling rate is identical, for example sampling rate is 44K, represent to sample 44K time for 1 second, sampling precision be 8 bits or 16 than top grade, failing processor is difficult to they are handled simultaneously.In addition, in some cases, in the process to the processing of multichannel data, if lack any circuit-switched data, processor all can't be handled, and needs to wait for after all data arrive could begin to handle.
As shown in Figure 3, input data 1, input data 2, input data 3, input data 4 are to deliver to the data that CPU handles simultaneously.
Above-mentioned 4 circuit-switched data and 4 road enable signals: enable 1, enable 2, enable 3, enable 4 and input to data synchronisation unit simultaneously and carry out data synchronization processing; Data synchronisation unit will be imported data 1, input data 2, input data 3 and input data 4 by clock information and enable signal and be converted to respectively: synchrodata 1, synchrodata 2, synchrodata 3 and synchrodata 4.The waveform relationship of above-mentioned input data, enable data and synchrodata as shown in Figure 4.
Above-mentioned data synchronization processing is at rising edge clock, and when the input enable signal is high, latch input data 1, input data 2, input data 3 and input data 4, the output signal of latch is exactly synchrodata 1, synchrodata 2, synchrodata 3 and synchrodata 4.Above-mentioned enable signal is produced by data source, is used to make latch when to judge latch signal.The synchronized relation of input data and enable signal is guaranteed by data source.The structural representation of lock unit as shown in Figure 5, when EN is height and CLK when being rising edge, Q=D, promptly synchrodata is the value of input data, otherwise Q keeps initial value constant.
Simultaneously, counter receiving data frames synchronizing signal and the clock information identical with data synchronisation unit; The data-frame sync signal when each frame begins with counter O reset; Counter adds 1 with the clock frequency of each clock period; Counter is according to the count value output switch control signal; The frequency of data-frame sync signal is identical with the sample frequency of input data.
When each frame begins, the data-frame sync signal with counter O reset after, along with increasing progressively of clock, counter increases to 1 by 0, increases to 2 by 1 ...; Until the data-frame sync signal once more with its zero clearing.Multi-channel switch module receives above-mentioned synchrodata 1, synchrodata 2, synchrodata 3 and synchrodata 4 and above-mentioned switch controlling signal, and exports the complex data that is composited by input data 1, input data 2, input data 3 and input data 4 according to switch controlling signal.
Fig. 6 is the system architecture synoptic diagram of the multi-channel switch module of multipath input data control system of the present invention.As shown in Figure 6, multi-channel switch module comprises 4 road input ends, and selects a road in the said n routes input end as output data according to switch controlling signal.When the switch controlling signal value of counter generation is 1, multi-channel switch module input-output data 1; When the switch controlling signal value of counter generation is 2, multi-channel switch module input-output data 2; When the switch controlling signal value of counter generation is 3, multi-channel switch module input-output data 3; When the switch controlling signal value of counter generation is 4, multi-channel switch module input-output data 4.When the switch controlling signal value was worth for other, multi-channel switch module can export 0 or other value.In this case, the zone bit that switch controlling signal value 0 only begins as each frame can be cancelled.When promptly the switch controlling signal value that generates when counter is 0, multi-channel switch module input-output data 1; When the switch controlling signal value of counter generation is 1, multi-channel switch module input-output data 2; When the switch controlling signal value of counter generation is 2, multi-channel switch module input-output data 3; When the switch controlling signal value of counter generation is 3, multi-channel switch module input-output data 4.
As shown in Figure 4, because the frequency of data-frame sync signal is identical with the frequency of the sample frequency of importing data and enable signal, therefore guaranteed that counter is cleared and identical with the sample frequency of input data, comprised and only comprised the data unit that data are imported on each road in the complex data thereby make by zero frequency that begins to increase progressively.Certainly, the data-frame sync signal also can be k a times of input data sampling frequency, and k is the integer more than or equal to 1, for example, the data-frame sync signal is during for 2 times of input data sampling frequency, when the switch controlling signal value that generates when counter is 1, and multi-channel switch module input-output data 1; ...; When the switch controlling signal value of counter generation is 4, multi-channel switch module input-output data 4; When the switch controlling signal value of counter generation is 5, multi-channel switch module input-output data 1; ...; When the switch controlling signal value of counter generation is 8, multi-channel switch module input-output data 4.As shown in Figure 7, in this case, 2 data unit of 4 tunnel input data have been comprised in 1 frame of complex data, i.e. the data of 2 frames.
The above-mentioned complex data that is generated by multi-channel switch module is kept in the buffer memory by the input-buffer control module, and finally is submitted in the processor and handles simultaneously.Because multi-way switch is only exported the single channel complex data, so only need an input-buffer control module and corresponding buffer unit thereof can finish caching process.
More than describe is to be described with the control method of 4 tunnel input data instances to multipath input data of the present invention.It is evident that the present invention can expand to any n road input data conditions, promptly when the switch controlling signal value is 1, input-output data 1; The switch controlling signal value is 2 o'clock, input-output data 2; ...; When the switch controlling signal value is n, input-output data n; Other situation can export 0.
As seen from the above description,, no matter how many road input data are arranged, only need one road cache controller and one road buffer memory, significantly reduced taking system resource by adopting multichannel data control method of the present invention; Reduced the complexity that system realizes.

Claims (10)

1, a kind of control method of multipath input data is used for the identical n road input data of sample frequency are handled, and this method comprises:
Convert n road input data to n road synchrodata respectively;
Counter begins repeat count when being effective at the data-frame sync signal that receives;
The count value of counter output is exported 1 road complex data as switch controlling signal gating n road synchrodata successively;
2, the control method of multipath input data as claimed in claim 1, it is characterized in that, describedly convert n road input data to n road synchrodata be operating as respectively: at rising edge clock, and input is when to enable i be high, latch input data i, the output signal of latch is exactly synchrodata i; Wherein, 1≤i≤n.
3, the control method of multipath input data as claimed in claim 1 is characterized in that, described counter adds 1 with the clock frequency of each clock period.
4, the control method of multipath input data as claimed in claim 1 is characterized in that, the frequency of described data-frame sync signal be described input data i sample frequency k doubly, wherein, 1≤i≤n, k are the integer more than or equal to 1.
5, the control method of multipath input data as claimed in claim 1 is characterized in that, when the switch controlling signal value of described counter generation is i, selects output synchrodata i; Wherein, 1≤i≤n.
6, the control method of multipath input data as claimed in claim 1 is characterized in that, described complex data is saved in the buffer memory by the input-buffer control module.
7, a kind of control system of multipath input data comprises the input-buffer control module, buffer unit, processor; Caching control unit is kept in the buffer memory by the data of buffer memory bus with input; Processor extracts the data of preserving in the buffer unit by processor bus and caching control unit and correspondingly handles; It is characterized in that this device also comprises:
Data synchronisation unit is used to receive n road input data and clock signal and converts n road input data to n road synchrodata respectively;
Counter is used for receive clock signal and data-frame sync signal, and begins repeat count and count value is exported as switch controlling signal when receiving the data-frame sync signal;
Multi-channel switch module is used to receive the above-mentioned n road synchrodata that is generated by data synchronisation unit, and passes through in proper order by n road synchrodata according to switch controlling signal, thereby output single channel complex data is to above-mentioned input-buffer control module.
8, the control system of multipath input data as claimed in claim 7 is characterized in that, described data synchronisation unit comprises n road latch, and is height and clock signal when being in rising edge at enable signal, exports described input data.
9, the control system of multipath input data as claimed in claim 7 is characterized in that, described multi-channel switch module comprises n road input end, and selects a road in the said n routes input end as output data according to switch controlling signal.
10, a kind of control device of multipath input data comprises data synchronisation unit, is used to receive n road input data and clock signal and converts n road input data to n road synchrodata respectively; It is characterized in that this device also comprises:
Counter is used for receive clock signal and data-frame sync signal, and begins repeat count and count value is exported as switch controlling signal when receiving the data-frame sync signal;
Multi-channel switch module comprises n road input end, is used to receive the above-mentioned n road synchrodata that is generated by data synchronisation unit, and passes through in proper order by n road synchrodata according to switch controlling signal, thus output single channel complex data;
Above-mentioned data synchronisation unit comprises n road latch, and is that height and clock signal are when being in rising edge, with described input data output at enable signal.
CNB200610144112XA 2006-11-27 2006-11-27 Control system and method of multipath input data Expired - Fee Related CN100533414C (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010139273A1 (en) * 2009-06-03 2010-12-09 华为终端有限公司 Method, device and system for multiplexing and demultiplexing multi-channel signals
CN104216847A (en) * 2014-09-03 2014-12-17 航天科工深圳(集团)有限公司 Data acquisition method and data acquisition system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010139273A1 (en) * 2009-06-03 2010-12-09 华为终端有限公司 Method, device and system for multiplexing and demultiplexing multi-channel signals
US20120075985A1 (en) * 2009-06-03 2012-03-29 Konggang Wei Method and apparatus for multiplexing and demultiplexing multi-channel signals and system for transmitting multi-channel signals
US9219561B2 (en) 2009-06-03 2015-12-22 Huawei Device Co., Ltd. Method and apparatus for multiplexing and demultiplexing multi-channel signals and system for transmitting multi-channel signals
CN104216847A (en) * 2014-09-03 2014-12-17 航天科工深圳(集团)有限公司 Data acquisition method and data acquisition system

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