CN1873607A - Display processing unit for syncretizing multiple frames and multiple screens in high speed - Google Patents

Display processing unit for syncretizing multiple frames and multiple screens in high speed Download PDF

Info

Publication number
CN1873607A
CN1873607A CN 200510026343 CN200510026343A CN1873607A CN 1873607 A CN1873607 A CN 1873607A CN 200510026343 CN200510026343 CN 200510026343 CN 200510026343 A CN200510026343 A CN 200510026343A CN 1873607 A CN1873607 A CN 1873607A
Authority
CN
China
Prior art keywords
card
prime
processing unit
output
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 200510026343
Other languages
Chinese (zh)
Inventor
金国培
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JINQIAO NETWORK TECH Co Ltd SHANGHAI
Original Assignee
JINQIAO NETWORK TECH Co Ltd SHANGHAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JINQIAO NETWORK TECH Co Ltd SHANGHAI filed Critical JINQIAO NETWORK TECH Co Ltd SHANGHAI
Priority to CN 200510026343 priority Critical patent/CN1873607A/en
Publication of CN1873607A publication Critical patent/CN1873607A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Controls And Circuits For Display Device (AREA)

Abstract

The invention relates to a high speed multi-menu and multi-screen inosculated display processing implement. It includes more than one video frequency signal sources. It also includes a former processor, a back processor. The former processor includes a former central processing unit, more than one former input cards, and more than one former input cards corresponding to the former input cards. The back processor includes a back central processing unit, more than one back input cards, and more than one former input cards corresponding to the former input cards. Because the processed various kinds of data are distributed to different module, the processing speed is improved. On one processor, 2-8 channels signal sources can be displayed. And it ensures the high speed real-time display of each channel signal source. If more menus are needed to display at one time, one back grade is only needed to cascade or the former grade cascades cooperating the back grade. This can extend the number of the input and output channel to realize various kinds of requirements.

Description

Display processing unit for syncretizing multiple frames and multiple screens in high speed
Technical field
The present invention relates to a kind of video display processing unit, relate in particular to a kind of giant-screen display processing unit for syncretizing multiple frames and multiple screens.
Background technology
Hard-edge splicing series products is called video wall splicer, TV wall controller again, display wall controller, combination controller, multi-screen processor, multi-screen splicing processor, display wall splicer, giant-screen processor, digital splicing processor, multi-screen presentation manager, display wall processor, major function is to distribute to N video display unit (as the rear-projection unit) after a complete picture signal is divided into the N piece, finishes with a plurality of ordinary video unit and forms a jumbotron dynamic image display screen.Insert when can support various video equipment, as: DVD, video camera, satellite receiver, set-top box, standard computer a-signal.The video wall processor can realize that the output of a plurality of physics is combined into a ultrahigh resolution after the resolution stack and shows output, make screen wall constitute a ultrahigh resolution, super brightness, super large display size the logic display screen, finish a plurality of signal sources (network signal, rgb signal and vision signal) windowing on screen wall, move, the Presentation Function of variety of way such as convergent-divergent; But the hard-edge splicing has obvious cut-off rule (being usually said physics piece), and it is integrated to reach panorama, can not realize real degree of depth stereoscopic sensation.
The solution of lap splice series products part the gap problem of hard-edge splicing, promptly the picture of two projector overlaps, but does not do the light processing of advancing to fade out; Though this lap splice does not have the physics splicing seams, the brightness of lap is 2 times of view picture remainder, and showing as lap on display effect is a bright wisp; When the series products release is merged on soft limit, just be eliminated at once.
It is seamless spliced soft limit integration technology that series products is merged on soft limit; Initial is mainly used in the large screen projection visualization systems such as virtual emulation and virtual reality, in recent years, development along with software and hardware technology, seamless spliced technology has been widely used in commander's control, virtual emulation training, industrial designing for manufacturing, scientific research and complex decision process, and becomes more and more popular in the application of display and demonstration, advertisement, entertainment field.
Seamless spliced be a kind of special, require than higher projection display applications, it not only requires super large, a complete width of cloth screen, all used projections also have specific (special) requirements to projection oversize picture.The user both can select the projector of producer's special use, also can select general projector, cooperated seamless spliced application specific processor to realize seamless spliced effect.
As seen from Figure 1: existing display processing unit takes single device to finish splicing usually: various input equipments are (as DVD, VCD, real-time photography is first-class) by input card analog video signal is transformed into digital data transmission to central processing unit, central processing unit receives the vision signal of a large amount of not process codings (as the real-time CIF signal of 25 frames, data volume approximately is every road video per second 352*288*25*3=7.6M Bytes=60M bits), (4 road video per seconds will carry out the video data typing of 240M bits in the video fusion of central processing unit realization multipath input data, and utilize processor to carry out real-time amalgamation), and finish the cutting output of view picture video, flow to each output card respectively.Whole process takies great bus bandwidth and processor resource, for the quantity of quantity that will increase input card and output card, all is the very big test to the overall system load.Like this, certainly will make system can not hold more picture, and the processing speed that influences system greatly.
Because above-mentioned processing makes that the edge fusion treatment function ratio on the existing market is more single, basically all be on whole giant-screen, only to show a picture, processor has only been done and has been melted the limit treatment technology, and all do not relate to for common functions such as many picture demonstrations, display mode setting, the switchings of multiwindow signal, greatly limited the fusion treatment The Application of Technology.
Summary of the invention
The technical issues that need to address of the present invention have provided a kind of display processing unit for syncretizing multiple frames and multiple screens in high speed, are intended to solve above-mentioned defective.
In order to solve the problems of the technologies described above, the present invention is achieved by the following technical solutions:
The present invention includes at least more than one video signal source; Also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Described video signal source links to each other with the prime input card, the prime input card by built-in CPU with the vision signal source data of handling: comprise that S-Video signal, composite video signal or rgb signal are through DMA (internal storage access technology immediately, be that video data is transmitted without CPU, directly duplicate to destination device by bus) export to the prime output card; The three source look video datas that described prime output card will be handled by built-in CPU:, then export general split screen signal if directly give output device; If export to the back level processor, then output back level processor needs the vision signal of edge fusion; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Level input card in back receives the data of prime output card output and the video data of handling is carried out the edge fusion treatment or directly links to each other with video signal source by built-in CPU: comprise S-Video signal, composite video signal or rgb signal level input card through DMA is transferred to after, after a grade input card link to each other with output device; Described prime central processing unit is handled network control signal and video input sync signal data and is passed through bus transfer; Described back level central processing unit is handled the edge and is merged control signal and input-output card synchronization signal data and pass through bus transfer.
Compared with prior art, the invention has the beneficial effects as follows: since with various data allocations to be processed given different modules, improved processing speed; On a processor, can show 2-8 road signal source, and can guarantee that the high-speed real-time of each road signal shows; More if desired picture shows simultaneously, only needs a plurality of backs level to carry out cascade, and perhaps prime cooperates the back level to carry out layer connection, just can enlarge the quantity of IO channel, satisfies various demands.
Description of drawings
Fig. 1 is the display processing unit module map of prior art;
Fig. 2 is a module map of the present invention;
Fig. 3 is a prime module map among Fig. 2;
Fig. 4 is a level module map in back among Fig. 2;
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is described in further detail:
By Fig. 2, Fig. 3, Fig. 4 as seen: the video signal source that the present invention includes at least more than one; Also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Described video signal source links to each other with the prime input card, the prime input card by built-in CPU with the vision signal source data of handling: comprise that S-Video signal, composite video signal or rgb signal are through DMA (internal storage access technology immediately, be that video data is transmitted without CPU, directly duplicate to destination device by bus) export to the prime output card; The three source look video datas that described prime output card will be handled by built-in CPU:, then export general split screen signal if directly give output device; If export to the back level processor, then output back level processor needs the vision signal of edge fusion; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Level input card in back receives the data of prime output card output and the video data of handling is carried out the edge fusion treatment or directly links to each other with video signal source by built-in CPU: comprise S-Video signal, composite video signal or rgb signal level input card through DMA is transferred to after, after a grade input card link to each other with output device; Described prime central processing unit is handled network control signal and video input sync signal data and is passed through bus transfer; Described back level central processing unit is handled the edge and is merged control signal and input-output card synchronization signal data and pass through bus transfer;
Level processor and back level processor can overlap more in cascade before described;
Described prime input card is a Trimedia TM1500 chip, and described prime output card is the TIDM642 chip, and described back level input card is a Trimedia TM1500 chip, and described back level output card is a TI DM642 chip;
Prime of the present invention and back level are all supported the conventional video source, and system's prime is the network enabled video source more, and the back level merges in order to support the edge, and prime, back level are all supported the cascade of many covers, at last by the unified output of output device.
In order to realize many pictures and farthest to improve processing speed, add in the every input card and handle core, every input card as individual processing, is directly passed to the data of input output card by DMA then and the data of rough handling is passed to the back level do follow-up edge fusion treatment; The prime central processing unit is only handled the transmission (very little data volume) of video source and the coordination of all input-output cards, the fewer work of relative data amount such as the processing of many equipment cascadings, and all input and output by bus transfer, do not greatly reduce the load to bus.
The back level adopts the way of output of every card one tunnel to realize that final edge merges output, the computing of handling core is gone up in various prime inputs by card, directly send output card to by DMA, and finish the edge by output card and merge part, back level central processing unit is mainly used to coherent system cascade, various window effect etc.The same with prime, the back level is handled the process nuclear that all its main operationals are placed on each input-output card in the heart, and the obstruction of the bus of avoiding has reached unprecedented processing speed and number of windows.
But preceding level processor is the industrial control system of card insert type i386 framework, realize the management of video clip, the service processing of telemanagement, the feedback of user interactions, support RGB input card, video (S terminal, compound terminals etc.) input card, network input interface etc. have been realized functionalization, adjustable for height backing system.And can dispose various input sources flexibly according to user's demand, can directly output to projector equipment, can input to for large scale system that level continues to handle after the system for mini-system.
But back level processor is the embedded system of card insert type, accepts the various signals of prime input source or other input sources, realizes high-speed soft limit fusion flexibly.
Projector can be the large-scale movie theatre level projector of common small-sized projector or high lumen degree, and projection goes out seamless image behind the signal that level transmits after receiving high-quality system.
In order to solve the processing speed problem that many pictures show, forward and backward level processor does not adopt the treatment technology of bus architecture, and is based on the processing mode of each autonomous channel, road.Most function and data computation all realize on each road input-output card, the input of every road, card release all have internal memory and the CPU of oneself, can carry out computing separately, and then carry out communication and synchronously by mainboard, thus speed and real-time when having guaranteed many pictures dynamic process.
More if desired picture shows simultaneously, only needs a plurality of backs level to carry out cascade, and perhaps prime cooperates the back level to carry out layer connection, just can enlarge the quantity of IO channel, satisfies actual requirement.
The present invention has unitized construction flexibly, prime is used separately, the back level is used separately, the supporting use of level after the prime, the single back of many primes level are used, the single prime of many back levels is used, the many backs of many primes level is used or the like, unitized construction can be according to client's demand flexibly, and collocation is perfect system from the most cheap system of minimum to maximum.And can satisfy the harsh requirement to system extension, the escalation process that the realization system is level and smooth because of the client.
The present invention self has the hardware fault that hardware redundancy can be taken precautions against burst, although the performance of hardware, quality has all reached very high height, but who can not guarantee that hardware can permanent trouble-free operation, the disaster of various bursts all may cause hardware to have problems, the Single Point of Faliure of the single-point hardware fault of prime of the present invention or back level can be not needing to change under the situation that hardware connects, and by video matrix, directly walks around single prime or single back level realizes.The present invention is unique display system that realizes the hierarchical layered structure, has guaranteed the stability of system under exacting terms.

Claims (3)

1. display processing unit for syncretizing multiple frames and multiple screens in high speed comprises at least more than one video signal source; It is characterized in that: also comprise a preceding level processor, level processor after; Level processor comprises a prime central processing unit before described, and at least more than one prime input card is with corresponding at least more than one prime output card of prime input card; Described video signal source links to each other with the prime input card, the prime input card by built-in CPU with the vision signal source data of handling: comprise that S-Video signal, composite video signal or rgb signal export to the prime output card through DMA; The three source look video datas that described prime output card will be handled by built-in CPU:, then export general split screen signal if directly give output device; If export to the back level processor, then output back level processor needs the vision signal of edge fusion; Level central processing unit after described back level processor comprises one, at least more than one back level input card is with corresponding at least more than one back level output card of back level input card; Level input card in back receives the data of prime output card output and the video data of handling is carried out the edge fusion treatment or directly links to each other with video signal source by built-in CPU: comprise S-Video signal, composite video signal or rgb signal level input card through DMA is transferred to after, after a grade input card link to each other with output device; Described prime central processing unit is handled network control signal and video input sync signal data and is passed through bus transfer; Described back level central processing unit is handled the edge and is merged control signal and input-output card synchronization signal data and pass through bus transfer.
2. display processing unit for syncretizing multiple frames and multiple screens in high speed according to claim 1 is characterized in that: level processor and back level processor can overlap more in cascade before described.
3. display processing unit for syncretizing multiple frames and multiple screens in high speed according to claim 1 and 2, it is characterized in that: described prime input card is a Trimedia TM1500 chip, described prime output card is a TI DM642 chip, described back level input card is a Trimedia TM1500 chip, and described back level output card is a TI DM642 chip.
CN 200510026343 2005-06-01 2005-06-01 Display processing unit for syncretizing multiple frames and multiple screens in high speed Pending CN1873607A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200510026343 CN1873607A (en) 2005-06-01 2005-06-01 Display processing unit for syncretizing multiple frames and multiple screens in high speed

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200510026343 CN1873607A (en) 2005-06-01 2005-06-01 Display processing unit for syncretizing multiple frames and multiple screens in high speed

Publications (1)

Publication Number Publication Date
CN1873607A true CN1873607A (en) 2006-12-06

Family

ID=37484091

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200510026343 Pending CN1873607A (en) 2005-06-01 2005-06-01 Display processing unit for syncretizing multiple frames and multiple screens in high speed

Country Status (1)

Country Link
CN (1) CN1873607A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101944006A (en) * 2010-08-10 2011-01-12 清投视讯(北京)科技有限公司 Information display technology of spliced large screen
CN101963895A (en) * 2010-10-26 2011-02-02 广东威创视讯科技股份有限公司 Edge blending processor, system and superposition method
CN101621674B (en) * 2009-07-09 2011-07-06 华为技术有限公司 Processing method of video data and related equipment and system
CN102426497A (en) * 2011-10-10 2012-04-25 福建佳视数码文化发展有限公司 Implementation method and device for six-folded screen video control multi-touch screen
CN103106057A (en) * 2012-12-25 2013-05-15 广东威创视讯科技股份有限公司 Cascading system of multiprocessor device and cascading control method of the same
CN103760776A (en) * 2014-01-03 2014-04-30 宝鸡石油机械有限责任公司 Petroleum drilling machine integrated control virtual simulation operating system
CN104986163A (en) * 2015-06-24 2015-10-21 南车株洲电力机车研究所有限公司 Multisystem fusion display device for train and method for implementing device
CN105491303A (en) * 2015-11-19 2016-04-13 广东威创视讯科技股份有限公司 Method, device and system for processing splicing wall multipath signals
CN106448602A (en) * 2016-11-09 2017-02-22 江门市唯是半导体科技有限公司 Medical display device

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101621674B (en) * 2009-07-09 2011-07-06 华为技术有限公司 Processing method of video data and related equipment and system
CN101944006A (en) * 2010-08-10 2011-01-12 清投视讯(北京)科技有限公司 Information display technology of spliced large screen
CN101963895A (en) * 2010-10-26 2011-02-02 广东威创视讯科技股份有限公司 Edge blending processor, system and superposition method
CN102426497A (en) * 2011-10-10 2012-04-25 福建佳视数码文化发展有限公司 Implementation method and device for six-folded screen video control multi-touch screen
CN103106057B (en) * 2012-12-25 2016-06-29 广东威创视讯科技股份有限公司 Multiprocessor machine cascade system and cascade Mach-Zehnder interferometer method thereof
CN103106057A (en) * 2012-12-25 2013-05-15 广东威创视讯科技股份有限公司 Cascading system of multiprocessor device and cascading control method of the same
CN103760776A (en) * 2014-01-03 2014-04-30 宝鸡石油机械有限责任公司 Petroleum drilling machine integrated control virtual simulation operating system
CN103760776B (en) * 2014-01-03 2016-04-13 宝鸡石油机械有限责任公司 Oil-well rig integrating control virtual emulation operating system
CN104986163A (en) * 2015-06-24 2015-10-21 南车株洲电力机车研究所有限公司 Multisystem fusion display device for train and method for implementing device
CN104986163B (en) * 2015-06-24 2018-04-10 南车株洲电力机车研究所有限公司 A kind of train multisystem merges display device and method
CN105491303A (en) * 2015-11-19 2016-04-13 广东威创视讯科技股份有限公司 Method, device and system for processing splicing wall multipath signals
CN105491303B (en) * 2015-11-19 2019-04-16 广东威创视讯科技股份有限公司 A kind of combination multiple signals processing method, apparatus and system
CN106448602A (en) * 2016-11-09 2017-02-22 江门市唯是半导体科技有限公司 Medical display device

Similar Documents

Publication Publication Date Title
CN1873607A (en) Display processing unit for syncretizing multiple frames and multiple screens in high speed
Li et al. Building and using a scalable display wall system
US7782327B2 (en) Multiple parallel processor computer graphics system
CN106528025B (en) Multi-screen image projection method, terminal, server and system
US8117275B2 (en) Media fusion remote access system
DeFanti et al. The OptIPortal, a scalable visualization, storage, and computing interface device for the OptiPuter
JPH07146671A (en) Large-sized video display device
US20220164203A1 (en) Streaming application visuals using page-like splitting of individual windows
US8511829B2 (en) Image processing apparatus, projection display apparatus, video display system, image processing method, and computer readable storage medium
CN104123110A (en) Android double-screen extraordinary image display method
JP3166622B2 (en) Loopback video preview for computer display
CN2842931Y (en) High-speed multi-picture multi-screen fased displaying treatment apparatus
CN112312040B (en) Video processor and display system
WO2021207979A1 (en) Video processing device and system
CN101159819A (en) Method and device of inter cut Flash in online video
CN111045623B (en) Method for processing graphics commands in multi-GPU splicing environment
CN112218000B (en) Multi-picture monitoring method, device and system
JP5229727B2 (en) Multi-image display system, image processing method and program
CN111683077B (en) Virtual reality equipment and data processing method
KR100959159B1 (en) Multi-Screen control method and control device
CN106303478A (en) Multichannel image splicing emerging system
KR20140050522A (en) System and providing method for multimedia virtual system
CN111176599A (en) Spliced screen control system
US8884973B2 (en) Systems and methods for rendering graphics from multiple hosts
CN115880156B (en) Multi-layer spliced display control method and device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication