CN1851915A - Flat-face saliant-point type packing base-board for integrated circuit or discrete device - Google Patents

Flat-face saliant-point type packing base-board for integrated circuit or discrete device Download PDF

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Publication number
CN1851915A
CN1851915A CN 200610039920 CN200610039920A CN1851915A CN 1851915 A CN1851915 A CN 1851915A CN 200610039920 CN200610039920 CN 200610039920 CN 200610039920 A CN200610039920 A CN 200610039920A CN 1851915 A CN1851915 A CN 1851915A
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CN
China
Prior art keywords
dao
salient point
packaging
discrete device
base plate
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Pending
Application number
CN 200610039920
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Chinese (zh)
Inventor
梁志忠
王新潮
于燮康
陶玉娟
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JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Changjiang Electronics Technology Co Ltd filed Critical Jiangsu Changjiang Electronics Technology Co Ltd
Priority to CN 200610039920 priority Critical patent/CN1851915A/en
Publication of CN1851915A publication Critical patent/CN1851915A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

This invention relates to a plane button package base plate of an IC or a discrete device and its processing method characterizing that base islands and pins are distributed on the front of the base plate in buttons connected by metal thin layers, the base island is the one composed of multiple buttons, the pin is single, the fronts of the islands and the pins have metal layers, the number of the islands is one or many in the package unit of a single IC or discrete device formed in the post package, namely, single unit island or multiple unit base islands composed of multiple buttons, the pins are arrayed at one side, both sides or three sides or surrounding the base islands.

Description

Integrated circuit or discrete device planar salient point type base plate for packaging and preparation method thereof
Technical field:
The present invention relates to a kind of integrated circuit or discrete device planar salient point type base plate for packaging and preparation method thereof.Belong to technical field of electronic components.
Background technology:
Existing integrated circuit or discrete device planar salient point type base plate for packaging, the Ji Dao on it is the block of metal shape.It mainly has the following disadvantages:
1, encapsulating structure: chip Ji Dao is corresponding one by one, and requires the basic island size must be greater than chip size, and limitation is very big, is difficult to adapt to the chip of different size size and specification.
2, package reliability:, require high to the material of Ji Dao, evenness, surface quality, clean-up performance etc. because chip is installed on the Ji Dao; Simultaneously because block of metal Ji Dao is easy to generate bigger deformational stress after being heated, so integrity problem such as layering takes place easily, and along with chip size constantly increases, correspondingly can require bigger Ji Dao, the problems referred to above are just more and more serious.
3, packaging cost: along with chip design becomes increasingly complex, the chip size specification is also more and more diversified, the chip of super-long and super-wide constantly occurs, if change basic island size even need redesign lead frame fully along with the continuous variation of chip specification, with high costs.
4, specification requirement: constantly increase with basic island size, the parameters index on Ji Dao plane realizes that the specification requirement of stable control is more and more higher, is difficult to guarantee.
5, material consumption: constantly increase with basic island size, the chip packing-body overall weight rises, and is difficult to adapt to the compact developing direction of encapsulating products.
Summary of the invention:
The objective of the invention is to overcome above-mentioned deficiency, provide that a kind of encapsulating structure degree of freedom is big, package reliability good, encapsulation and specification requirement is low, material consumption is few integrated circuit or discrete device planar salient point type base plate for packaging and preparation method thereof.
The object of the present invention is achieved like this: a kind of integrated circuit or discrete device planar salient point type base plate for packaging, comprise Ji Dao and pin, it is characterized in that Ji Dao and pin are convex dot shape and are distributed in substrate front side, there is thin metal layer to link between salient point and the salient point, Ji Dao is the unit Ji Dao that a plurality of salient points are formed, pin is single salient point, the two positive of Ji Dao and pin or just, back of the body two sides is provided with metal level, in the single integrated circuit or Discrete device packaging body that when follow-up encapsulation, forms, the quantity of Ji Dao has one or more, be individual unit Ji Dao or a plurality of unit Ji Dao that a plurality of salient points are formed, pin arrangements is in one or both sides or three sides of Ji Dao, or be trapped among Ji Dao around form the structure of a circle or multi-turn pin.
Integrated circuit of the present invention or discrete device planar salient point type base plate for packaging, the two positive of described Ji Dao and pin or just, back of the body two sides is provided with the activating substance layer, is provided with metal level on the activating substance layer.
Integrated circuit of the present invention or discrete device planar salient point type base plate for packaging, described metal level are arranged on the part salient point in the base island, unit or on all salient points.
Integrated circuit of the present invention or discrete device planar salient point type base plate for packaging, described metal level are gold or silver or copper or tin or nickel or nickel palladium, and metal level is a single or multiple lift.
Integrated circuit of the present invention or discrete device planar salient point type base plate for packaging, described activating substance layer are nickel or palladium or nickel palladium layer.
The manufacture method of integrated circuit of the present invention or discrete device planar salient point type base plate for packaging is characterized in that the method includes the steps of:
Step 1, get a slice metal substrate,
Step 2, metal substrate just, the back of the body two sides stick mask layer separately,
Step 3, with metal substrate positive or just, the part mask on back of the body two sides gets rid of, and exposes the zone of preparing metal cladding on metal substrate,
Step 4, the zone of removing mask layer in the last process is plated metal level,
Step 5, remove the positive remaining mask of metal substrate, in order to exposing the zone that follow-up need etch partially,
Step 6, the zone of removing mask layer in the last process is etched partially, on metal substrate, forms the partially etching area of depression, form the pin of single convex dot shape and the unit Ji Dao that a plurality of salient point is formed simultaneously relatively,
Remaining mask on step 7, the removal metal substrate is made the special basic island of planar salient point type base plate for packaging.
The present invention before the zone of removal mask layer plates metal level in to last process, can plate the activating substance layer earlier in above-mentioned steps four.
Integrated circuit of the present invention or discrete device planar salient point type base plate for packaging and preparation method thereof, have strong adaptability, be convenient to production, with low cost, best in quality, reliability advantages of higher, get rid of puzzlement for follow-up solution repeats to revise base plate for packaging design to adapt in plurality of specifications chip, the encapsulation process in the packaging body problems such as easily layering, thereby optimized the product structure of electronic devices and components and lay a solid foundation for improving reliability of products intensity.Concrete advantage is:
1, encapsulating structure: relatively independent between chip and the basic island, there is not positive connection between basic island size and the chip size, the degree of freedom is bigger, can adapt to the chip of different size size and specification.
2, package reliability: become block of metal Ji Dao that single plane supports unit Ji Dao, discharged the deformational stress of being heated of block of metal Ji Dao better, thereby effectively reduced integrity problem such as layering into a plurality of salient point planar support; And because relatively independent between Ji Dao and the chip, Ji Dao can effectively strengthen the permission of chip, and Ji Dao need not constantly to increase along with the increase of chip size, thereby has reduced the risk of layering.
3, packaging cost: can adapt at present along with chip design becomes increasingly complex, the chip size specification is also more and more diversified, and the chip of the super-long and super-wide that constantly occurs, need not redesign lead frame or change basic island size, save cost, improved efficient, reduced risk.
4, specification requirement: be convenient to technology control, can adapt to the chip requirement of different size, reduce the technology harshness of designing and manufacturing technique to the parameters index of Ji Dao.
5, material consumption: the miniaturization of basic island, help economical with materials consumption, be fit to very much the compact developing direction of encapsulating products.
Description of drawings:
Fig. 1～7 are each process sequence diagram of the present invention.
Embodiment:
Embodiment 1:
Embodiment 1 structure chart 7 (a), Fig. 7 (a) is a kind of integrated circuit or discrete device planar salient point type base plate for packaging, basic island 1 on this base plate for packaging and pin 2 are convex dot shape and are distributed in substrate front side, there is thin metal layer 3 to link between salient point and the salient point, base island 1 is the unit Ji Dao that a plurality of salient points are formed, pin 2 is single salient point, the two front of base island 1 and pin 2 is provided with metal level 4, metal level 4 is a gold, or silver, or copper, or tin, or nickel, or nickel palladium, and metal level can be single or multiple lift, and metal level 4 can be located on the part salient point in the base island, unit or on all salient points.In the single integrated circuit or Discrete device packaging body that when follow-up encapsulation, forms, the quantity on base island 1 can have one or more, can think individual unit Ji Dao or a plurality of unit Ji Dao that a plurality of salient points are formed, pin 2 can be arranged in a side on basic island 1, also can be arranged in the both sides or three sides on basic island 1, or be trapped among the structure that forms a circle or multi-turn pin on every side on basic island 1.
Its manufacture method comprises following steps:
Step 1, get a slice metal substrate 6, as Fig. 1,
Step 2, metal substrate just, the back of the body two sides stick mask layer 7 separately, as Fig. 2,
Step 3, the part mask in metal substrate front is got rid of, exposed the zone of on metal substrate, preparing metal cladding, as Fig. 3 (a),
Step 4, the zone of removing mask layer in the last process is plated metal level 4, as Fig. 4 (a),
Step 5, the positive remaining mask of removal metal substrate, in order to expose the zone that follow-up need etch partially, as Fig. 5 (a),
Step 6, the zone of removing mask layer 71 in the last process is etched partially, on metal substrate, form the partially etching area of depression, form the pin 2 of single convex dot shape and the base island, unit 1 that a plurality of salient point is formed simultaneously relatively, as Fig. 6 (a),
Remaining mask on step 7, the removal metal substrate is made the special basic island of planar salient point type base plate for packaging.
Embodiment 2:
Embodiment 2 structures are shown in Fig. 7 (b), and it is on the basis of embodiment 1, are provided with metal level 4 at the two the back side of basic island 1 and pin 2.
Its manufacture method comprises following steps:
Step 1, with embodiment 1,
Step 2, with embodiment 1,
Step 3, with metal substrate 1 just, the part mask on back of the body two sides gets rid of, and exposes on metal substrate the zone of preparing metal cladding, as Fig. 3 (b),
Step 4, method are with embodiment 1, and figure sees Fig. 4 (b),
Step 5, method are with embodiment 1, and figure sees Fig. 5 (b),
Step 6, method are with embodiment 1, and figure sees Fig. 6 (b),
Step 7, method are with embodiment 1, and figure sees Fig. 7 (b).
Embodiment 3:
Embodiment 3 structures are shown in Fig. 7 (c), and it is on the basis of embodiment 1, are provided with activating substance layer 5 earlier in the two front of basic island 1 and pin 2, are provided with metal level 4 in activating substance layer 5 front again.Activating substance 5 is nickel or palladium or nickel palladium.
Its manufacture method comprises following steps:
Step 1, with embodiment 1,
Step 2, with embodiment 1,
Step 3, with embodiment 1,
Step 4, the zone of removing mask layer in the last process is plated activating substance layer 5 earlier as Fig. 4 (c), plate metal level 4 again, as Fig. 4 (e),
Step 5, method are with embodiment 1, and figure sees Fig. 5 (c),
Step 6, method are with embodiment 1, and figure sees Fig. 6 (c),
Step 7, method are with embodiment 1, and figure sees Fig. 7 (c).
Embodiment 4:
Embodiment 4 structures are shown in 7 (d), and it is on the basis of embodiment 2, are provided with activating substance layer 5 earlier at the two the back side of basic island 1 and pin 2, are provided with metal level 4 again on activating substance layer 5.
Its manufacture method comprises following steps:
Step 1, with embodiment 2,
Step 2, with embodiment 2,
Step 3, with embodiment 2,
Step 4, the zone of removing mask layer in the last process is plated activating substance layer 5 earlier as Fig. 4 (d), plate metal level 4 again, as Fig. 4 (f),
Step 5, method are with embodiment 2, and figure sees Fig. 5 (d),
Step 6, method are with embodiment 2, and figure sees Fig. 6 (d),
Step 7, method are with embodiment 2, and figure sees Fig. 7 (d).

Claims (9)

1, a kind of integrated circuit or discrete device planar salient point type base plate for packaging, comprise Ji Dao (1) and pin (2), it is characterized in that Ji Dao (1) and pin (2) are convex dot shape and are distributed in substrate front side, there is thin metal layer (3) to link between salient point and the salient point, Ji Dao (1) is the unit Ji Dao that a plurality of salient points are formed, pin (2) is single salient point, the two front of Ji Dao (1) and pin (2) is provided with metal level (4), in the single integrated circuit or Discrete device packaging body that when follow-up encapsulation, forms, the quantity of Ji Dao (1) has one or more, be individual unit Ji Dao or a plurality of unit Ji Dao that a plurality of salient points are formed, pin (2) is arranged in one or both sides or three sides of Ji Dao (1), or is trapped among the structure that forms a circle or multi-turn pin on every side of Ji Dao (1).
2, a kind of integrated circuit according to claim 1 or discrete device planar salient point type base plate for packaging is characterized in that the two the back side of Ji Dao (1) and pin (2) is provided with metal level (4).
3, a kind of integrated circuit according to claim 1 or discrete device planar salient point type base plate for packaging is characterized in that the two front of Ji Dao (1) and pin (2) is provided with activating substance layer (5), is provided with metal level (4) on activating substance layer (5).
4, a kind of integrated circuit according to claim 2 or discrete device planar salient point type base plate for packaging, it is characterized in that Ji Dao (1) and pin (2) the two just, the back of the body two sides be provided with activating substance layer (5), on activating substance layer (5), be provided with metal level (4).
5,, it is characterized in that described metal level (4) is arranged on the part salient point in the base island, unit or on all salient points according to claim 1 or 2,3,4 described a kind of integrated circuits or discrete device planar salient point type base plate for packaging.
6,, it is characterized in that described metal level (4) is gold or silver or copper or tin or nickel or nickel palladium, and metal level is a single or multiple lift according to claim 1 or 2,3,4 described a kind of integrated circuits or discrete device planar salient point type base plate for packaging.
7,, it is characterized in that activating substance layer (5) is nickel or palladium or nickel palladium layer according to claim 1 or 2,3,4 described a kind of integrated circuits or discrete device planar salient point type base plate for packaging.
8, the manufacture method of a kind of integrated circuit or discrete device planar salient point type base plate for packaging is characterized in that the method includes the steps of:
Step 1, get a slice metal substrate,
Step 2, metal substrate just, the back of the body two sides stick mask layer separately,
Step 3, with metal substrate positive or just, the part mask on back of the body two sides gets rid of, and exposes the zone of preparing metal cladding on metal substrate,
Step 4, the zone of removing mask layer in the last process is plated metal level,
Step 5, remove the positive remaining mask of metal substrate, in order to exposing the zone that follow-up need etch partially,
Step 6, the zone of removing mask layer in the last process is etched partially, on metal substrate, forms the partially etching area of depression, form the pin of single convex dot shape and the unit Ji Dao that a plurality of salient point is formed simultaneously relatively,
Step 7, removal metal substrate (6) are gone up remaining mask, make the planar salient point type base plate for packaging.
9, the manufacture method of a kind of integrated circuit according to claim 8 or discrete device planar salient point type base plate for packaging, it is characterized in that: in the described step 4, before the zone of removal mask layer plates metal level in to last process, plate the activating substance layer earlier.
CN 200610039920 2006-04-12 2006-04-12 Flat-face saliant-point type packing base-board for integrated circuit or discrete device Pending CN1851915A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200610039920 CN1851915A (en) 2006-04-12 2006-04-12 Flat-face saliant-point type packing base-board for integrated circuit or discrete device

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Application Number Priority Date Filing Date Title
CN 200610039920 CN1851915A (en) 2006-04-12 2006-04-12 Flat-face saliant-point type packing base-board for integrated circuit or discrete device

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101826502A (en) * 2010-04-28 2010-09-08 江苏长电科技股份有限公司 Island-exposed and submerged island-exposed type lead frame structure and method for sequentially etching and plating
CN102263070A (en) * 2011-06-13 2011-11-30 西安天胜电子有限公司 Wafer level chip scale packaging (WLCSP) piece based on substrate packaging
CN102263078A (en) * 2011-06-13 2011-11-30 西安天胜电子有限公司 WLCSP (Wafer Level Chip Scale Package) packaging component
CN110660681A (en) * 2018-06-28 2020-01-07 上海怡英新材料科技有限公司 Flip chip assembly and packaging method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101826502A (en) * 2010-04-28 2010-09-08 江苏长电科技股份有限公司 Island-exposed and submerged island-exposed type lead frame structure and method for sequentially etching and plating
CN101826502B (en) * 2010-04-28 2011-10-19 江苏长电科技股份有限公司 Island-exposed and submerged island-exposed type lead frame structure and method for sequentially etching and plating
CN102263070A (en) * 2011-06-13 2011-11-30 西安天胜电子有限公司 Wafer level chip scale packaging (WLCSP) piece based on substrate packaging
CN102263078A (en) * 2011-06-13 2011-11-30 西安天胜电子有限公司 WLCSP (Wafer Level Chip Scale Package) packaging component
CN110660681A (en) * 2018-06-28 2020-01-07 上海怡英新材料科技有限公司 Flip chip assembly and packaging method thereof

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