CN1841729A - 大电流三相整流电力电子器件模块 - Google Patents

大电流三相整流电力电子器件模块 Download PDF

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CN1841729A
CN1841729A CNA2005100386879A CN200510038687A CN1841729A CN 1841729 A CN1841729 A CN 1841729A CN A2005100386879 A CNA2005100386879 A CN A2005100386879A CN 200510038687 A CN200510038687 A CN 200510038687A CN 1841729 A CN1841729 A CN 1841729A
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silicon
insulation board
device module
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electronic device
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CN100499118C (zh
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陈兴忠
颜书芳
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139Silver (Ag) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract

一种大电流三相整流电力电子器件模块,所述硅二极管中的导体为软质导线,所述绝缘板为三层复合结构的DBC板,上、下层均为铜铝合金,既能导电又具有良好的可焊性,中间为绝缘层氮化铝,硅芯片和绝缘板之间通过若干根软质导线相连,软质导线的一端烧结在绝缘板的铜铝合金上,另一端烧结在硅芯片上;由于选用三层结构的DBC作绝缘板,既无毒性、绝缘性好,传热导热快,热膨胀系数又小,当通入大电流后,模块所产生的热量能较快地传导于铜质底座而散发,DBC绝缘板的变形量较小;用若干条软质导线取代整体式铜质导体,彻底消除硅芯片拉损现象,这种结构的三相整流电力电子器件模块的极限电流可达到2000A~3500A。

Description

大电流三相整流电力电子器件模块
技术领域
本发明涉及一种三相整流电力电子器件模块。
背景技术
目前普遍使用的三相整流电力电子器件模块的额定电流都在1000A以下,对于额定电流在1000A以上的大电流和3000A以上的特大电流三相整流模块还无法生产。现有1000A以下三相整流模块都包括六只硅二极管,它们按三相整流电路连接,如附图2所示连接方式,即由三组串联(ad、be、cf)后,再由abc三个二极管的阴极并联后得直流电源的正极,def三个二极管的阳极并联得直流电源的负极。每个硅二极管由铜质散热板、绝缘板、电极片、保护层钼片、硅芯片和导体组成,硅芯片、保护层钼片、电极片、绝缘板、铜质散热板之间均通过银锡烧结成一体,硅芯片和绝缘板之间通过整体的铜片导体刚性相连,绝缘板为上下面镀有镍层的氧化铍板,氧化铍不仅具有很强的毒性,常期接触对人体会造成伤害,而且它的膨胀系数与硅芯片相差很大,将氧化铍与硅芯片用刚性的导体通过焊接方式连接起来,当通入大电流受热后其变形量很大,极易拉损硅芯片,造成电压击穿,为了克服这一不足,人们特意在氧化铍上表面增设了能减少绝缘板受热变形量的保护层钼片,即使如此,能够增加的电流量有限,当通过的电流增加到1000A以上时,保护层钼片则不起作用,这种结构的三相整流电力电器件模块无法实现向大电流方向发展。束缚了三相整流电力电器件模块的应用范围,不适应现代电力电子工业的发展。
发明内容
本发明的发明目的在于提供一种大电流三相整流电力电子器件模块。本发明所述的大电流三相整流电力电子器件模块,包括六只硅二极管,按三相整流电路连接而成,每个硅二极管由铜质散热板1、绝缘板2、电极片3、保护层钼片4、硅芯片5和导体6组成,硅芯片5、保护层钼片4、电极片3、绝缘板2、铜质散热板1之间均通过银锡烧结成一体,所述导体6为软质导线,所述绝缘板2为DBC板,DBC板为铜铝合金、氮化铝、铜铝合金复合板材,它为三层结构,上下层均为铜铝合金21,中间为氮化铝绝缘层22,硅芯片5和绝缘板4之间通过若干根软质导线7相连,软质导线7的一端烧结在DBC板上层的铜铝合金21上,另一端烧结在硅芯片5上。
所述软质导线为银质线。
由于将绝缘板由氧化铍绝缘层改为三层结构的DBC,其中的绝缘层为氮化铝,它不仅具有优异的绝缘性能,而且无毒性,对人体不会产生任何伤害,DBC绝缘板上的铜铝合金不仅具有优良的导电传热性能,而且热膨胀系数小,当通入大电流受热后其变形量较小,同时具有优异的焊接性能;用若干条软质导线取代整体式铜片导体,能消除因绝缘板DBC受热后的变形量与硅芯片的变形量不一而拉损硅芯片的现象,两者间由软质导线来隔绝相互间的影响,这种结构的三相整流电力电子器件模块的能够承受的极限电流可达到2000A~3500A。
附图说明:
图1为三相整流电力电子器件模块的结构示意图;
图2为三相整流电路图;
图3为硅芯片的结构示意图;
图中:1-铜质散热板;2-绝缘板;3-电极片;4-保护层钼片;5-硅芯片;6-导体;
具体实施方式:
下面结合附图说明本发明的具体实施方式:
本发明所述的大电流三相整流电力电子器件模块,包括六只硅二极管,它们按三相整流电路连接而成,每个硅二极管由铜质散热板1、绝缘板2、电极片3、保护层钼片4、硅芯片5和导体6组成,硅芯片5、保护层钼片4、电极片3、绝缘板2、铜质散热板1之间均通过银锡烧结成一体,所述导体6为软质银丝导线,所述绝缘板2为DBC板,DBC板为铜铝合金、氮化铝、铜铝合金复合板材,它为三层复合结构,上、下层均为铜铝合金21,铜铝合金21既能导电又具有良好的可焊性,中间为氮化铝绝缘层22,硅芯片5和绝缘板4之间通过若干根软质银丝导线7相连,软质银丝导线7的一端烧结在绝缘板2的铜铝合金21上,另一端烧结在硅芯片5上。
在上例中,软质导线的材质也可用银合金。

Claims (2)

1、一种大电流三相整流电力电子器件模块,包括六只硅二极管,按三相整流电路连接而成,硅二极管由铜质散热板(1)、绝缘板(2)、电极片(3)、保护层钼片(4)、硅芯片(5)和导体(6)组成,硅芯片(5)、保护层钼片(4)、电极片(3)、绝缘板(2)、铜质散热板(1)之间均通过银锡烧结成一体,其特征是:所述导体(6)由若干根软质导线组成,所述绝缘板(2)为DBC板,DBC板为铜铝合金、氮化铝、铜铝合金复合板材,它为三层结构,上下层均为铜铝合金(21),中间为氮化铝绝缘层(22),硅芯片(5)和绝缘板(4)之间通过若干根软质导线(7)相连,软质导线(7)的一端烧结在DBC板上层的铜铝合金(21)上,另一端烧结在硅芯片(5)上。
2、根据权利要求1所述大电流三相整流电力电子器件模块,其特征是:软质导线(7)的材质为金属银或银合金。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101179055B (zh) * 2007-12-14 2010-10-06 江苏宏微科技有限公司 半导体功率模块及其散热方法
CN101630676B (zh) * 2009-04-02 2011-05-11 嘉兴斯达微电子有限公司 新型直接敷铜基板布局的绝缘栅双极性晶体管模块
CN102560488A (zh) * 2012-02-02 2012-07-11 天津大学 基于纳米银焊膏连接芯片的dbc基板表面处理工艺
CN103795272A (zh) * 2014-01-25 2014-05-14 嘉兴斯达半导体股份有限公司 一种三相整流桥功率模块

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101179055B (zh) * 2007-12-14 2010-10-06 江苏宏微科技有限公司 半导体功率模块及其散热方法
CN101630676B (zh) * 2009-04-02 2011-05-11 嘉兴斯达微电子有限公司 新型直接敷铜基板布局的绝缘栅双极性晶体管模块
CN102560488A (zh) * 2012-02-02 2012-07-11 天津大学 基于纳米银焊膏连接芯片的dbc基板表面处理工艺
CN103795272A (zh) * 2014-01-25 2014-05-14 嘉兴斯达半导体股份有限公司 一种三相整流桥功率模块

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Assignee: Changzhou Ruihua Power Electronic Devices Co., Ltd.

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