CN1828396A - LCD subassembly and thin film transistor substrate and testing method - Google Patents
LCD subassembly and thin film transistor substrate and testing method Download PDFInfo
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- CN1828396A CN1828396A CN 200610075430 CN200610075430A CN1828396A CN 1828396 A CN1828396 A CN 1828396A CN 200610075430 CN200610075430 CN 200610075430 CN 200610075430 A CN200610075430 A CN 200610075430A CN 1828396 A CN1828396 A CN 1828396A
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Abstract
Wherein, the LED unit comprises: multiple scanning lines and intersected data lines to form multiple pixel zones on substrate, at least one shorting bar with a first/second sub-odd scanning lines electric connected to the (m+1)th/(n+3)th scanning lines respectively, and one shorting bar with even scanning lines with a first/second sub-even scanning lines electric connected to the (o+2)th/(p+3)th scanning lines respectively (wherein, m, n, o, p = 0, 4, 8, 12,...).
Description
Technical field
The invention relates to a kind of liquid crystal display assembly (liquid crystal displaydevice), and be particularly relevant to a kind of short-circuit rods framework of the 4G3D of having design.
Background technology
Liquid crystal display assembly generally is made up of first substrate, second substrate and the liquid crystal that is filled between the two substrates.First figure is depicted as the part top view of first substrate of known liquid crystal display assembly.Generally speaking, be provided with a group sweep trace 1 and a group data line 2 on first substrate.Two adjacent sweep traces 1 and two adjacent data lines 2 define pixel (pixel) zone.Each pixel region, all be provided with thin film transistor (TFT) 3 (thin-film transistor, TFT) and pixel electrode (not being shown among the figure).And generally being provided with colored filter, second substrate (not being shown among the figure) is used for display color and common electrode (commonelectrode).
In the LCD processing procedure, aforesaid sweep trace, data line and thin film transistor (TFT) (TFT) or on-off element can be accumulated static.And the characteristic of thin film transistor (TFT) (TFT) or on-off element is and easily damages because of static, thereby causes the inhomogeneous demonstration of screen.In addition, data line also might thereby disconnect (disconnected), and the insulation course between data line and sweep trace also may be destroyed, thereby causes short circuit.Therefore, an end of sweep trace and data line generally is to be connected to short-circuit rods (shorting bar) 4,5,6,7 and 8, and by this, the static of invasion can dissipate by the effect of short-circuit rods.
The short-circuit rods of this known liquid crystal display assembly is to adopt the 2G3D design.Detailed speech, all sweep traces 1 are electrically connected at two short-circuit rods 4,5, and all data lines 2 are electrically connected at three short- circuit rods 6,7,8.Data line uses three different short-circuit rods, can test R, G, B picture, can block by this and examine visible defects, for example line defect, point defect etc. under R, G, B picture.
Figure 2 shows that the sequential chart (timingdiagrams) that the LCD that adopts the 2G3D design is carried out module testing, wherein A is the scan period of sweep trace.In the LCD that adopts 2G 3D design, because all sweep traces 1 only link to each other (that is connecting odd line interlace line and even number line sweep trace respectively) with two short-circuit rods 4,5, therefore all odd line interlace line or even number line sweep traces are to use same sequential control (referring to Fig. 2), thereby can't effectively detect the defective that short circuit between adjacent two odd line interlace lines or the even number line sweep trace (for example because scratch or the residual gold of line) is caused.
Summary of the invention
Therefore, fundamental purpose of the present invention is to provide a kind of liquid crystal display assembly with preferable short-circuit rods design, and it can overcome or improve aforementioned prior art problems at least.
For reaching above-mentioned and other purpose, LCD assembly according to the present invention comprises multi-strip scanning line and data line, at least one odd-numbered scan lines short-circuit rods and at least one even-line interlace line short-circuit rods that is arranged on the substrate.These data linear systems and these sweep traces intersect, in order to form a plurality of pixel regions.This odd-numbered scan lines short-circuit rods has the first sub-odd-numbered scan lines short-circuit rods, is electrically connected at (m+1) the bar sweep trace and the second sub-odd-numbered scan lines short-circuit rods, is electrically connected at (n+3) bar sweep trace, wherein, m, n=0,4,8,12 ...This even-line interlace line short-circuit rods has the first sub-even-line interlace line short-circuit rods, is electrically connected at (o+2) the bar sweep trace and the second sub-even-line interlace line short-circuit rods, is electrically connected at (p+4) bar sweep trace, wherein, o, p=0,4,8,12 ...
In the LCD that adopts short-circuit rods design of the present invention, because all even-line interlace lines are divided into two groups and link to each other with two strip even-line interlace line short-circuit rods respectively, and all odd-numbered scan lines also are divided into two groups and link to each other with two strip odd-numbered scan lines short-circuit rods respectively, therefore all adjacent two odd line interlace lines or even number line sweep trace can use different sequential to control, and just can effectively detect the defective that short circuit between adjacent two odd-numbered scan lines or the even-line interlace line (for example because of scratch or the residual gold of line) is caused by this.
In addition, because all data lines are divided into three groups by the color that shows according to its desire, distinctly be connected to three data line short-circuit rods, therefore adopt LCD that the present invention designs when carrying out module testing, just can by with the synchronizing signal of sweep trace, to three different signals of data line short-circuit rods input of data line, and when module testing, show R, G, B picture, can effectively detect the defective that shows that the short circuit of different colours data line is caused by this.
For reaching above-mentioned and other purpose, according to a kind of thin film transistor base plate of the present invention, comprise: the multi-strip scanning line is to be arranged on the substrate; Many data lines are to be arranged on this substrate, and these data lines are to intersect with these sweep traces, and in order to form a plurality of pixel regions, respectively this pixel region has L sub-pixel, and wherein L is greater than zero positive integer; At least one thin film transistor (TFT) is to be arranged at respectively in this sub-pixel, and this thin film transistor (TFT) is electrically connected at one of them of these adjacent sweep traces and one of them of adjacent these data lines; At least one odd-numbered scan lines short-circuit rods, be to be arranged on this substrate, this odd-numbered scan lines short-circuit rods has the first sub-odd-numbered scan lines short-circuit rods, is electrically connected at (m+1) the bar sweep trace and the second sub-odd-numbered scan lines short-circuit rods, is electrically connected at (n+3) bar sweep trace, wherein, m, n=0,4,8,12, At least one even-line interlace line short-circuit rods, be to be arranged on this substrate, this even-line interlace line short-circuit rods has the first sub-even-line interlace line short-circuit rods, is electrically connected at (o+2) the bar sweep trace and the second sub-even-line interlace line short-circuit rods, is electrically connected at (p+4) bar sweep trace, wherein, o, p=0,4,8,12 ...
For reaching above-mentioned and other purpose, according to a kind of method of the present invention in order to the testing liquid crystal display assembly, this liquid crystal display assembly has multi-strip scanning line and data line, be electrically connected at the first sub-odd-numbered scan lines short-circuit rods of (m+1) bar sweep trace, be electrically connected at the second sub-odd-numbered scan lines short-circuit rods of (n+3) bar sweep trace, be electrically connected at first sub-even-line interlace line short-circuit rods of (o+2) bar sweep trace and the second sub-even-line interlace line short-circuit rods that is electrically connected at (p+4) bar sweep trace, m, n=0,4,8,12, and o, p=0,4,8,12,, this method comprises: first sweep signal is put on the first sub-odd-numbered scan lines short-circuit rods, and send first data-signal synchronously in corresponding data line, second sweep signal is put on the second sub-odd-numbered scan lines short-circuit rods then, and send this first data-signal synchronously in corresponding data line; And the 3rd sweep signal put on the first sub-even-line interlace line short-circuit rods, and send second data-signal synchronously in corresponding data line, then the 4th sweep signal is put on the second sub-even-line interlace line short-circuit rods, and send this second data-signal synchronously in corresponding data line.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Fig. 1: the part top view of first substrate of known liquid crystal display assembly;
The LCD of Fig. 2: Fig. 1 is carried out the sequential chart of module testing;
Fig. 3: the part top view of first substrate of LCD assembly according to an embodiment of the invention; And
The LCD of Fig. 4: Fig. 3 is carried out the sequential chart of module testing.
[primary clustering label declaration]
1 sweep trace, 2 data lines
3 thin film transistor (TFT)s, 4,5,6,7,8 short-circuit rods
100 first substrates, 110 sweep traces
112 contact mats, 120 data lines
122 contact mats, 200 second substrates
130 odd-numbered scan lines short-circuit rods
132 first sub-odd-numbered scan lines short-circuit rods
134 second sub-odd-numbered scan lines short-circuit rods
140 even-line interlace line short-circuit rods
142 first sub-even-line interlace line short-circuit rods
144 second sub-odd-numbered scan lines short-circuit rods
170a, 170b, 170c data line short-circuit rods
A, B scan period
G
1, G
2, G
3, G
4The sweep trace testing cushion
R, G, B data line testing cushion
Embodiment
The invention relates to a kind of LCD assembly with the design of preferable short-circuit rods, it mainly is made up of first substrate, second substrate and the liquid crystal that is filled between the two substrates.This substrate can be glass substrate, flexible base plate or light tight substrate.Be provided with pixel (pixel) zone of a plurality of arranged on this first substrate, it is provided with on-off element (switching element) (for example thin film transistor (TFT) (TFT)) and pixel electrode; And second substrate generally is provided with and is used for the colored filter and the common electrode (common electrode) of display color.Generally speaking, this first substrate is called as thin film transistor base plate, and this second substrate is called as colored optical filtering substrates because it is provided with colored filter.Generally be provided with distance piece (spacer) (not being shown among the figure) between this two substrates in order to defining the interval (gap) between this two substrates, and the surface of this two substrates is to attach polaroid respectively, in order to the visible light polarization.Figure 3 shows that the part top view of first substrate 100 of LCD assembly according to an embodiment of the invention, it is greater than second substrate 200 shown in the dotted line; After the cutting of CT line, the part outside the CT line will be dropped.At first substrate 100 is to be provided with multi-strip scanning line (scan line) 110 and many data lines (data line) 120.Though be not shown among the figure, these sweep traces 110 and data line 120 are insulated from each other by inner insulating layer (not illustrating).In addition, viewing area (display region) is that interlaced area by sweep trace 110 and data line 120 constitutes.These data lines 120 are to intersect with these sweep traces 110 to form a plurality of pixel regions, and respectively this pixel region has L sub-pixel, and wherein L is the positive integer greater than zero.In an embodiment of the present invention, sub-pixel means the block that two adjacent door lines, two adjacent data line and corresponding colored filters are defined.When colored filter (not being shown among the figure) comprises redness, green during with blue three kinds (that is L=3), sub-pixel is express red, green and blueness respectively, so is defined as red pieces pixel, green sub-pixel and blue sub-pixel.
Though be not shown among the figure, be understandable that, in each subpixel area, all be provided with thin film transistor (TFT) (TFT) as on-off element (switching element) and the pixel electrode that forms by transparency electrode (for example iridium tin-oxide (ITO)).When sweep signal input scan line, thin film transistor (TFT) will be opened and the signal of video signal (video signal) of data line will be sent into pixel electrode via itself.
Before cutting, as shown in Figure 3, should be in order to odd-numbered scan lines short-circuit rods 130 as the static counterattacking measure, even-line interlace line short-circuit rods 140 and data line short-circuit rods 170a, 170b, 170c are provided in a side of the periphery of sweep trace 110 and data line 120.Preferably, can be connected to each other by capacitor (not being shown among the figure) between these short-circuit rods.These short-circuit rods can be avoided damaging (terminal breakage) because of the static contact mat that (static spark) cause that sparks.These short-circuit rods are respectively equipped with sweep trace testing cushion G
1, G
2, G
3, G
4Test in order to be connected with data line testing cushion R, G, B with power supply.
As shown in Figure 3, sweep trace 110 according to the present invention can have contact mat (terminal) 112 in order to be connected to grid-driving integrated circuit (gate drive IC) (not being shown among the figure).According to data line 120 of the present invention, the one end is to form contact mat (terminal) 122 in order to be connected to data-driven integrated circuit (data drive IC) (not being shown among the figure).Because embodiment shown in Figure 3 is the design (that is L=3 (RGB)) that each pixel region of employing has three sub-pixels, so the other end of those data lines 120 is connected to three data line short-circuit rods 170a, 170b, 170c respectively.Detailed speech, these three data line short-circuit rods 170a, 170b, 170c be connected to the respectively (3 * r)+1, (3 * r)+2, (data line 3 * r)+3, wherein r is zero or positive integer.For example, data line short-circuit rods 170a is connected to the 1st, 4,7 ... the bar data line.Data line short-circuit rods 170b is connected to the 2nd, 5,8 ... the bar data line.Data short-circuit line bar 170c is connected to the 3rd, 6,9 ... the bar data line.
Be understandable that, though embodiment shown in Figure 3 is the example that is designed to of L=3 (RGB), the present invention also can be applicable to L=4 (as RGBW, RGBR, RGBB ... Deng), L=5 (RGBWB, RGBWR, RGBWY ... Deng), L=6 (RGBWYK ... Deng) design.Therefore the present invention is provided with q data line short-circuit rods on this substrate, and this q data line short-circuit rods be connected to the respectively (q * r)+1, (q * r)+2, (q * r)+3 ..., (q * r)+q bar data line, wherein, q=L, and r is zero or positive integer.
It should be noted that, in LCD assembly shown in Figure 3, (m+1) bar sweep trace is electrically connected at the first sub-odd-numbered scan lines short-circuit rods 132 of this odd-numbered scan lines short-circuit rods 130, and (n+3) bar sweep trace is electrically connected at the second sub-odd-numbered scan lines short-circuit rods 134 of this odd-numbered scan lines short-circuit rods 130, wherein, and m, n=0,4,8,12, (o+2) bar sweep trace is electrically connected at the first sub-even-line interlace line short-circuit rods 142 of this even-line interlace line short-circuit rods 140, and (p+4) bar sweep trace is electrically connected at the second sub-odd-numbered scan lines short-circuit rods 144 of this odd-numbered scan lines short-circuit rods 140, wherein, m, n=0,4,8,12 ...For example, this first sub-odd-numbered scan lines short-circuit rods 132 is electrically connected at the 1st, 5,9 ... the bar sweep trace, this second sub-odd-numbered scan lines short-circuit rods 134 is electrically connected at the 3rd, 7,11 ... the bar sweep trace, and this first sub-even-line interlace line short-circuit rods 142 is electrically connected at the 2nd, 6,10 ... the bar sweep trace, and this second sub-odd-numbered scan lines short-circuit rods 144 is electrically connected at the 4th, 8,12 ... the bar sweep trace.
Figure 4 shows that the sequential chart (timing diagrams) that the LCD that adopts the present invention's design is carried out module testing, wherein B is the scan period of sweep trace, and embodiments of the invention are to be example with B=2A (A is the scan period of commonly using sweep trace in the design).Certainly, B=1.5A, B=2.5A also applicable it, just, B=nA, n are the natural number greater than 1.In the LCD that adopts short-circuit rods design of the present invention, because all even-line interlace lines are divided into two groups and link to each other with two strip even-line interlace line short-circuit rods respectively, and all odd-numbered scan lines also are divided into two groups and link to each other with two strip odd-numbered scan lines short-circuit rods respectively, therefore all adjacent two odd line interlace lines or even number line sweep trace can use different sequential to control (referring to Fig. 4), just can effectively detect the defective that short circuit between adjacent two odd-numbered scan lines or the even-line interlace line (for example because of scratch or the residual gold of line) is caused by this.
In addition, because all data lines are divided into three groups by the color that shows according to its desire, distinctly be connected to three data line short-circuit rods, therefore adopt LCD that the present invention designs when carrying out module testing, just can by with the synchronizing signal of sweep trace, to three different signals of data line short-circuit rods input of data line, and when module testing, show R, G, B picture, can effectively detect the defective that shows that the short circuit of different colours data line is caused by this.
A kind of method in order to test foregoing liquid crystal display assembly is described in down:
At first, sweep signal is put on the first sub-odd-numbered scan lines short-circuit rods 132 (that is on (m+1) bar sweep trace 110), and send data-signal synchronously in corresponding data line 120.Then, (m+1) bar sweep trace 110 finished scanning after, sweep signal is put on the second sub-odd-numbered scan lines short-circuit rods 134 (that is on (n+3) bar sweep trace 110), and sends data-signal synchronously in corresponding data line 120.Because (m+1) bar sweep trace 110 and (n+3) bar sweep trace are all odd-numbered scan lines, therefore, the data-signal that (n+3) bar sweep trace is sent is also identical with (m+1) bar sweep trace.
Finish after the odd-numbered scan lines scanning, similarly, sweep signal is added to respectively on the first sub-even-line interlace line short-circuit rods 142 (that is (o+2) bar sweep trace 110) and the second sub-even-line interlace line short-circuit rods 144 (that is (p+4) bar sweep trace) sequentially, and sends the required data-signal of even-line interlace line synchronously.One-period B finishes the single pass to all sweep traces on the LCD assembly like this, reaches the purpose that picture shows.
Though the present invention discloses as above with embodiment; right its is not in order to qualification the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.
Claims (11)
1. liquid crystal display assembly comprises:
The multi-strip scanning line is to be arranged on the substrate;
Many data lines are to be arranged on this substrate, and these data lines are to intersect with these sweep traces, and in order to form a plurality of pixel regions, respectively this pixel region has L sub-pixel, and wherein L is greater than zero positive integer;
At least one odd-numbered scan lines short-circuit rods, be to be arranged on this substrate, this odd-numbered scan lines short-circuit rods has the first sub-odd-numbered scan lines short-circuit rods, is electrically connected at (m+1) the bar sweep trace and the second sub-odd-numbered scan lines short-circuit rods, is electrically connected at (n+3) bar sweep trace, wherein, m, n=0,4,8,12 ...;
At least one even-line interlace line short-circuit rods, be to be arranged on this substrate, this even-line interlace line short-circuit rods has the first sub-even-line interlace line short-circuit rods, is electrically connected at (o+2) the bar sweep trace and the second sub-even-line interlace line short-circuit rods, is electrically connected at (p+4) bar sweep trace, wherein, o, p=0,4,8,12 ....
2. liquid crystal display assembly according to claim 1 also comprises:
Q data line short-circuit rods is to be formed on this substrate, and this q data line short-circuit rods be connected to the respectively (q * r)+1, (q * r)+2, (q * r)+3..., (q * r)+q bar data line, wherein, q=L, and r is zero or positive integer.
3. liquid crystal display assembly according to claim 1, wherein respectively this sweep trace has contact mat, in order to be connected to grid-driving integrated circuit.
4. liquid crystal display assembly according to claim 1, wherein respectively this data line has contact mat, in order to be connected to data-driven integrated circuit.
5. liquid crystal display assembly according to claim 1, wherein, this substrate comprises glass substrate, flexible base plate or light tight substrate.
6. thin film transistor base plate comprises:
The multi-strip scanning line is to be arranged on the substrate;
Many data lines are to be arranged on this substrate, and these data lines are to intersect with these sweep traces, and in order to form a plurality of pixel regions, respectively this pixel region has L sub-pixel, and wherein L is greater than zero positive integer;
At least one thin film transistor (TFT) is to be arranged at respectively in this sub-pixel, and this thin film transistor (TFT) is electrically connected at one of them of these adjacent sweep traces and one of them of adjacent these data lines;
At least one odd-numbered scan lines short-circuit rods, be to be arranged on this substrate, this odd-numbered scan lines short-circuit rods has the first sub-odd-numbered scan lines short-circuit rods, is electrically connected at (m+1) the bar sweep trace and the second sub-odd-numbered scan lines short-circuit rods, is electrically connected at (n+3) bar sweep trace, wherein, m, n=0,4,8,12 ...;
At least one even-line interlace line short-circuit rods, be to be arranged on this substrate, this even-line interlace line short-circuit rods has the first sub-even-line interlace line short-circuit rods, is electrically connected at (o+2) the bar sweep trace and the second sub-even-line interlace line short-circuit rods, is electrically connected at (p+4) bar sweep trace, wherein, o, p=0,4,8,12 ....
7. thin film transistor base plate according to claim 6 also comprises:
Q data line short-circuit rods is to be formed on this substrate, and this q data line short-circuit rods be connected to the respectively (q * r)+1, (q * r)+2, (q * r)+3..., (q * r)+q bar data line, wherein, q=L, and r is zero or positive integer.
8. thin film transistor base plate according to claim 6, wherein respectively this sweep trace has contact mat, in order to be connected to grid-driving integrated circuit.
9. thin film transistor base plate according to claim 6, wherein respectively this data line has contact mat, in order to be connected to data-driven integrated circuit.
10. thin film transistor base plate according to claim 6, wherein, this substrate comprises glass substrate, flexible base plate or light tight substrate.
11. method in order to the testing liquid crystal display assembly, this liquid crystal display assembly has multi-strip scanning line and data line, be electrically connected at the first sub-odd-numbered scan lines short-circuit rods of (m+1) bar sweep trace, be electrically connected at (n+3) bar sweep trace the second sub-odd-numbered scan lines short-circuit rods, be electrically connected at first sub-even-line interlace line short-circuit rods of (o+2) bar sweep trace and the second sub-even-line interlace line short-circuit rods that is electrically connected at (p+4) bar sweep trace, m, n=0,4,8,12, ..., and o, p=0,4,8,12, ..., this method comprises:
First sweep signal is put on the first sub-odd-numbered scan lines short-circuit rods, and send first data-signal synchronously in corresponding data line, second sweep signal is put on the second sub-odd-numbered scan lines short-circuit rods then, and send this first data-signal synchronously in corresponding data line; And
The 3rd sweep signal is put on the first sub-even-line interlace line short-circuit rods, and send second data-signal synchronously in corresponding data line, then the 4th sweep signal is put on the second sub-even-line interlace line short-circuit rods, and send this second data-signal synchronously in corresponding data line.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100754305A CN100388108C (en) | 2006-04-14 | 2006-04-14 | LCD subassembly and thin film transistor substrate and testing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100754305A CN100388108C (en) | 2006-04-14 | 2006-04-14 | LCD subassembly and thin film transistor substrate and testing method |
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| CN1828396A true CN1828396A (en) | 2006-09-06 |
| CN100388108C CN100388108C (en) | 2008-05-14 |
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Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100281058B1 (en) * | 1997-11-05 | 2001-02-01 | 구본준, 론 위라하디락사 | Liquid Crystal Display |
| JP3093739B2 (en) * | 1997-12-05 | 2000-10-03 | 三星電子株式会社 | Liquid crystal display device, its manufacturing method and defect inspection method |
| KR100443539B1 (en) * | 2002-04-16 | 2004-08-09 | 엘지.필립스 엘시디 주식회사 | A array substrate for Liquid crystal display and method for fabricating the same |
| KR101209050B1 (en) * | 2005-02-22 | 2012-12-06 | 삼성디스플레이 주식회사 | Liquid crystal display and test method thereof |
| CN100547471C (en) * | 2005-07-05 | 2009-10-07 | 友达光电股份有限公司 | LCD TEST circuit and method of testing |
-
2006
- 2006-04-14 CN CNB2006100754305A patent/CN100388108C/en not_active Expired - Fee Related
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| CN103309065A (en) * | 2013-06-06 | 2013-09-18 | 深圳市华星光电技术有限公司 | Test circuit of display panel and test method thereof |
| CN105866989A (en) * | 2016-06-16 | 2016-08-17 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| WO2017215058A1 (en) * | 2016-06-16 | 2017-12-21 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| US10365521B2 (en) | 2016-06-16 | 2019-07-30 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Array substrate and liquid crystal display panel |
| CN106405899A (en) * | 2016-11-30 | 2017-02-15 | 深圳市华星光电技术有限公司 | Testing structure and testing method of liquid crystal display panel |
| CN106405899B (en) * | 2016-11-30 | 2019-09-20 | 深圳市华星光电技术有限公司 | The test structure and test method of liquid crystal display panel |
| CN112967642A (en) * | 2020-01-08 | 2021-06-15 | 重庆康佳光电技术研究院有限公司 | Rapid test circuit and test system of LED display panel |
| CN112882263A (en) * | 2021-03-11 | 2021-06-01 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
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