CN1768326A - Configurable multi-step linear feedback shift register - Google Patents
Configurable multi-step linear feedback shift register Download PDFInfo
- Publication number
- CN1768326A CN1768326A CN200480009166.4A CN200480009166A CN1768326A CN 1768326 A CN1768326 A CN 1768326A CN 200480009166 A CN200480009166 A CN 200480009166A CN 1768326 A CN1768326 A CN 1768326A
- Authority
- CN
- China
- Prior art keywords
- lfsr
- matrix
- state
- during
- feedback shift
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011159 matrix material Substances 0.000 claims abstract description 118
- 239000013598 vector Substances 0.000 claims abstract description 53
- 230000014509 gene expression Effects 0.000 claims abstract description 49
- 230000007704 transition Effects 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 13
- 238000013178 mathematical model Methods 0.000 description 13
- 230000003111 delayed effect Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 3
- 230000002349 favourable effect Effects 0.000 description 3
- 238000000354 decomposition reaction Methods 0.000 description 2
- 239000004615 ingredient Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 239000003550 marker Substances 0.000 description 1
- 230000008672 reprogramming Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Complex Calculations (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Logic Circuits (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Shift Register Type Memory (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03100935 | 2003-04-08 | ||
EP03100935.0 | 2003-04-08 | ||
PCT/IB2004/050362 WO2004090714A2 (en) | 2003-04-08 | 2004-03-30 | Configurable multi-step linear feedback shift register |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1768326A true CN1768326A (en) | 2006-05-03 |
CN1768326B CN1768326B (en) | 2010-06-16 |
Family
ID=33155214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200480009166.4A Expired - Lifetime CN1768326B (en) | 2003-04-08 | 2004-03-30 | Configurable multi-step linear feedback shift register |
Country Status (7)
Country | Link |
---|---|
US (1) | US7702706B2 (en) |
EP (1) | EP1614028B1 (en) |
JP (1) | JP4436830B2 (en) |
CN (1) | CN1768326B (en) |
AT (1) | ATE396448T1 (en) |
DE (1) | DE602004013950D1 (en) |
WO (1) | WO2004090714A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8176394B2 (en) | 2008-04-11 | 2012-05-08 | Mediatek Inc. | Linear feedback shift register structure and method |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB0614157D0 (en) * | 2006-07-17 | 2006-08-23 | Ttp Communications Ltd | LFSR emulation |
US8464141B2 (en) * | 2008-08-13 | 2013-06-11 | Infineon Technologies Ag | Programmable error correction capability for BCH codes |
JP5267038B2 (en) * | 2008-10-20 | 2013-08-21 | 富士通株式会社 | Linear feedback shift calculation device, communication device, microprocessor, and data output method in linear feedback shift calculation device |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2620069B2 (en) * | 1986-10-09 | 1997-06-11 | クラリオン株式会社 | Spread spectrum communication system |
US5412665A (en) * | 1992-01-10 | 1995-05-02 | International Business Machines Corporation | Parallel operation linear feedback shift register |
US5365588A (en) * | 1993-03-12 | 1994-11-15 | Hughes Aircraft Company | High speed encryption system and method |
US5987056A (en) * | 1997-11-13 | 1999-11-16 | Lsi Logic Corporation | PN sequence hopping method and system |
US6173009B1 (en) * | 1998-12-29 | 2001-01-09 | Texas Instruments Incorporated | State calculation circuit for discrete linear state space model |
US6640236B1 (en) * | 1999-08-31 | 2003-10-28 | Qualcomm Incorporated | Method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel |
US6282230B1 (en) * | 1999-09-23 | 2001-08-28 | Texas Instruments Incorporated | Block pseudo-noise generating circuit |
US6594680B1 (en) * | 1999-12-30 | 2003-07-15 | Texas Instruments Incorporated | Psuedo-random noise sequence generating system |
-
2004
- 2004-03-30 WO PCT/IB2004/050362 patent/WO2004090714A2/en active IP Right Grant
- 2004-03-30 AT AT04724336T patent/ATE396448T1/en not_active IP Right Cessation
- 2004-03-30 DE DE602004013950T patent/DE602004013950D1/en not_active Expired - Lifetime
- 2004-03-30 US US10/552,048 patent/US7702706B2/en active Active
- 2004-03-30 EP EP04724336A patent/EP1614028B1/en not_active Expired - Lifetime
- 2004-03-30 CN CN200480009166.4A patent/CN1768326B/en not_active Expired - Lifetime
- 2004-03-30 JP JP2006506793A patent/JP4436830B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8176394B2 (en) | 2008-04-11 | 2012-05-08 | Mediatek Inc. | Linear feedback shift register structure and method |
Also Published As
Publication number | Publication date |
---|---|
WO2004090714A3 (en) | 2005-01-20 |
EP1614028B1 (en) | 2008-05-21 |
EP1614028A2 (en) | 2006-01-11 |
US20060269037A1 (en) | 2006-11-30 |
DE602004013950D1 (en) | 2008-07-03 |
ATE396448T1 (en) | 2008-06-15 |
WO2004090714A2 (en) | 2004-10-21 |
CN1768326B (en) | 2010-06-16 |
JP4436830B2 (en) | 2010-03-24 |
JP2006526861A (en) | 2006-11-24 |
US7702706B2 (en) | 2010-04-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: NXP CO., LTD. Free format text: FORMER OWNER: KONINKLIJKE PHILIPS ELECTRONICS N.V. Effective date: 20071012 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20071012 Address after: Holland Ian Deho Finn Applicant after: NXP B.V. Address before: Holland Ian Deho Finn Applicant before: Koninklijke Philips Electronics N.V. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160914 Address after: Stockholm Patentee after: Telefonaktiebolaget LM Ericsson (publ) Address before: Stockholm Patentee before: Ericsson, Inc. Effective date of registration: 20160914 Address after: Stockholm Patentee after: Ericsson, Inc. Address before: Swiss Grand saconnex Patentee before: ST-ERICSSON S.A. Effective date of registration: 20160914 Address after: Swiss Grand saconnex Patentee after: ST-ERICSSON S.A. Address before: Swiss Prang Eli Ute Jean Deferre at No. 39 Patentee before: Italian-French Ericsson Limited (in liquidation) Effective date of registration: 20160914 Address after: Swiss Prang Eli Ute Jean Deferre at No. 39 Patentee after: Italian-French Ericsson Limited (in liquidation) Address before: Holland Ian Deho Finn Patentee before: NXP B.V. |
|
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20100616 |