CN1763822A - TV set LCD time sequence controlling method during open - Google Patents
TV set LCD time sequence controlling method during open Download PDFInfo
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- CN1763822A CN1763822A CN 200510021865 CN200510021865A CN1763822A CN 1763822 A CN1763822 A CN 1763822A CN 200510021865 CN200510021865 CN 200510021865 CN 200510021865 A CN200510021865 A CN 200510021865A CN 1763822 A CN1763822 A CN 1763822A
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Abstract
The invention discloses a TV LCD sequential control method when opening a terminal, which comprises the following steps: 1) when the main control microprocessor receives the signal of opening a terminal, it will send control signal to start the relative signal of LCD activation circuit; 2) the main control microprocessor starts the negative phototropic mode group power of LCD display after the LCD activation circuit receives the normal LVDS signal, which prevents the confused screen due to LVDS signal disorder.
Description
[technical field]
The present invention relates to LCD TV, be specifically related to LCD TV start sequential control method.
[background technology]
During the start of current LCD TV normally: power supply is provided for simultaneously the driving circuit of module backlight and LCDs.But the Low Voltage Differential Signal when just starting shooting (LVDS signal) is unsettled, and the clock signal chaotic in the LVDS signal if do not shielded on the drive plate that directly is sent to liquid crystal display, will make the driving circuit of LCDs can't operate as normal.When the driving circuit cisco unity malfunction of LCDs, LCDs does not receive normal orderly data-signal, the phenomenon of screen " flower screen " will occur, and promptly whole screen is various colored vertical bars and do not disappear, normally display image signals.
[summary of the invention]
The present invention has overcome shortcoming of the prior art, and a kind of LCD TV start sequential control method is provided.
Technical scheme of the present invention is a kind of TV set LCD time sequence controlling method during open, in turn include the following steps: 1) after receiving starting-up signal, main control microprocessor sends control signal, open the coherent signal of the driving circuit of LCD, 2) open the power supply of backlight liquid crystal display module then by main control microprocessor.
Owing to adopted above scheme, after receiving starting-up signal, after the driving circuit for the treatment of liquid crystal television screen received normal LVDS signal, this moment, the waveform of output was normal, open the module backlight of liquid crystal television screen again, so just cannot see because the flower screen that LVDS signal chaotic is produced.
[description of drawings]
Fig. 1 is a circuit diagram of the present invention;
Fig. 2 is a sequential control schematic flow sheet of the present invention;
Fig. 3 is a sequential synoptic diagram of the present invention.
[embodiment]
Also the present invention is described in further detail in conjunction with the accompanying drawings below by specific embodiment.As shown in Figure 1, Q1 is a NPN type triode; U2 is an enhancement mode P-channel field-effect transistor (PEFT) pipe; PLANE DRIVE is the driving circuit of LCDs; PLANE INVERTER is the LCD screen backlight module; CPU is that main control microprocessor TSU6666 is a signal processing controller, can become the LVDS signal to R, G, B conversion of signals.
As shown in figures 1 and 3, send starting-up signal after, main control microprocessor CPU output high level is opened the power supply of the driving circuit of LCD, behind the elapsed time T1, power supply is basicly stable.Stable back of power supply and process T2 open the output of low-voltage differential (LVDS) signal by signal processing controller TSU6666 after the time; T5 after opening the output of LVDS signal is opened the power supply of backlight liquid crystal display module by main control microprocessor in the time.Wherein the time span of T1, T2 and T5 can be with reference to following table:
| Parameter | Minimum value | Maximal value | Unit |
| T1 | 0 | 30 | Millisecond |
| T2 | 0 | 50 | Millisecond |
| T5 | 1000 | 0 | Millisecond |
As Fig. 1, Fig. 2 and shown in Figure 3, after the power-on, be not the drive circuitry of at once giving LCDs, but the time-delay power supply.When CPU detects stable or screen menu type regulative mode (the on screen display of input signal, abbreviation OSD) normal back time-delay is 50 milliseconds, open the power supply of the driving circuit of LCD by main control microprocessor, specific as follows: the high level of exporting 5V by the I/O mouth of main control microprocessor CPU, after R18 and R21 dividing potential drop, the base stage of Q1 obtains the high level of 2.5V.This moment Q1 the equal positively biased of emitter and collector, voltage is very little between each utmost point, and electric current is bigger, shows as low resistive state, approximate short circuit between each utmost point, triode Q1 saturation conduction.The collector of Q1 is 0.3V at this moment, and promptly the 4th pin grid level of field effect pipe U2 is 0.3V, and then the voltage U gs between the grid source of field effect transistor U2 is-11.7V.Field effect transistor U2 is an enhancement mode P-channel field-effect transistor (PEFT) pipe, does not have conducting channel between Ugs=OV hourglass source electrode, when Ugs＜-just conducting channel might appear during 0.7V.When the voltage U gs between the grid source of field effect pipe U2 be-during 11.7V, the U2 conducting.The voltage of the drain electrode output 12V of U2 is given the driving circuit of LCDs.Give the driving circuit of LCDs by serial data bus (SDA) and serial clock bus (SCL) control signal processor TSU6666 output low-voltage differential (LVDS) signal in the 20-50 millisecond behind the I/O mouth output 5V of main control microprocessor CPU high level.Driving circuit in LCDs received low-voltage differential (LVDS) signal after 1 second, the high level of main control microprocessor CPU the 2nd I/O mouth output 5V, remove to open the power supply of the module backlight (PLANEINVERTER) of LCDs, the point brightness liquid crystal display screen has been started shooting like this with regard to the normal display image of energy.
Claims (6)
1. TV set LCD time sequence controlling method during open, it is characterized in that: in turn include the following steps: 1) after receiving starting-up signal, main control microprocessor sends control signal, open the coherent signal of the driving circuit of LCD, 2) open the power supply of backlight liquid crystal display module then by main control microprocessor.
2. TV set LCD time sequence controlling method during open according to claim 1 is characterized in that: described step 2) in turn include the following steps: the power supply 2b that 2a) is opened the driving circuit of LCD earlier by main control microprocessor) open Low Voltage Differential Signal output by main control microprocessor control signal processing controller again.
3. TV set LCD time sequence controlling method during open according to claim 1 and 2 is characterized in that: described step 2b) finish as follows: main control microprocessor stops to send serial data bus and serial clock bus signals to the driving circuit of LCDs.
4. TV set LCD time sequence controlling method during open according to claim 1 and 2, it is characterized in that: in after finishing described step 1), continuing 30 milliseconds, carry out step 2 again) or 2a), at completing steps 2a) afterwards the duration is carried out step 2b again in 50 milliseconds).
5. TV set LCD time sequence controlling method during open according to claim 1 and 2, it is characterized in that: also comprise the steps: 0) whether stable by main control microprocessor detection input signal, perhaps whether the screen menu type regulative mode is normal, if normally then carry out step 1) again.
6. TV set LCD time sequence controlling method during open according to claim 5 is characterized in that: in step 0) delay time 50 milliseconds afterwards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100218657A CN100362560C (en) | 2005-10-10 | 2005-10-10 | TV set LCD time sequence controlling method during open |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100218657A CN100362560C (en) | 2005-10-10 | 2005-10-10 | TV set LCD time sequence controlling method during open |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1763822A true CN1763822A (en) | 2006-04-26 |
| CN100362560C CN100362560C (en) | 2008-01-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100218657A Expired - Fee Related CN100362560C (en) | 2005-10-10 | 2005-10-10 | TV set LCD time sequence controlling method during open |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101866637A (en) * | 2010-06-13 | 2010-10-20 | 青岛海信电器股份有限公司 | Power-on time sequence control method for liquid crystal display equipment and television |
| CN103607586A (en) * | 2013-11-18 | 2014-02-26 | 四川长虹电器股份有限公司 | Method for enhancing reliability of 4k2k screen display |
| CN105761700A (en) * | 2016-05-20 | 2016-07-13 | 深圳市华星光电技术有限公司 | Power supply control system and display panel with same |
| WO2017120753A1 (en) * | 2016-01-12 | 2017-07-20 | 深圳多哚新技术有限责任公司 | Display method for display apparatus, display apparatus and virtual reality (vr) system |
| WO2018095081A1 (en) * | 2016-11-25 | 2018-05-31 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Method and terminal for displaying boot graphic and storage medium |
| CN108597461A (en) * | 2017-12-26 | 2018-09-28 | 中航华东光电有限公司 | The method for realizing electrical picture signal control on liquid crystal display based on FPGA |
| CN109377951A (en) * | 2018-10-31 | 2019-02-22 | 惠科股份有限公司 | Driving circuit, driving method of display module and display module |
| CN109377952A (en) * | 2018-11-12 | 2019-02-22 | 惠科股份有限公司 | Driving method of display device, display device and display |
| CN110767179A (en) * | 2019-06-10 | 2020-02-07 | 惠科股份有限公司 | Backlight control method, driving module and display device |
| CN112185305A (en) * | 2019-07-04 | 2021-01-05 | 京东方科技集团股份有限公司 | Backlight control device, backlight control method and display device |
| WO2023272589A1 (en) * | 2021-06-30 | 2023-01-05 | 京东方科技集团股份有限公司 | Display panel driving method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH075427A (en) * | 1993-06-16 | 1995-01-10 | Sony Corp | Liquid crystal display device |
| KR100901652B1 (en) * | 2003-10-21 | 2009-06-09 | 엘지디스플레이 주식회사 | Liquid crystal display device and driving method thereof |
| CN100456340C (en) * | 2005-08-11 | 2009-01-28 | 冶天科技有限公司 | Low voltage differential signal direct transmission method and interface |
-
2005
- 2005-10-10 CN CNB2005100218657A patent/CN100362560C/en not_active Expired - Fee Related
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101866637A (en) * | 2010-06-13 | 2010-10-20 | 青岛海信电器股份有限公司 | Power-on time sequence control method for liquid crystal display equipment and television |
| CN103607586A (en) * | 2013-11-18 | 2014-02-26 | 四川长虹电器股份有限公司 | Method for enhancing reliability of 4k2k screen display |
| CN103607586B (en) * | 2013-11-18 | 2016-03-16 | 四川长虹电器股份有限公司 | Improve the method for 4k2k screen reliability display |
| WO2017120753A1 (en) * | 2016-01-12 | 2017-07-20 | 深圳多哚新技术有限责任公司 | Display method for display apparatus, display apparatus and virtual reality (vr) system |
| CN105761700A (en) * | 2016-05-20 | 2016-07-13 | 深圳市华星光电技术有限公司 | Power supply control system and display panel with same |
| CN105761700B (en) * | 2016-05-20 | 2018-08-14 | 深圳市华星光电技术有限公司 | Power control system and display panel with the power control system |
| WO2018095081A1 (en) * | 2016-11-25 | 2018-05-31 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Method and terminal for displaying boot graphic and storage medium |
| CN108597461B (en) * | 2017-12-26 | 2020-10-02 | 中航华东光电有限公司 | Method for realizing power-on image signal control of liquid crystal display based on FPGA |
| CN108597461A (en) * | 2017-12-26 | 2018-09-28 | 中航华东光电有限公司 | The method for realizing electrical picture signal control on liquid crystal display based on FPGA |
| CN109377951A (en) * | 2018-10-31 | 2019-02-22 | 惠科股份有限公司 | Driving circuit, driving method of display module and display module |
| CN109377952A (en) * | 2018-11-12 | 2019-02-22 | 惠科股份有限公司 | Driving method of display device, display device and display |
| CN109377952B (en) * | 2018-11-12 | 2020-05-26 | 惠科股份有限公司 | Driving method of display device, display device and display |
| CN110767179A (en) * | 2019-06-10 | 2020-02-07 | 惠科股份有限公司 | Backlight control method, driving module and display device |
| WO2020248870A1 (en) * | 2019-06-10 | 2020-12-17 | 惠科股份有限公司 | Backlight control method, driving circuit, and display device |
| CN112185305A (en) * | 2019-07-04 | 2021-01-05 | 京东方科技集团股份有限公司 | Backlight control device, backlight control method and display device |
| CN112185305B (en) * | 2019-07-04 | 2022-04-12 | 京东方科技集团股份有限公司 | Backlight control device, backlight control method and display device |
| US11367404B2 (en) | 2019-07-04 | 2022-06-21 | Beijing Boe Display Technology Co., Ltd. | Device and method for controlling backlight, and display device |
| WO2023272589A1 (en) * | 2021-06-30 | 2023-01-05 | 京东方科技集团股份有限公司 | Display panel driving method |
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|---|---|
| CN100362560C (en) | 2008-01-16 |
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