CN1745458A - 薄膜半导体元器件和其制造方法 - Google Patents

薄膜半导体元器件和其制造方法 Download PDF

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Publication number
CN1745458A
CN1745458A CNA2004800032327A CN200480003232A CN1745458A CN 1745458 A CN1745458 A CN 1745458A CN A2004800032327 A CNA2004800032327 A CN A2004800032327A CN 200480003232 A CN200480003232 A CN 200480003232A CN 1745458 A CN1745458 A CN 1745458A
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semiconductor
thin film
carrier
devices
film semiconductor
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CN100524619C (zh
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P·施陶斯
A·普勒斯尔
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Ams Osram International GmbH
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Osram Opto Semiconductors GmbH
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Abstract

本发明涉及一种半导体元器件,它具有一个薄膜半导体本体(2),它设置在一个载体(4)上。此外还涉及一种用于制造一个这样的半导体元器件的方法。

Description

薄膜半导体元器件和其制造方法
本发明涉及一种如权利要求1前序部分所述的半导体元器件以及如权利要求13前序部分所述的该半导体元器件的制造方法。
上述形式的半导体元器件包括一个薄膜半导体本体和一个载体,在其上固定半导体本体。
例如在光电子元器件中以薄膜半导体芯片的形式使用薄膜半导体本体。一个薄膜光发射二极管芯片尤其显示出下面的特性特征:
-在一个产生射线的外延层序的转向载体元件的第一主面上涂覆或构成一个反射的层,它至少将在外延层序中产生的电磁射线的一部分反射回到外延层序;
-一个薄膜光发射二极管芯片良好地接近一个朗贝特表面辐射器;
-所述外延层序具有一个20μm或更薄、尤其是在10μm范围的厚度;
-所述外延层序包含至少一个具有至少一个表面的半导体层,该表面具有一个混匀结构,它在理想情况下导致光在外延的外延层序中的一个接近各态历经的分布,即,它具有一个尽可能各态历经的随机的散射特性。
例如在I.Schnitzer等,App1.Phys.Lett.63(16),1993年10月18日,2174-2176中描述了一个薄膜光发射二极管芯片的基本原理,因此在此请参阅其公开内容。要注意,本发明尽管特别涉及薄膜光发射二极管芯片,但是不局限于它。而是除薄膜光发射二极管芯片以外本发明也适用于所有其它的薄膜半导体本体。
为了制造一个薄膜半导体本体首先将一个半导体层加工到一个适合的衬底上,接着与载体连接然后与衬底剥离。通过细分、例如锯开具有设置在其上的半导体层的载体出现多个半导体本体,它们分别固定在相应的载体上。
在此重要的是,使用于制造半导体层的衬底与半导体层分离并且不同时作为元器件中的载体。
这种制造方法的优点是,对于衬底和载体可以使用不同的材料。因此一方面可以使那些材料适配于用于制造半导体层的不同要求,另一方面尽可能相互独立地适配于运行条件。因此为了加工半导体层可以对应于载体的机械、热学和光学特性地选择载体,并对应于用于加工半导体层的要求选择衬底。
尤其是外延地制造半导体层对外延衬底提出了大量专门的要求。例如外延衬底与要被镀覆的半导体层的晶格常数必需相互匹配。此外衬底应该能够耐受外延条件、尤其是直至超过1000℃的温度并且适合于相关半导体材料的尽可能均匀的层外延生殖和生长。
为了继续加工半导体本体和运行尤其在光电元器件中对衬底的其它特性如电的和热学的传导性以及射线透射性提出要求。因此适合于外延衬底的材料作为元器件中的载体部件经常只是有条件适合的。最后尤其对于相对昂贵的外延衬底期望可以多次使用该衬底。
可以例如通过以激光射线辐射半导体-衬底界面实现所述半导体层与外延衬底的分离。在此所述激光射线在界面附近被吸收并且在那里起到使温度升高直到用于分解半导体材料的作用。由文献WO98/14986已知一种这样的方法。在其中所描述的用于使GaN和GaInN层与一个蓝宝石衬底剥离的方法中使用一个Q值连接的Nd:YAG激光器的355nm的三倍频射线。所述激光射线透过透明的蓝宝石衬底入射到半导体层并且在一个约100nm厚度边界层中在蓝宝石衬底与GaN半导体层之间的过渡区上被吸收。在界面上达到一个这样高的温度,使得GaN边界层分解,其结果是使半导体层与衬底之间的连接分离。
在常见的方法中作为载体使用一个砷化镓衬底(GaAs衬底)。但是在加工时、例如在锯割GaAs衬底时掉落有毒的含砷废物,它们需要一个相当费事的处理。并且GaAs衬底必需具有一个确定的最小厚度,用于对于上述制造方法保证一个足够的机械稳定性。这一点对于减薄是必需的,例如在涂覆半导体层或剥离外延衬底以后进行载体磨削,由此增加了在制造时的费用并增加了在载体中断裂的危险。
本发明的目的是,提供一种上述形式的具有一个改进载体的薄膜元器件。尤其是可以在技术上尽可能简单且经济地制造这个元器件。此外本发明的目的还要给出一种相应的制造方法。
这个目的通过一个如权利要求1所述的元器件以及一个如权利要求13所述的制造方法得以实现。本发明的有利改进方案是从属权利要求的内容。
按照本发明规定,一个半导体元器件通过一个薄膜半导体本体构成,该本体设置在一个含有锗的载体上。作为载体最好使用一个锗衬底。下面将这些载体简称为“锗载体”。
在本发明的范围内,一个衬底分离的半导体本体可以理解为一个薄膜半导体本体,即,一个外延加工的半导体本体,外延衬底与半导体本体分离,在外延衬底上已经原始地生长半导体本体。
为了固定,例如可将半导体本体粘接到锗载体上。优选在薄膜半导体本体与载体之间构成钎焊连接。这种钎焊连接与粘接连接相比通常具有更高的温度耐受性和更好的热传导性。此外通过钎焊连接没有附加费用地在载体与半导体本体之间实现良好的导电连接,它同时可以用来作为半导体本体的接触点。
锗载体与含砷载体相比明显更易于加工,其中尤其不会落下有毒的含砷废物。由此降低在加工时的总费用。此外锗载体显示出一个更高的机械稳定性,它允许使用更薄的载体并且尤其可以省去以后为了减薄对载体的磨削。最后,锗载体比类似的GaAs载体明显更经济。
在本发明的另一观点中将薄膜半导体本体钎焊到锗载体上。为此最好构成一个金-锗钎焊连接。由此实现可靠的、耐温的且良好导电和导热的连接。因为所产生的金-锗连接的熔融温度高于一般的在装配一个元器件、例如焊接到一个电路板上时产生的温度,因此不必担心在装配时半导体本体与载体剥离。
本发明尤其适合于III-V化合物半导体基,对此尤其可以理解为化合物AlxGa1-xAs,其中0≤x≤1,InxAlyGa1-x-yP,InxAsyGa1-x-yP,InxAlyGa1-x-yAs,InxAlyGa1-x-yN,其中0≤x≤1,0≤y≤1,和0≤x+y≤1,以及InxGa1-xAs1-yNy,其中0≤x≤1,0≤y≤1。
对于上述氮化合物半导体InxAlyGa1-x-yN的外延加工经常使用蓝宝石衬底或碳化硅衬底。因为蓝宝石衬底一方面是电绝缘的并因此能够实现没有垂直传导的元器件结构,另一方面碳化硅衬底相对较贵且易碎,因此加工费事,所以氮基半导体本体作为薄膜半导体本体、即没有外延衬底的继续处理是特别有利的。
在一个按照本发明的用于制造一种具有薄膜半导体本体的半导体元器件的方法中实现将薄膜半导体本体生长在一个衬底上,接着将锗载体例如一个锗晶片涂覆到背离衬底的载体一侧上,然后将薄膜半导体本体与衬底剥离。
最好将薄膜半导体本体钎焊到载体上。为此例如在载体和薄膜半导体本体上分别涂覆一个金层连接面。接着使这些金层接触,其中选择压力和温度,使得产生一个金-锗熔融物,它在形成一个金-锗共晶的条件下固化。也可以选择将金层只涂覆到载体或薄膜半导体本体上。代替金层也可以涂覆金-锗合金。因为载体本身含有锗,因此一方面避免如同在GaAs衬底中可能产生的那种合金问题。另一方面锗衬底对于金-锗熔融物是一个熔池,它易于形成共晶。
所述衬底在本发明中可以通过一个磨削或腐蚀工艺去除。最好将这些步骤组合,因此首先将衬底磨削到一个薄的剩余层,接着腐蚀剩余层。一种腐蚀工艺特别适合于InxAlyGa1-x-yP基或InxAsyGa1-x-yP基的半导体层,它们生长在一个GaAs外延衬底上。在此最好是通过一个腐蚀停止来调节腐蚀深度,因此使GaAs外延衬底被一直腐蚀到InxAlyGa1-x-yP基或InxAsyGa1-x-yP基的半导体层。
对于氮化合物半导体基的半导体层所述衬底的剥离最好通过激光射线实现。在此衬底-半导体界面通过透过衬底的激光射线辐射。射线在半导体层与衬底之间的界面周围被吸收并在那里导致温度升高直到半导体材料分解,其中所述衬底与半导体层分离。在此最好使用一个三倍频Q值连接的Nd:YAG激光器或受激准分子激光器,它例如在紫外光谱区发射。为了达到所需的强度所述受激准分子激光器的脉冲运行是适宜的。已经证实脉冲宽度一般小于或等于10ns是有利的。
本发明的其它特征、优势和适宜性由下面对本发明的两个实施例结合附图1至3的描述给出。附图中
图1示出一个按照本发明的半导体元器件实施例的示意图,
图2a至2d借助于四个中间步骤示出按照本发明的制造方法的第一实施例的示意图,
图3a至3e借助于五个中间步骤示出按照本发明的制造方法的第二实施例的示意图。
在附图中相同的或相同功能的元件配有相同的附图标记。
在图1所示半导体元器件具有一个锗衬底形式的载体4,在其上通过一个钎焊层5固定一个薄膜半导体本体2。该薄膜半导体本体2最好包括多个半导体层,它们首先生长在一个外延衬底(未示出)上,该衬底在半导体本体涂覆到载体4上以后被去除。
作为薄膜元器件的结构尤其适用于发射射线的半导体本体,因为避免了吸收所产生的射线和由此降低在外延衬底中的射线增益。例如半导体层可以设置一个产生射线的pn结,它还可以含有单量子谐振腔结构或多量子谐振腔结构。
对于本发明优选在薄膜半导体本体的射线发射层与锗载体之间设置一个镜面层。这个镜面层发射在锗载体方向上发射的射线分量并因此提高射线增益。此外优选该镜面层由金属层构成,它尤其可以设置在由钎焊连接构成的层与薄膜半导体本体之间。例如可以由此构成高反射镜,使得在薄膜半导体本体上首先设置一个介电层接着设置优选金属化镜面层,其中以适宜的方式为了薄膜半导体本体的电接触使镜面层局部地断开。
在本发明中优选可以在基本无改变地接受常见的通过GaAs作为载体材料的元器件和方法,其中代替GaAs载体使用一个锗载体。因为锗的热膨胀率与砷化镓的热膨胀率是近似的,因此通常能够在制造时没有附加费用地并且不使元器件特性变差地由锗衬底替换传统的GaAs衬底。锗与砷化镓相比显示出更高的导热性。
如上所述,锗衬底还由于其低价格、其易于加工性和其相对较高的机械稳定性是有利的。因此例如厚度超过600μm的GaAs衬底替换成厚度为200μm的锗衬底,由此可以省去下面的衬底减薄。
此外在钎焊连接5方面锗是有利的,因为由此避免在砷化镓与金-锗金属化层连接时的合金问题。
在图2所示的方法第一步骤、图2a中在衬底1上涂覆一个半导体本体2。尤其是该半导体本体2也可以包括多个例如InxAlyGa1-x-yP基的单层,它们先后生长在衬底1上。
在下一步骤、图2b中半导体本体2在背离衬底的一侧上配有一个金属化层3a。优选蒸镀一个金层。
此外具有一个锗载体中,在其上以相应的方式涂覆一个金属化层3b、最好同样是一个金层。这个金属化层3a,3b一方面用于形成半导体本体2与衬底1之间的钎焊连接,另一方面形成一个良好导电的欧姆接触。可以选择在金层3a,3b中的一个上涂覆一个金-锑层3c,其中锑作为要被形成的接触点的n掺杂。代替锑也可以使用砷或磷用于掺杂。也可以选择例如通过一个铝掺杂、镓掺杂或铟掺杂构成一个p接触点。
在本发明的范围内也可以选择只使用一个金属化层3a或3b,它或者涂覆到半导体本体2上或者涂覆到锗载体4上。
在下一步骤、图2c中将中载体4和衬底1通过半导体本体2相互拼接,其中选择温度和压力,使得金属化层3a、3b、3c熔融并接着作为钎焊连接固化。在此最好首先形成一个金-锗熔融物,它在冷却时形成一个必要时锑掺杂的金-锗共晶作为钎焊连接。有利地也可以围成(akkommodiert)凸起和与其它平面不同的表面形状,因此可以与传统的方法相反偏离平面平行的熔融物工作面。例如通过熔融物在半导体本体表面上围成一个颗粒并加入到钎焊连接里面。
在最后的步骤、图2d中将衬底1去除。为此例如首先将衬底1磨削到一个薄的剩余层,接着腐蚀掉剩余层。保留一个薄膜半导体本体2,它焊接到一个锗载体4上。如上所述,这种方法尤其对于GaAs外延衬底上的InxAlyGa1-x-yP基半导体本体是有利的。
在图3中所示的实施例中与在图2中所示的实施例不同,所述衬底通过一个激光剥离工艺掀开。
在第一步、图3a中最好在一个氮化合物半导体基的衬底1上生长一个半导体本体2。该半导体本体2如上面的实施例那样包括多个单层并且构成发射射线的半导体本体。考虑到氮化物半导体的外延和晶格适配以及激光剥离工艺一个蓝宝石衬底尤其适合作为衬底1。
在半导体本体的表面上涂覆一个金属化层3,最好是一个金金属化层,见图3b,然后使半导体本体与一个锗载体4钎焊,见图3c。该钎焊连接5对应于上述实施例构成。也可以选择如上在那里所述的那样具有两个金层,它们一方面涂覆到载体上,另一方面涂覆到半导体本体上。
在下面的步骤、图3d中透过衬底1通过一个激光射线6辐射半导体层2。该射线能量绝大部分接近在半导体层2与衬底1之间的界面上在半导体层2中被吸收并在界面上起到一个材料分解的作用,使得下面可以将衬底1掀开。
优选使由于材料分解产生的剧烈机械负荷被焊料层吸收,因此甚至可以使几微米厚的半导体层与衬底剥离。
一个受激准分子激光器、尤其是一个XeF受激准分子激光器或者一个三倍频的Q值连接的Nd:YAG激光器作为射线源是有利的。
所述激光射线最好通过一个适合的光学机构透过衬底聚焦到半导体层2上,由此使半导体表面上的能量密度在100mJ/cm2至1000mJ/cm2之间、优选在200mJ/cm2至800mJ/cm2之间。由此可以使衬底1无残留地与半导体本体分离,见图3e。这种形式的分离有利地能够使衬底重新用于作为外延衬底。
借助于所述的实施例对本发明的描述当然并不是限制性的。而是可以将实施例的各个方面尽可能自由地在本发明的范围内相互组合。此外本发明包括每个新的特征以及特征的每个组合,尤其是特征的每个组合包含在权利要求中,尽管这个组合没有明确在权利要求中给出。

Claims (20)

1.一种半导体元器件,具有一个薄膜半导体本体(2),它设置在一个载体(4)上,其特征在于,所述载体(4)含有锗。
2.如权利要求1所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)钎焊到载体(4)上。
3.如权利要求1或2所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)通过一个含金的焊料钎焊到载体(4)上。
4.如权利要求1至3中任一项所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)包括多个单层。
5.如权利要求1至4中任一项所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)或单层中的至少一个含有III-V族化合物半导体。
6.如权利要求5所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)或单层中的至少一个含有InxAlyGa1-x-yP,其中0≤x≤1,0≤y≤1,0≤x+y≤1。
7.如权利要求5所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)或单层中的至少一个含有InxAsyGa1-x-yP,其中0≤x≤1,0≤y≤1,0≤x+y≤l。
8.如权利要求5所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)或单层中的至少一个含有InxAlyGa1-x-yAs,其中0≤x≤1,0≤y≤1,0≤x+y≤1或InxGa1-xAs1-yNy,其中0≤x≤1,0≤y≤1。
9.如权利要求5所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)或单层中的至少一个含有氮化物半导体、尤其是InxAlyGa1-x-yN,其中0≤x≤1,0≤y≤1,0≤x+y≤1。
10.如权利要求1至9中任一项所述的半导体元器件,其特征在于,所述薄膜半导体本体(2)具有一个发射射线的有效部位。
11.如权利要求1至10中任一项所述的半导体元器件,其特征在于,在薄膜半导体本体(2)与载体(4)之间设置一个镜面层、最好一个金属化镜面层。
12.如权利要求11所述的半导体元器件,其特征在于,在薄膜半导体本体(2)与镜面层之间至少局部地设置一个介电层。
13.一种用于制造半导体元器件的方法,该半导体元器件具有一个薄膜半导体本体(2),它设置在一个载体(4)上,具有以下步骤:
a)在一个衬底上生长薄膜半导体本体,
b)在一个背离衬底(1)的薄膜半导体本体(2)的一侧上涂覆载体(4),
c)使薄膜半导体本体(2)与衬底剥离,其特征在于,所述载体(4)含有锗。
14.如权利要求13所述的方法,其特征在于,在步骤c)中去除、尤其是磨削掉和/或腐蚀掉衬底。
15.如权利要求13所述的方法,其特征在于,在步骤c)中使半导体本体通过激光射线与衬底(1)剥离。
16.如权利要求13至15中任一项所述的方法,其特征在于,在步骤b)中焊接载体。
17.如权利要求13至16中任一项所述的方法,其特征在于,在面对载体的薄膜半导体本体(2)的一侧上和/或在面对薄膜半导体本体(2)的载体一侧上设置一个金层(3,3a,3b),它在步骤b)中在焊接到载体(4)上时至少局部地构成一个含有金和锗的熔融物。
18.如权利要求13至17中任一项所述的方法,其特征在于,在步骤b)之前在面对载体的薄膜半导体本体(2)的一侧上和/或在面对薄膜半导体本体(2)的载体一侧上涂覆一个含有金和锗的层。
19.如权利要求13至18中任一项所述的方法,其特征在于,由此制造如权利要求1至12中任一项所述的半导体元器件。
20.如权利要求1至12中任一项所述的半导体元器件或如权利要求13至18中任一项所述的方法,其特征在于,所述半导体元器件是一个光发射二极管,尤其是一个发光二极管或一个激光二极管。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101904021B (zh) * 2007-12-20 2013-03-13 奥斯兰姆奥普托半导体有限责任公司 用于以薄膜技术制造光电子器件的方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7511311B2 (en) 2002-08-01 2009-03-31 Nichia Corporation Semiconductor light-emitting device, method for manufacturing the same, and light-emitting apparatus including the same
KR101386192B1 (ko) 2004-01-26 2014-04-17 오스람 옵토 세미컨덕터스 게엠베하 전류 분산 구조물을 갖는 박막 led
JP4906256B2 (ja) * 2004-11-10 2012-03-28 株式会社沖データ 半導体複合装置の製造方法
TWI248222B (en) * 2005-05-12 2006-01-21 Univ Nat Central Light emitting diode and manufacturing method thereof
DE102005025416A1 (de) * 2005-06-02 2006-12-14 Osram Opto Semiconductors Gmbh Lumineszenzdiodenchip mit einer Kontaktstruktur
DE102008008595A1 (de) * 2007-12-21 2009-06-25 Osram Opto Semiconductors Gmbh Oberflächenemittierender Halbleiterlaser und Verfahren zu dessen Herstellung
DE102008045653B4 (de) * 2008-09-03 2020-03-26 Osram Opto Semiconductors Gmbh Optoelektronisches Bauteil
US11472171B2 (en) * 2014-07-20 2022-10-18 X Display Company Technology Limited Apparatus and methods for micro-transfer-printing
US20220059521A1 (en) * 2019-01-02 2022-02-24 Lumiode, Inc. System and method of fabricating display structures

Family Cites Families (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4120706A (en) * 1977-09-16 1978-10-17 Harris Corporation Heteroepitaxial deposition of gap on silicon substrates
US4749840A (en) * 1986-05-16 1988-06-07 Image Micro Systems, Inc. Intense laser irradiation using reflective optics
JP2908818B2 (ja) * 1989-09-18 1999-06-21 株式会社日立製作所 半導体装置の製造方法
US5326424A (en) * 1989-12-06 1994-07-05 General Motors Corporation Cubic boron nitride phosphide films
US5300756A (en) * 1991-10-22 1994-04-05 General Scanning, Inc. Method for severing integrated-circuit connection paths by a phase-plate-adjusted laser beam
JP3237888B2 (ja) * 1992-01-31 2001-12-10 キヤノン株式会社 半導体基体及びその作製方法
US6958093B2 (en) * 1994-01-27 2005-10-25 Cree, Inc. Free-standing (Al, Ga, In)N and parting method for forming same
JP3269251B2 (ja) * 1994-03-31 2002-03-25 株式会社デンソー 積層型半導体装置の製造方法
US5787104A (en) * 1995-01-19 1998-07-28 Matsushita Electric Industrial Co., Ltd. Semiconductor light emitting element and method for fabricating the same
US5670798A (en) * 1995-03-29 1997-09-23 North Carolina State University Integrated heterostructures of Group III-V nitride semiconductor materials including epitaxial ohmic contact non-nitride buffer layer and methods of fabricating same
US5674758A (en) * 1995-06-06 1997-10-07 Regents Of The University Of California Silicon on insulator achieved using electrochemical etching
US5625202A (en) * 1995-06-08 1997-04-29 University Of Central Florida Modified wurtzite structure oxide compounds as substrates for III-V nitride compound semiconductor epitaxial thin film growth
DE19546443A1 (de) * 1995-12-13 1997-06-19 Deutsche Telekom Ag Optische und/oder elektrooptische Verbindung und Verfahren zur Herstellung einer solchen
EP1744365B1 (en) * 1996-08-27 2009-04-15 Seiko Epson Corporation Exfoliating method and transferring method of thin film device
US5828088A (en) * 1996-09-05 1998-10-27 Astropower, Inc. Semiconductor device structures incorporating "buried" mirrors and/or "buried" metal electrodes
DE19640594B4 (de) * 1996-10-01 2016-08-04 Osram Gmbh Bauelement
DE19706279A1 (de) * 1997-02-18 1998-08-20 Siemens Ag Laservorrichtung
US5838870A (en) * 1997-02-28 1998-11-17 The United States Of America As Represented By The Secretary Of The Air Force Nanometer-scale silicon-on-insulator photonic componets
JPH10326884A (ja) * 1997-03-26 1998-12-08 Canon Inc 半導体基板及びその作製方法とその複合部材
TW376585B (en) * 1997-03-26 1999-12-11 Canon Kk Semiconductor substrate and process for producing same
US5998291A (en) * 1997-04-07 1999-12-07 Raytheon Company Attachment method for assembly of high density multiple interconnect structures
US6071795A (en) * 1998-01-23 2000-06-06 The Regents Of The University Of California Separation of thin films from transparent substrates by selective optical processing
US6380097B1 (en) * 1998-05-11 2002-04-30 The United States Of America As Represented By The Secretary Of The Air Force Method for obtaining a sulfur-passivated semiconductor surface
US6331208B1 (en) * 1998-05-15 2001-12-18 Canon Kabushiki Kaisha Process for producing solar cell, process for producing thin-film semiconductor, process for separating thin-film semiconductor, and process for forming semiconductor
US6136141A (en) * 1998-06-10 2000-10-24 Sky Solar L.L.C. Method and apparatus for the fabrication of lightweight semiconductor devices
EP0977280A3 (en) * 1998-07-28 2008-11-26 Interuniversitair Micro-Elektronica Centrum Vzw Devices for emitting radiation with a high efficiency and a method for fabricating such devices
US6504180B1 (en) * 1998-07-28 2003-01-07 Imec Vzw And Vrije Universiteit Method of manufacturing surface textured high-efficiency radiating devices and devices obtained therefrom
US6169298B1 (en) * 1998-08-10 2001-01-02 Kingmax Technology Inc. Semiconductor light emitting device with conductive window layer
JP2000174350A (ja) * 1998-12-10 2000-06-23 Toshiba Corp 光半導体モジュール
US6744800B1 (en) * 1998-12-30 2004-06-01 Xerox Corporation Method and structure for nitride based laser diode arrays on an insulating substrate
US6280523B1 (en) * 1999-02-05 2001-08-28 Lumileds Lighting, U.S., Llc Thickness tailoring of wafer bonded AlxGayInzN structures by laser melting
JP2001015798A (ja) * 1999-06-29 2001-01-19 Toshiba Corp 半導体発光素子
US6300224B1 (en) * 1999-07-30 2001-10-09 Nippon Sheet Glass Co., Ltd. Methods of dicing semiconductor wafer into chips, and structure of groove formed in dicing area
US6287882B1 (en) * 1999-10-04 2001-09-11 Visual Photonics Epitaxy Co., Ltd. Light emitting diode with a metal-coated reflective permanent substrate and the method for manufacturing the same
DE10051465A1 (de) * 2000-10-17 2002-05-02 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines Halbleiterbauelements auf GaN-Basis
US6864158B2 (en) * 2001-01-29 2005-03-08 Matsushita Electric Industrial Co., Ltd. Method of manufacturing nitride semiconductor substrate
US6902098B2 (en) * 2001-04-23 2005-06-07 Shipley Company, L.L.C. Solder pads and method of making a solder pad
US6814832B2 (en) * 2001-07-24 2004-11-09 Seiko Epson Corporation Method for transferring element, method for producing element, integrated circuit, circuit board, electro-optical device, IC card, and electronic appliance
DE10203795B4 (de) * 2002-01-31 2021-12-09 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines Halbleiterbauelements
DE10303978A1 (de) * 2002-01-31 2003-11-27 Osram Opto Semiconductors Gmbh Dünnfilmhalbleiterbauelement und Verfahren zu dessen Herstellung
TWI226139B (en) * 2002-01-31 2005-01-01 Osram Opto Semiconductors Gmbh Method to manufacture a semiconductor-component
JP4986406B2 (ja) * 2005-03-31 2012-07-25 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101904021B (zh) * 2007-12-20 2013-03-13 奥斯兰姆奥普托半导体有限责任公司 用于以薄膜技术制造光电子器件的方法

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