CN1731691A - Mixer of direct-conversion RF receiver - Google Patents
Mixer of direct-conversion RF receiver Download PDFInfo
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- CN1731691A CN1731691A CN 200510096595 CN200510096595A CN1731691A CN 1731691 A CN1731691 A CN 1731691A CN 200510096595 CN200510096595 CN 200510096595 CN 200510096595 A CN200510096595 A CN 200510096595A CN 1731691 A CN1731691 A CN 1731691A
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Abstract
Disclosed is a mixing device of a direct conversion radio frequency receiver, which comprises gain circuit, load circuit and conversion circuit. The gain circuit receives difference RF signals to generate first gain signal. The conversion circuit mixes the first gain signal and local oscillation signal for directly fall down frequency to generate modulating signal. The load circuit comprises a pair of first transistors, a pair of second transistors and a pair of resistance units. The resistance units provide gain parameters. The first transistors provide low resistance to make the modulation signal input into the load circuit. The second transistors provide high resistance to lead the modulation signal inputting to load circuit to the resistance units and output second gain signal that meets the gain parameters. The second transistors are one-direction npn bipolar transistor for exploiting metallic oxide semiconductor structures.
Description
Technical field
The invention relates to a kind of direct conversion hysteria (Direct Conversion or Homodyne) radio frequency receiver (Radio Frequency receiver, RF receiver), particularly about direct conversion hysteria radio frequency receiver mixer (Mixer) wherein.
Background technology
Traditional wireless electronic product radio frequency receiver wherein is to be mainstream technology with " heterodyne system radio frequency receiver ".The heterodyne system radio frequency receiver claims alien frequencies smear (heterodyne) receiver again.The radio frequency receiver of this type has good performance performance, the radio frequency receiver of other kind structure, for example direct conversion hysteria (direct conversion) radio frequency receiver, wide intermediate frequency (wideband IF) radio frequency receiver or Low Medium Frequency (low IF) radio frequency receiver also can refer to deformation technology or deriving technology for the heterodyne system radio frequency receiver.
The heterodyne system radio frequency receiver is usually with the radiofrequency signal that is received, and the frequency reducing step by at least twice is to obtain the required fundamental frequency signal of telecommunication.For example, the radiofrequency signal of high frequency is via the first frequency reducing step, to reduce to intermediate frequency, and again by the second frequency reducing step, can be to reduce to by the low frequency signal of telecommunication of identification and work (approaching the direct current frequency) in electronic product.
Though the heterodyne system radio frequency receiver has good performance, but cost an arm and a leg and can't be integrated in some electronic components in the integrated circuit (IC) chip because must use, and its overall structure is comparatively complicated, therefore, under the trend that the specification requirement single-chip is integrated now, the heterodyne system radio frequency receiver has the realization of being difficult for and the too high shortcoming of production cost.
In comparison, directly the conversion hysteria radio frequency receiver then accords with the trend that single-chip is integrated.Directly the conversion hysteria radio frequency receiver is called again with frequency smear (Homodyne) radio frequency receiver, and because direct conversion hysteria radio frequency receiver can be considered the heterodyne system simplified structure of " intermediate frequency is set at zero ", so it is called zero intermediate frequency (Zero IF) radio frequency receiver again.Please refer to Fig. 1, directly conversion hysteria radio frequency receiver 10 is by directly mixing received radiofrequency signal (being in high frequency usually), with the local oscillated signal that is positioned at same frequency range (LO), promptly produces the required low frequency signal of telecommunication with once frequency reducing step.Compared to heterodyne architecture noted earlier, directly the structure of conversion hysteria seems directly and nature.And directly among the conversion hysteria radio frequency receiver, the false image signal that is caused by image frequency (image frequency) does not exist, and this then is better than the benefit of heterodyne system radio frequency receiver for another.
The typical directly front stage circuits (front end circuit) of conversion hysteria radio frequency receiver 10 is to comprise low noise amplifier (LNA) 14, and mixer (mixer) 16a and 16b; Late-class circuit then comprises fundamental frequency amplifier (ba seband amplifier) 22a and 22b, low pass filter (LPF) 23a and 23b, analog-digital converter (ADC) 24a and 24b and digital signal processor (DSP) 26.Wherein, mixer 16a, fundamental frequency amplifier 22a, low pass filter 23a and analog-digital converter 24a are the I path, and another group components identical (number in the figure 16b, 22b, 23b and 24b) is to belong to the Q path.
In known technology, radio frequency front-end filter (preselection filter) 12 further was set before low noise amplifier 14 sometimes, carry out filtering with the signal that antenna 11 is taken down, the interference signal (out-of band signal) beyond the frequency band that institute's desire can be used gives filtering; Sometimes, radio frequency front-end filter 12 also can be done the image frequency in the radiofrequency signal partly to suppress.The output of radio frequency front-end filter 12 is to be coupled in low noise amplifier 14 to carry out the amplification of signal.With IEEE 802.11b WLAN standard is example, and the radiofrequency signal that receives, radio frequency front-end filter 12 and low noise amplifier 14 all are in the frequency range of 2.4GHz to 2.48GHz.
The output of low noise amplifier 14 is to be coupled in mixer 16a and 16b respectively.Local oscillator 18 provides local oscillated signal, produces quadrature phases via frequency eliminator 15 and imports mixer 16a and 16b on I, the Q path respectively.With IEEE 802.11b WLAN standard is example, and local oscillator 18 operates in 2.4GHz, so that the radiofrequency signal of high frequency, can be directly changed into the signal of telecommunication of low frequency.Fundamental frequency amplifier 19a and 19b then are coupled in mixer 16a and 16b respectively, are amplified with the signal of telecommunication that mixer 16a and 16b are drawn.Afterwards, utilize the low pass filter 23a of fundamental frequency and 23b to suppress interference signal outside the required frequency band, among direct conversion hysteria radio frequency receiver 10, low pass filter 23a and 23b can be considered the element of responsible channel selection.At last, then via analog-digital converter 24a and 24b so that signal is given digitlization, and send digital signal processor 26 to, to carry out the computing of the predetermined application relevant with radiofrequency signal.
Directly the structure of conversion hysteria radio frequency receiver has many advantages, and for example each element of the required intermediate-frequency circuit of heterodyne system radio frequency receiver gives province and removes, and therefore whole circuit complexity system can reduce, but the research and development heavy burden of mitigation system application designer.And also just because of complexity reduces, therefore, the theory that single-chip is integrated is to realize under the structure of direct conversion hysteria radio frequency receiver.High degree of integration, low cost, low power consumption and high frequency range are its advantage.
Yet though directly conversion hysteria radio frequency receiver 10 can be integrated in the single-chip, its performance performance is not as excellent as traditional heterodyne system radio frequency receiver.Because directly conversion hysteria radio frequency receiver 10 is that signal directly is downconverted near the direct current (DC), therefore, mixer 16a wherein mixes (LO self-mixing) at local oscillated signal with 16b and low frequency shows more apparent sensitivity.Also because therefore such characteristic has caused direct conversion hysteria radio frequency receiver 10 to have
Throat sound index (noise figure, NF) inclined to one side High, the linearity is not enough, with DC voltage offset (DC-offsets)Etc. shortcoming.
Throat sound index
Because most enlarging function all is placed on mixer 16a (with the 16b) circuit afterwards in direct conversion hysteria radio frequency receiver 10, therefore, low-frequency noise has just become the emphasis that should be noted that.In Base Band, just have only the faint noise of several microvolts (μ V) at last, also cause considerable noise in the late-class circuit amplification quite easily.If use radio circuit to improve the noise problem of Base Band circuit, then need consider the linearity problems that therefore higher gain is brought again with higher gain.
The noise of above-mentioned Base Band, wherein topmost source are flicker noise (flicker noise), or are called frequency inverse ratio noise (1/f noise).The size of flicker noise is that the direct current frequency with Base Band is inversely proportional to, and therefore, the output that operates in the mixer 16a (with 16b) of low frequency has extra high conversion gain.And in the direct conversion hysteria radio frequency receiver 10 of complementary metal oxide semiconductors (CMOS) (CMOS) processing procedure, the MOS element can bring extra high flicker noise again, the way that increasing metal-oxide semiconductor (MOS) (MOS) component size was once arranged in the known technology, but can increase its capacitance again thus, and expend more local oscillator 18 energy or reduced the amplitude of local oscillations at the strong noise frequency band.
Linearity performance
About the linearity performance of direct conversion hysteria radio frequency receiver 10, mainly be among the mixer 16a (with 16b) that is decided by front stage circuits.In the realization of circuit, mixer 16a (with 16b) can divide into change-over circuit (switching stage) and load circuit (loading stage).In common various formulation specifications, mostly for mixer 16a's (with 16b)
The second rank cut-off point multiplication slope(being the IIP2 parameter) with
The 3rd rank cut-off point multiplication slope(being the IIP3 parameter) be standard to some extent.
IIP2 parameter and IIP3 parameter have very big influence to the linearity performance of integral body.This is because high-frequency signal directly is downconverted to required Base Band in change-over circuit; Load circuit then is responsible for the gain first after the signal down.Therefore, the design meeting of this two part has crucial influence to the linearity performance of integral body.
DC voltage offset
The DC voltage offset front stage circuits of direct conversion hysteria radio frequency receiver 10 at last faces a most serious problem.It not only makes the distorted signals of being wanted lose shape, and also may cause the saturated of late-class circuit.Even bypass in complementary metal oxide semiconductors (CMOS) (CMOS) processing procedure that element does not match or holding wire is asymmetric etc. that FAQs is not talked, local oscillated signal or other be bigger interference signal caused self smear phenomenon in Base Band, also can cause DC voltage offset.
Summary of the invention
Under the development trend that single-chip is integrated, main purpose of the present invention is to be to improve the shortcoming that known direct conversion hysteria radio frequency receiver is still had.
Another object of the present invention is to be to provide a kind of mixer, has low noise figure so that directly change radio frequency receiver.
Another object of the present invention is to be to provide a kind of mixer, has high linearity so that directly change radio frequency receiver.
The mixer that the invention provides a kind of direct conversion hysteria radio frequency receiver comprises gain circuitry, load circuit and change-over circuit.Gain circuitry receives the radiofrequency signal of differential pattern to produce first gain signal.Change-over circuit mixes first gain signal with local oscillated signal, produce modulation signal with direct frequency reducing.Load circuit comprises a pair of the first transistor, a pair of transistor seconds and a pair of impedance unit.Impedance unit provides gain parameter.The first transistor provides Low ESR, so that this modulation signal continues to input to load circuit.Transistor seconds provides high impedance, meets second gain signal of this gain parameter with lead this impedance unit and output of this modulation signal that will input to load circuit.
Transistor seconds be when utilizing metal-oxide semiconductor (MOS) (MOS) processing procedure parasitism form directly to (Vertical npn, Vnpn) type bipolar transistor, by this, the present invention has promoted the performance of direct conversion hysteria radio frequency receiver on the subject under discussion of noise figure effectively.In another embodiment, the first transistor is to utilize metal-oxide semiconductor (MOS) (MOS) structure to form laterally with parasitism that (Lateral pnp, Lpnp) type bipolar transistor by this, can promote the performance of direct conversion hysteria radio frequency receiver on the linearity.
Can be about the advantages and spirit of the present invention by following detailed Description Of The Invention and appended graphic being further understood.
Description of drawings
In conjunction with appended diagram, can understand the plurality of advantages of foregoing and the present invention by following detailed description easily, wherein:
Fig. 1 demonstration always switching through radio frequency receiver typical structure of remodeling;
Fig. 2 is the front-end circuit figure of the direct conversion hysteria radio frequency receiver of one embodiment of the invention;
Fig. 3 is that the first transistor of Fig. 2 is with straight side cross section view when npn type bipolar transistor is implemented;
Fig. 4 is another embodiment of the present invention circuit diagram;
Fig. 5 A is a typical pMOS component side cross section view;
Fig. 5 B the horizontal pnp type bipolar transistor side cross section view that forms by the pMOS element that utilizes Fig. 5 A of parasitism; And
Fig. 6 is another embodiment of the present invention circuit diagram.
[main element label declaration]
Direct conversion hysteria radio frequency receiver 10,30 antennas 11
Radio frequency front-end filter 12 low noise amplifiers 14
Mixer 16a, 16b fundamental frequency amplifier 22a, 22b
Low pass filter 23a, 23b analog-digital converter 24a, 24b
Digital signal processor 26 receiving terminals 301
Local oscillated signal 331 change-over circuits 34
The first transistor 361 transistor secondses 362
The 36a of first second portion 36b
Collector electrode 119,298 N type wells 192
Shallow groove isolation structure 195 P type doped regions 197
N type doped region 198 emitters 198 ', 298 '
Base stage 191,291 grids 295
Gain circuitry current source 371
Embodiment
The present invention provides a kind of mixer that utilizes the direct conversion hysteria radio frequency receiver of complementary metal oxide semiconductors (CMOS) (CMOS) processing procedure making, and this mixer comprises gain circuitry, change-over circuit and load circuit.
If according to the structure chart of Fig. 1, circuit provided by the present invention is the mixer 16a (or 16b) that belongs to Fig. 1 with the protection range of being applied for.What is particularly worth mentioning is that directly in the front stage circuits of conversion hysteria radio frequency receiver 10, the circuit structure of low noise amplifier 14 is similar to the present invention's gain circuitry wherein, yet the two is also inequality.
Please refer to Fig. 2, Fig. 2 is one embodiment of the invention circuit diagram.As above-mentioned, mixer 30 comprises gain circuitry 32, change-over circuit 34 and load circuit 36.Gain circuitry 32 receives the radiofrequency signal 40 of differential pattern (differential type), to produce first gain signal (first gain) 42.Radiofrequency signal 40 is received by antenna, before the receiving terminal 301 of delivering to gain circuitry 32, can utilize radio frequency front-end filter (pre-selection filter, can be with reference to figure 1 label 12), the signal that antenna (Fig. 1 label 11) is taken down carries out filtering, gives filtering with the interference signal beyond the frequency band that institute's desire is used.Afterwards, can utilize the low noise amplifier (please refer to Fig. 1 label 14) that is coupled in mixer 30 front ends, input to receiving terminal 301 after signal is amplified.Wherein, first gain signal 42 is differential pattern.
Because the radiofrequency signal 40 that is received is differential pattern, therefore, circuit design of the present invention also designs it in response to the mode with balancing circuitry, wherein, no matter is that gain circuitry 32, change-over circuit 34 or load circuit 36 are all with the symmetrical manner setting.
Change-over circuit 34 produces (direct down-convert) modulation signal 44 in order to first gain signal 42 is mixed with local oscillated signal 331 with direct frequency reducing.Certainly, modulation signal 44 also is differential pattern.Local oscillated signal 331 is to be provided by 33 of local oscillators (local oscillator), and its frequency is to approach the radiofrequency signal 40 and first gain signal 42.Local oscillated signal 331 is with after first gain signal 42 mixes, because the two frequency is close, therefore the frequency of resulting modulation signal 44 is the differences for the two frequency, and it is to approach the direct current frequency.In the enforcement, change-over circuit 34 is required to be the good circuit of equilibrium relation, produces skew with the signal of avoiding differential pattern.
What deserves to be mentioned is, because Fig. 2 only shows one of them mixer 30 of the direct conversion hysteria radio frequency receiver of the present invention, shown mixer 30 can be applicable to the I path, and also symmetry with it of the front stage circuits that is applied to the Q path, can be about this structure with reference to Fig. 1 and relevant explanation.Therefore, local oscillator 33 can be coupled in frequency eliminator (quadrature differential output) 35, to form I path and the required phase difference in Q path.In the enforcement, the phase difference of the two is 90 degree.
Please continue right-hand part with reference to figure 2.Load circuit 36 comprises a pair of the first transistor (1
StTransistor) 361, a pair of transistor seconds (2
NdTransistor) 362 and a pair of impedance unit (among this embodiment, each impedance unit is meant resistance 368).Impedance unit provides gain parameter, gains to exchanging voltage gain in order to the conversion alternating current.
Above-mentioned a pair of the first transistor 361 is to belong to 36a of first and second portion 36b respectively; And above-mentioned a pair of transistor seconds 362 also belongs to 36a of first and second portion 36b respectively.
Above-mentioned a pair of impedance unit also belongs to 36a of first and second portion 36b respectively, for example, be for a pair of electric capacity 364 belongs to 36a of first and second portion 36b respectively in the present embodiment, and a pair of resistance 368 belong to 36a of first and second portion 36b respectively.
Please separately with reference to the 36a of first or second portion 36b one of them: the first transistor 361 provides a Low ESR, with respect to the high impedance of current source 37, therefore modulation signal 44 can be continued to input in the load circuit 36.
In the enforcement, current source 37 provides change-over circuit 34 and load circuit 36 required total current.The electric current that inputs to the first transistor 361 is the difference of the electric current of the electric current that provides for current source 37 and gain circuitry current source 371.This is to have common gate to the first transistor 361, can feed bias voltage (bias) 31 to the first transistor 361.In the enforcement, two transistor secondses 362 of 36a of first and second portion 36b provide required high impedance and help modulation signal 44 via impedance unit (365 and 368), produce second gain signal 46 and through output 303 output.Wherein, resistance 367 also has very high resistance value, to avoid the signal self-resistance 367 of choosing the road through.
This can have common gate to transistor seconds 362.The contact of common gate can be coupled in feedback unit (CMFB) 38, is fed back with the asymmetric situation of detection signal, can avoid the asymmetric situation of second gain signal 46 exported thus, for example the situations such as lever phenomenon of signal bias.Among another embodiment, this can have common source to transistor seconds 362, yet does not utilize feedback unit 38, and the mode that forms a current mirror (current mirror) is implemented it, can be with reference to figure 4.Above-mentioned execution mode has been all the 36a of first that guarantees load circuit 36 and the equilibrium relation of second portion 36b, can cover effectively to remove the shortcoming of DC voltage offset.
In the present embodiment, the transistor seconds 362 that high impedance is provided be by utilize metal-oxide semiconductor (MOS) (MOS) processing procedure parasitism (parastic) form directly to npn (Vnpn) type bipolar transistor, please refer to Fig. 3.
The present invention consider in since complementary metal oxide semiconductors (CMOS) (CMOS) processing procedure of general direct conversion hysteria radio frequency receiver under, the processing procedure that does not have bipolar transistor, and transistor seconds 362 shown in Figure 2 is if utilize traditional n type metal oxide semiconductor (n-MOS) to implement, then the frequency inverse ratio noise (1/f noise) of n type metal oxide semiconductor (n-MOS) is bigger, and can directly influence in second gain signal 46 of output, therefore can very big negative effect be arranged for overall noise.
Based on above-mentioned consideration, the present invention changes for n type metal oxide semiconductor (n-MOS) structure, adding a deep N-well (deep N-well) with after as collector electrode (collector) 119, as shown in Figure 3, then formed required bipolar transistor structure with emitter (emitter) 198 ' by collector electrode 119, base stage (base) 191.Wherein, label 195 is to be shallow groove isolation structure (STI).Base stage 191 mainly is to be script n type metal oxide semiconductor (n-MOS) p type wells (p-well) that structure had.Emitter 198 ' then is source electrode or the drain electrode in script n type metal oxide semiconductor (n-MOS) structure.N type well 192 and N type doped region 198 that P type doped region 197 that base stage 191 2 ends are coupled and collector electrode 119 2 ends are coupled, it can reduce base stage 191 and cheat with the resistance of collector electrode 119.
By above-mentioned execution mode, then can reduce the noise ratio (noise to signal ratio) of direct conversion hysteria radio frequency receiver effectively.Because under the situation of low frequency (less than 10MHz), the noise source of mixer 30 is mainly frequency inverse ratio noise (1/f noise), and it is provided by the present invention directly to npn (Vnpn) type bipolar transistor (as Fig. 3), its frequency inverse ratio noise reduces about 100 times far beyond n type metal oxide semiconductor (n-MOS), so mixer of the present invention 30 is to promote significantly on the performance of noise subject under discussion.
Please refer to Fig. 4, Fig. 4 is another embodiment of the present invention circuit diagram.Wherein the first transistor 361 by utilize metal-oxide semiconductor (MOS) (MOS) structure horizontal pnp (Lpnp) the type bipolar transistor that forms of parasitism.Present embodiment is implemented it with the first transistor in the load circuit 36 361 with bipolar transistor, and thus, the linearity of the direct conversion hysteria radio frequency receiver that is provided is to be raised effectively.On the books in many documents, be arranged in load circuit 36, and superposition first p type metal oxide semiconductor (p-MOS) element after change-over circuit 34, its linearity performance (being the IIP3 parameter) for load circuit 36 has very important negative effect.Therefore, adopt bipolar transistor for the first transistor 361, to replace traditional pMOS element, bipolar transistor has lower input impedance (Zm), and can produce higher gain (gm).Therefore, with regard to the electric current aspect, modulation signal 44 can be seen the impedance lower than known technology at the first transistor 361, thus, can suppress the non-linear output that produced because of the first transistor 361, therefore the performance of the present invention on the IIP3 parameter can have significantly and promote.
But as previously mentioned, under complementary metal oxide semiconductors (CMOS) (CMOS) processing procedure of general direct conversion hysteria radio frequency receiver, do not have the processing procedure of bipolar transistor.And if adopt the way of similar previous embodiment, pMOS element parasitism is formed directly to pnp (vertical pnp) structure, though conceptive feasible, when being put to make, the discovery performance is very low actual.This is because (order from top to bottom with dark p type wells by P type doped region, N type well, not shown) formed directly to pnp type bipolar transistor can because collector electrode do not have isolation terminal (isolated collector terminal), meaning is-collector electrode (collector) and base stage (substrate) formation short circuit, cause low β value (only 2.5) thus, and cause performance clear.
Based on such reason, the present invention utilizes the pMOS element to form the mode of horizontal pnp (Lpnp) type bipolar transistor with parasitism, to implement it.Please refer to Fig. 5 A and Fig. 5 B, Fig. 5 A is a typical pMOS element, Fig. 5 B then horizontal pnp (Lpnp) the type bipolar transistor that forms by the pMOS element that utilizes Fig. 5 A of parasitism.Collector electrode 298, base stage 291 have formed required bipolar transistor structure with emitter 298 ' shown in Fig. 5 B.Wherein, as the P type doped region of source electrode or drain electrode, it then becomes collector electrode 298 or emitter 298 ' to script in the present embodiment in the pMOS element; Originally the N type well in the pMOS element, it is positioned at part between collector electrode 298 and the emitter 298 ' in order to as base stage 291.In the operation, need to feed reference potential (VDD),, choose the road through from grid 295 to avoid signal so that pMOS is closed for the grid in the script pMOS element 295.
Via above-mentioned execution mode, take bipolar transistor to implement it for shown in Figure 4 this to transistor seconds 362, then at least can be so that the IIP3 parameter maintain the required performance of standard, even, can exceed the required performance of standard.Generally speaking, in simulation test (simulation), if transistor seconds 362 is the pMOS element, then the linearity of load circuit 36 (IIP3 parameter) is understood the 3～4dBm that therefore detract; If it is a bipolar transistor, the IIP3 parameter is maintained an equal level, even have preferable linearity result.For example, passage length is under the CMOS processing procedure of 0.3 micron (μ m), and the transistor seconds 362 of standard need have the cut-off frequency (f that is higher than 10MHz
T), and under the same process condition, utilize the formed horizontal pnp of method of the present invention (Lpnp) type bipolar transistor (as Fig. 5 B), then be very easy to surmount this standard.
Please refer to Fig. 6, Fig. 6 is another embodiment of the present invention circuit diagram.Present embodiment is the advantage in conjunction with Fig. 2 embodiment and Fig. 4 embodiment, makes the first transistor 361 wherein, utilizes the pMOS element in tables of known complementary metal-oxide semiconductor (MOS) (CMOS) process technique to form horizontal pnp (Lpnp) type bipolar transistor with parasitism; On the other hand, then make transistor seconds 362 wherein, utilize the nMOS element in tables of known complementary metal-oxide semiconductor (MOS) (CMOS) process technique to form directly to npn (Vnpn) type bipolar transistor with parasitism.By above-mentioned execution mode, be to provide to have the mixer 30 of good linearity and low noise direct conversion hysteria radio frequency receiver as shown in Figure 6.And, cooperate the present invention to have the design of good balancing circuitry, the present invention also has remarkable inhibition effect for the problem of DC voltage offset.And another advantage of the present invention, then be to use existing complementary metal oxide semiconductors (CMOS) (CMOS) processing procedure at present, only on integrated circuit layout (layout), utilize small change, and do not need to increase light shield or change processing procedure, and do not make direct conversion hysteria radio frequency receiver not but still can meet single-chip and integrate trend, and has more performance.Comprehensive the above, the present invention not only has obvious improvement technically, and can be merged in the existing industry and equipment, benefits very huge for the lifting of industrial competitiveness.
Though the present invention illustrates as above with preferred embodiments, so it is not only to terminate in the foregoing description that in order to limit the present invention's spirit with the invention entity.To those skilled in the art, when understanding and utilize other element or mode to produce identical effect easily.Be with, the modification of being done in not breaking away from spirit of the present invention and scope all should be included in the described claim scope.
Claims (10)
1. mixer that utilizes the direct conversion hysteria radio frequency receiver that the complementary metal oxide semiconductors (CMOS) processing procedure makes comprises:
Gain circuitry receives the radiofrequency signal of differential pattern, to produce first gain signal;
Change-over circuit in order to this first gain signal is mixed with local oscillated signal, produces modulation signal with direct frequency reducing; And
Load circuit, comprise the first transistor, transistor seconds and impedance unit, this impedance unit provides gain parameter, this the first transistor provides Low ESR, so that this modulation signal continues to input to this load circuit, this transistor seconds provides high impedance, meets second gain signal of this gain parameter with lead this impedance unit and output of this modulation signal that will input to this load circuit
Wherein, this transistor seconds be by utilize metal-oxide-semiconductor structure parasitism form directly to npn type bipolar transistor, by this, can reduce the noise ratio of this direct conversion hysteria radio frequency receiver.
2. the mixer of direct conversion hysteria radio frequency receiver according to claim 1, wherein this first transistor be by utilize metal-oxide-semiconductor structure the horizontal pnp type bipolar transistor that forms of parasitism, to promote the linearity of this direct conversion hysteria radio frequency receiver.
3. the mixer of direct conversion hysteria radio frequency receiver according to claim 1, wherein this first gain signal, this modulation signal and this second gain signal are all differential pattern.
4. the mixer of direct conversion hysteria radio frequency receiver according to claim 1, this radiofrequency signal corresponding to differential pattern, and have a pair of this first transistor and a pair of this transistor seconds, and belong to respectively this load circuit the first and the second portion of parallel differentiation.
5. the mixer of direct conversion hysteria radio frequency receiver according to claim 4 should be to have a common gate to this first transistor wherein, with this first that keeps this load circuit and the balance of this second portion.
6. the mixer of direct conversion hysteria radio frequency receiver according to claim 4 should be to have a common gate to this transistor seconds wherein, with this first that keeps this load circuit and the balance of this second portion.
7. the mixer of direct conversion hysteria radio frequency receiver according to claim 1, wherein this impedance unit is to be selected from electric capacity, resistance or its combination in any.
8. the mixer of direct conversion hysteria radio frequency receiver according to claim 1, wherein this transistor seconds is coupled in resistance so that this high impedance to be provided.
9. the mixer of direct conversion hysteria radio frequency receiver according to claim 4 should be to form current mirror to this transistor seconds wherein.
10. the mixer of direct conversion hysteria radio frequency receiver according to claim 4, wherein this common gate contact to transistor seconds is to be coupled in feedback unit, is fed back with the asymmetric situation of detection signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100965956A CN100428641C (en) | 2005-08-25 | 2005-08-25 | Mixer of direct-conversion RF receiver |
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|---|---|---|---|
| CNB2005100965956A CN100428641C (en) | 2005-08-25 | 2005-08-25 | Mixer of direct-conversion RF receiver |
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| CN1731691A true CN1731691A (en) | 2006-02-08 |
| CN100428641C CN100428641C (en) | 2008-10-22 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007065270A1 (en) * | 2005-12-09 | 2007-06-14 | Sirific Wireless Corporation | Wideband mixer with multi-standard input |
| CN101842994B (en) * | 2007-10-30 | 2013-12-25 | 高通股份有限公司 | Degenerated passive mixer in SAW-less receiver |
| CN109831160A (en) * | 2019-01-25 | 2019-05-31 | 南方科技大学 | A kind of negative resistance type Voltage-Controlled oscillation circuit and voltage controlled oscillator |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1184971A1 (en) * | 2000-08-17 | 2002-03-06 | Motorola, Inc. | Switching mixer |
| JP2003243937A (en) * | 2002-02-20 | 2003-08-29 | Mitsubishi Electric Corp | Mixer circuit |
| US6667649B1 (en) * | 2002-05-15 | 2003-12-23 | Ralink Technology, Inc. | Method and system for utilizing a high-performance mixer as a complete receiver |
| KR20050085719A (en) * | 2002-12-19 | 2005-08-29 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | Minimizing 1/f noise configuration for zif mixer |
-
2005
- 2005-08-25 CN CNB2005100965956A patent/CN100428641C/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007065270A1 (en) * | 2005-12-09 | 2007-06-14 | Sirific Wireless Corporation | Wideband mixer with multi-standard input |
| CN101842994B (en) * | 2007-10-30 | 2013-12-25 | 高通股份有限公司 | Degenerated passive mixer in SAW-less receiver |
| CN109831160A (en) * | 2019-01-25 | 2019-05-31 | 南方科技大学 | A kind of negative resistance type Voltage-Controlled oscillation circuit and voltage controlled oscillator |
| CN109831160B (en) * | 2019-01-25 | 2023-09-22 | 南方科技大学 | Negative resistance type voltage-controlled oscillating circuit and voltage-controlled oscillator |
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| Publication number | Publication date |
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| CN100428641C (en) | 2008-10-22 |
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