CN1716554A - 一种p型mosfet的结构及其制作方法 - Google Patents
一种p型mosfet的结构及其制作方法 Download PDFInfo
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- CN1716554A CN1716554A CNA2005100789757A CN200510078975A CN1716554A CN 1716554 A CN1716554 A CN 1716554A CN A2005100789757 A CNA2005100789757 A CN A2005100789757A CN 200510078975 A CN200510078975 A CN 200510078975A CN 1716554 A CN1716554 A CN 1716554A
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- 238000000034 method Methods 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title description 4
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 51
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 50
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 40
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 26
- 239000010703 silicon Substances 0.000 claims abstract description 26
- 239000012212 insulator Substances 0.000 claims abstract description 17
- 238000000137 annealing Methods 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 25
- 239000002019 doping agent Substances 0.000 claims description 18
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- 230000008021 deposition Effects 0.000 claims description 6
- 239000012535 impurity Substances 0.000 claims description 3
- 238000000151 deposition Methods 0.000 abstract description 7
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 abstract description 2
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- 238000002360 preparation method Methods 0.000 description 2
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims (25)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/710,244 | 2004-06-29 | ||
US10/710,244 US7288443B2 (en) | 2004-06-29 | 2004-06-29 | Structures and methods for manufacturing p-type MOSFET with graded embedded silicon-germanium source-drain and/or extension |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1716554A true CN1716554A (zh) | 2006-01-04 |
CN100444336C CN100444336C (zh) | 2008-12-17 |
Family
ID=35504716
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100789757A Expired - Fee Related CN100444336C (zh) | 2004-06-29 | 2005-06-21 | 一种p型mosfet的结构及其制作方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7288443B2 (zh) |
JP (1) | JP5043314B2 (zh) |
CN (1) | CN100444336C (zh) |
TW (1) | TW200625460A (zh) |
Cited By (10)
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CN100452431C (zh) * | 2005-01-12 | 2009-01-14 | 台湾积体电路制造股份有限公司 | 具有局部应力结构的金属氧化物半导体场效应晶体管 |
CN100466255C (zh) * | 2006-04-18 | 2009-03-04 | 联华电子股份有限公司 | 半导体结构及其制作方法 |
CN101295641B (zh) * | 2007-04-24 | 2010-09-29 | 中芯国际集成电路制造(上海)有限公司 | 栅极制造方法 |
CN101458337B (zh) * | 2007-12-12 | 2010-12-08 | 中国科学院微电子研究所 | 基于绝缘体上硅的双探头pmos辐射剂量计 |
CN101986423A (zh) * | 2009-07-28 | 2011-03-16 | 台湾积体电路制造股份有限公司 | 形成高锗浓度的硅锗应力源的方法及集成电路晶体管结构 |
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WO2012013036A1 (zh) * | 2010-07-27 | 2012-02-02 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
CN102569383A (zh) * | 2010-12-14 | 2012-07-11 | 中国科学院微电子研究所 | 一种mos管及其制造方法 |
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CN112635325A (zh) * | 2020-12-07 | 2021-04-09 | 广东省大湾区集成电路与***应用研究院 | 一种绝缘体上应变硅/锗晶体管及其制备方法 |
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US7018901B1 (en) * | 2004-09-29 | 2006-03-28 | Freescale Semiconductor, Inc. | Method for forming a semiconductor device having a strained channel and a heterojunction source/drain |
DE102005013982A1 (de) * | 2005-03-26 | 2006-10-05 | Atmel Germany Gmbh | Verfahren zur Herstellung eines Bipolartransistors und nach einem derartigen Verfahren hergestellter Bipolartransistor |
US7439165B2 (en) * | 2005-04-06 | 2008-10-21 | Agency For Sceince, Technology And Reasearch | Method of fabricating tensile strained layers and compressive strain layers for a CMOS device |
US7446350B2 (en) * | 2005-05-10 | 2008-11-04 | International Business Machine Corporation | Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer |
KR100675895B1 (ko) * | 2005-06-29 | 2007-02-02 | 주식회사 하이닉스반도체 | 반도체소자의 금속배선구조 및 그 제조방법 |
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US8211761B2 (en) * | 2006-08-16 | 2012-07-03 | Globalfoundries Singapore Pte. Ltd. | Semiconductor system using germanium condensation |
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US7696000B2 (en) | 2006-12-01 | 2010-04-13 | International Business Machines Corporation | Low defect Si:C layer with retrograde carbon profile |
KR100844933B1 (ko) * | 2007-06-26 | 2008-07-09 | 주식회사 하이닉스반도체 | 반도체 소자의 트랜지스터 및 그 제조 방법 |
US7709331B2 (en) * | 2007-09-07 | 2010-05-04 | Freescale Semiconductor, Inc. | Dual gate oxide device integration |
US7704844B2 (en) * | 2007-10-04 | 2010-04-27 | International Business Machines Corporation | High performance MOSFET |
US7964910B2 (en) | 2007-10-17 | 2011-06-21 | International Business Machines Corporation | Planar field effect transistor structure having an angled crystallographic etch-defined source/drain recess and a method of forming the transistor structure |
US20090242989A1 (en) * | 2008-03-25 | 2009-10-01 | Chan Kevin K | Complementary metal-oxide-semiconductor device with embedded stressor |
US7955909B2 (en) * | 2008-03-28 | 2011-06-07 | International Business Machines Corporation | Strained ultra-thin SOI transistor formed by replacement gate |
FR2936095B1 (fr) * | 2008-09-18 | 2011-04-01 | Commissariat Energie Atomique | Procede de fabrication d'un dispositif microelectronique dote de zones semi-conductrices sur isolant a gradient horizontal de concentration en ge. |
WO2011030782A1 (ja) * | 2009-09-09 | 2011-03-17 | 学校法人神奈川大学 | 半導体素子構造の形成方法、及び半導体素子 |
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US7288443B2 (en) | 2007-10-30 |
JP2006019727A (ja) | 2006-01-19 |
US20050285192A1 (en) | 2005-12-29 |
JP5043314B2 (ja) | 2012-10-10 |
CN100444336C (zh) | 2008-12-17 |
TW200625460A (en) | 2006-07-16 |
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