CN1702719A - Plasma display device and driving method of plasma display panel - Google Patents
Plasma display device and driving method of plasma display panel Download PDFInfo
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- CN1702719A CN1702719A CNA2005100817831A CN200510081783A CN1702719A CN 1702719 A CN1702719 A CN 1702719A CN A2005100817831 A CNA2005100817831 A CN A2005100817831A CN 200510081783 A CN200510081783 A CN 200510081783A CN 1702719 A CN1702719 A CN 1702719A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
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- Plasma & Fusion (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
A method for driving a plasma display panel having a plurality of scan, sustain, and address electrodes is presented. Reset, address, and sustain discharge are performed by applying a driving waveform to a scan electrode while the sustain electrode is biased at a ground voltage. Address electrode is set to be at a positive voltage while the voltage of the scan electrode is gradually increased during the reset period. The foregoing driving voltage scheme obviates the need for a separate driving board for the sustain electrode. A single integrated board is sufficient for driving the scan and sustain electrodes. Various slopes for rising and falling portions of the scan waveform during the reset period are presented. A falling only reset period in second and subsequent subfields is used.
Description
Technical field
The present invention relates to a kind of method and a kind of plasma display system that is used to drive plasma display, more particularly, relate to a kind of driving voltage scheme, they can be at the needs of different driving electrode elimination to the individual drive plate.
Background technology
Plasma display (PDP) is a kind of flat-panel monitor, and its utilization comes character display or image by the plasma that gas discharge produced in discharge cell.According to its size, PDP comprise with matrix pattern arrange tens of to millions of above pixels.With a frame definition among the PDP is the time cycle, and all pixels during this time cycle in the counter plate are carried out addressing.A frame is divided into a plurality of son, and each son field comprises the reset cycle, addressing period and keeping the cycle.
Reset cycle is used for the state of each discharge cell is carried out initialization, so that the addressing operation on this discharge cell.Addressing period is used to select the conduction and cut-off unit, promptly must conducting or by demonstrating the unit of expection image, and be used at onunit accumulation wall electric charge, described onunit is addressed to be switched on.The cycle of keeping be used to make the unit or continue discharge so as on the unit of addressing display image, perhaps keep non-activation (inactive).
In order to carry out aforesaid operations and to demonstrate image, during the cycle of keeping,, and during reset cycle and addressing period, reset wave and addressing waveforms are imposed on scan electrode alternately to scan electrode with keep electrode and apply and keep pulse.Thus, need to be used for the turntable driving plate of driven sweep electrode and be used to drive the drive plate of keeping of keeping electrode respectively.These two independent drive plates are installed on base plate can have problems, and can improve the overall cost of device.
For two drive plates are combined in the single compoboard, have proposed single compoboard and scan electrode coupling, and will keep electrode and extend the scheme that arrives this compoboard.Yet, when two drive plates are so made up, can increase the impedance composition of keeping on the electrode to be produced that is extending.
Summary of the invention
The invention provides a kind of plasm display device, it has the single circuit board that is used for the driven sweep electrode and keeps electrode.The present invention also provides a kind of drive waveforms that is used for this single circuit board.Drive waveforms is imposed on electrode, and another electrode biasing constant voltage.Exemplary embodiment of the present invention proposes a kind of method that is used to drive PDP.Typically, PDP comprises scan electrode, keep electrode and address electrode, scan electrode with keep electrode and form parallel rightly, address electrode is parallel to extending perpendicular to this, this method drives plasma display in image duration, each frame all has the son field, and each son field all has the reset cycle, is addressing period afterwards, be the cycle of keeping afterwards, the reset cycle comprises rising cycle and decline cycle.
The illustrative methods that is used to drive PDP comprises: keep keeping electrode first voltage of setovering at each sub-field period; Voltage with scan electrode during the rising cycle increases to tertiary voltage gradually from second voltage; The voltage of scan electrode is reduced to the 4th voltage from tertiary voltage; Voltage with scan electrode during decline cycle is reduced to the 5th voltage gradually from the 4th voltage; During addressing period, select discharge cell by applying scanning voltage and non-scanning voltage to scan electrode and applying addressing pulse to address electrode; And during the cycle of keeping, making the discharge cell of selection keep discharge by apply pulse to scan electrode, this pulse alternately has the 6th voltage or less than the 7th voltage of the 6th voltage.Address electrode the 8th voltage of can during decline cycle and part addressing period, setovering.In the scheme that changes, address electrode just can be setovered (positive) greater than the 9th voltage of the 8th voltage during the whole rising cycle.In the scheme of another change, address electrode just can be setovered during the part rising cycle greater than the 9th voltage of the 8th voltage.In the scheme of another change, the voltage of address electrode just can increase to the voltage greater than the 8th voltage gradually during the part rising cycle.In the scheme of another change, address electrode can float during the rising cycle.
In the disclosed method that is used for driving PDP, the 9th voltage can equate with addressing pulse voltage.First voltage can be ground voltage.The 4th voltage can be ground voltage.The 6th voltage can equate with the 4th voltage.The 8th voltage can be ground voltage.Tertiary voltage can be a positive voltage, and the 5th voltage is the negative voltage of absolute value greater than tertiary voltage, the 4th voltage be lower than ground voltage and be higher than tertiary voltage and twice the 5th voltage and.In one embodiment, the voltage of scan electrode can be reduced to the 6th voltage from tertiary voltage between rising cycle and decline cycle, and is reduced to ground voltage from the 6th voltage, is reduced to the 5th voltage gradually from ground voltage afterwards during decline cycle.
Can be set to the son field, make the reset cycle of the son field of winning comprise rising cycle and decline cycle, and sub subsequently reset cycle only comprises decline cycle.Under the sort of situation, the voltage of scan electrode can subsequently the son decline cycle during be reduced to the 5th voltage gradually from the 4th voltage.Subsequently the son decline cycle during, the voltage of scan electrode is reduced to the 5th voltage gradually from the 4th voltage, this process can comprise that at first the voltage with scan electrode is reduced to ground voltage from the 4th voltage, and the voltage with this scan electrode is reduced to the 5th voltage gradually from ground voltage afterwards.
Also proposed a kind of plasm display device, it comprises: PDP; Control panel is used for frame is divided into a plurality of sons field; And drive plate, be used for applying the drive waveforms that is used for display image on plasma display, and be used for will keeping electrode first voltage of setovering at a plurality of sub-field periods to scan electrode and address electrode.Drive plate produces discharge, is used for initialization unit during the reset cycle of at least one height field, and this discharge at first produces between scan electrode and address electrode, then at scan electrode with keep between the electrode and produce.Drive plate can produce discharge by voltage that increases scan electrode gradually and the voltage that reduces scan electrode subsequently gradually.Drive plate can reduce to produce discharge from reference voltage gradually by the voltage with scan electrode.Drive plate can reduce to produce discharge from the voltage that is lower than reference voltage gradually by the voltage with scan electrode.Drive plate can drive plate increase gradually scan electrode voltage during apply voltage to address electrode, the voltage that is applied is just greater than the voltage of the address electrode that imposes on during the voltage that reduces scan electrode at drive plate gradually.Drive plate can apply pulse to scan electrode, keeps discharge so that carry out, and this pulse alternately has voltage that is higher than reference voltage or the voltage that is lower than reference voltage.
Description of drawings
Fig. 1 illustrates the decomposition diagram of plasm display device according to an exemplary embodiment of the present invention.
Fig. 2 illustrates the synoptic diagram of plasma display according to an exemplary embodiment of the present invention.
Fig. 3 illustrates the planimetric map of plasm display device base plate according to an exemplary embodiment of the present invention.
Fig. 4 illustrates the drive waveforms of first exemplary embodiment according to the present invention.
Fig. 5 produces the wall charge condition of the unit of discharge by force during being illustrated in the reset cycle.
Fig. 6, Fig. 7, Fig. 8, Fig. 9, Figure 10, Figure 11, Figure 12 and Figure 13 illustrate the plasma display panel driving waveform of second to the 9th exemplary embodiment according to the present invention respectively.
Figure 14 is illustrated in and keeps the wall charge condition that discharge finishes unit afterwards.
Embodiment
At Fig. 1, shown in Fig. 2 and Fig. 3 according to the schematic construction of the plasm display device of the embodiment of the invention.
As shown in fig. 1, plasm display device comprises plasma display 10, base plate 20, front housing 30 and back cabinet 40.Base plate 20 be coupled to plasma display 10 in image show the relative plasma display 10 of side.Front housing 30 is coupled to the plasma display 10 on the image demonstration side in the plasma display 10.Back cabinet 40 and base plate 20 couplings.These parts be combined to form plasm display device.
As shown in Figure 2, the PDP among Fig. 1 10 comprise a plurality of address (A) electrode A 1 to Am of extending along column direction and a plurality of each all follow scanning (Y) electrode Y1 that direction extends to Yn and a plurality of keeping (X) electrode X1 to Xn.Corresponding maintenance electrode X1 is corresponding to Yn with corresponding scan electrode Y1 to Xn.The subpixel area of describing discharge space forms discharge cell 12, and the A electrode intersects at this discharge space with Y and X electrode.
As shown in Figure 3, on base plate 20, be formed for driving the drive plate 100,200,300,400,500 of plasma display 10.Addressing buffer board 100 is formed on the top and the bottom of base plate 20.Will shown in structure be considered as the double drive scheme, apply addressing voltage from the top side and the bottom side of base plate 20, and can change it according to drive scheme.For example, in single drive scheme, addressing buffer board 100 is arranged on the top or the bottom of base plate 20.In addition, this addressing buffer board 100 can form veneer, or the combination of a plurality of plates.
Addressing buffer board 100 receives the addressing drive control signal that comes from control panel 400, and applies the voltage that is used to select onunit to suitable A electrode.The constant voltage of keeping of X electrode biasing.
Turntable driving plate 200 is arranged on the left side of base plate 20, and is coupled by scanning buffer plate 300 and Y electrode.During addressing period, scanning buffer plate 300 is used for selecting according to priority scan electrode Y1 to Yn to the Y electrode application voltage.Turntable driving plate 200 receives the drive signal that comes from control panel 400, and applies driving voltage to the Y electrode of selecting.In Fig. 3,, also they can be arranged on the right side of base plate 20 though express turntable driving plate 200 and the scanning buffer plate 300 that is arranged on base plate 20 left sides.And, scanning buffer plate 300 and turntable driving plate 200 can be formed an integrated component together.
Receive picture signal from the outside, control panel 400 produces the control signal that is used to drive the control signal of A electrode and is used to drive Y, X electrode.Control panel 400 is subsequently to addressing buffer board 100, and turntable driving plate 200 and scanning buffer plate 300 apply control signal.Power panel 500 applies power supply to drive this plasma display device.Control panel 400 and power panel 500 are arranged on the central area of base plate 20.
Fig. 4 represents the plasma display panel driving waveform of first exemplary embodiment according to the present invention.In order to be easy to describe, to imposing on the Y electrode, the drive waveforms of X electrode and A electrode only makes up a unit 12 (Fig. 2) and carries out exemplary description.In drive waveforms shown in Figure 4, and referring to Fig. 3, the Y electrode receives the voltage that comes from turntable driving plate 200 and scanning buffer plate 300, and the A electrode receives the voltage that comes from addressing buffer board 100.With X electrode biasing constant reference voltage, (0V) represents this constant reference voltage with the ground voltage among Fig. 4.
As mentioned above, PDP is driven, and frame is divided into the son field in image duration.As shown in Figure 4, one of drive waveforms son field is divided into three cycles, i.e. reset cycle, addressing period and keeping the cycle.Reset cycle has rising cycle and decline cycle.
During the rising cycle of reset cycle, the voltage of Y electrode is increased to voltage Vset gradually from voltage Vs, and the A electrode is remained among Fig. 4 by the represented reference voltage of 0V line.The voltage of Y electrode increases between Vs and Vset obliquely.When increasing the voltage of Y electrode, between Y and X electrode, and produce weak discharge between Y and the A electrode, and on the Y electrode, form (-) wall electric charge, on X and A electrode, form (+) wall electric charge.In addition, when changing the voltage of Y electrode gradually, as shown in Figure 4, in unit 12 (Fig. 2), cause weak discharge, and form the wall electric charge thus, thereby the summation that the outside can be applied voltage and wall electric charge remains discharge excitation (firing) voltage.
Wall electric charge described in the present invention relates to and is formed on discharge cell 12 (Fig. 2) wall and is accumulated in electric charge on the electrode, and this discharge cell 12 is near each electrode (X, Y, or A).The wall electric charge is described as " formation " or " accumulation " on electrode (X, Y, or A), but in fact these wall electric charges do not touch electrode.In addition, wall voltage Vw means by the wall electric charge and makes the electric potential difference that forms between the wall of discharge cell 12 (Fig. 2).
Voltage Vset is sufficiently high voltage, thereby can make any condition lower unit 12 excite discharge, because must carry out initialization to each unit 12 (Fig. 2) during the reset cycle.Usually, voltage Vs equals to impose on the voltage of Y electrode during the cycle of keeping, and less than between Y electrode and X electrode, exciting the required voltage of discharge.
During the decline cycle of reset cycle, the voltage of Y electrode is reduced to voltage Vnf gradually from voltage Vs, and the voltage of A electrode is remained reference voltage.The result is when reducing the voltage of Y electrode, between Y and X electrode, and to produce weak discharge between Y and the A electrode, and thus, eliminated (-) wall electric charge that is formed on the Y electrode and (+) wall electric charge that is formed on X, the A electrode.Voltage Vnf is arranged to approach Y and X electric discharge between electrodes exciting voltage.Afterwards, the wall voltage between Y and the X electrode reaches and is almost 0V, and thus, can prevent from not utilize address discharge and the unit 12 (Fig. 2) of addressing does not excite (misfiring) during keeping the cycle at addressing period.Determine wall voltage between Y and the A electrode by the size of Vnf, because the voltage of A electrode is remained reference voltage.
Next, during being used to select the addressing period of onunit 12, Y electrode and the A electrode to onunit 12 (Fig. 2) applies scanning impulse VscL and addressing pulse Va respectively.The biasing of unselected Y electrode is higher than the voltage VscH of VscL, and applies reference voltage to the A electrode in the unit.Scanning buffer plate 300 is selected and will be applied the Y electrode of scanning impulse VscL to it in Yn at scan electrode Y1.For example, in single driving method, can in column direction, select the Y electrode by the distributing order by the Y electrode.When selecting the Y electrode, addressing buffer board 100 along select in the unit of the Y electrode of selecting will conducting unit 12.That is, addressing buffer board 100 is selected the A electrode at address electrode A1 in Am, to the addressing pulse of this A electrode application voltage Va.
At first scanning impulse is imposed on the Y electrode of first row in (Y1) with voltage VscL form.Simultaneously, addressing pulse is imposed on the A electrode of being about to want on the unit 12 of conducting along first with voltage Va form.Then, first row in (Y1) the Y electrode and receive between the A electrode of voltage Va and produce discharge.Thus, on the Y electrode, form (+) wall electric charge, and on A electrode and X electrode, form (-) wall electric charge.As a result of, the wall electromotive force that is higher than contiguous X electrode owing to the wall electromotive force of contiguous Y electrode between X and Y electrode forms wall voltage Vwxy.Then, when scanning voltage being imposed on the Y electrode of second row in (Y2) with voltage VscL form, addressing pulse is imposed on the A electrode of being about to want in the unit 12 of conducting along second with voltage Va form.Afterwards, produce address discharge in the unit 12 that the A electrode of reception voltage Va and Y electrode are intersected in by second row (Y2), and in those unit 12, form the wall electric charge in the above described manner thus.Consider the Y electrode in other row, in the mode identical with aforesaid way, will form the wall electric charge in the unit 12 of conducting, described mode promptly, by with addressing pulse, voltage Va imposes on the A electrode on will the unit 12 of conducting, and simultaneously with scanning impulse, voltage VscL sequentially imposes on from first row (Y1) Y electrode of delegation (Yn) to the end.
During above-mentioned addressing period, usually voltage VscL is arranged to be equal to or less than voltage Vnf, and usually voltage Va is arranged to be higher than reference voltage.Now combination voltage VscL is equaled the situation of voltage Vnf, to being described by the address discharge that is produced to A electrode application voltage Va.When applying voltage Vnf in the reset cycle, interelectrode wall voltage of A, Y and the interelectrode external voltage Vnf of A, Y sum reach the interelectrode discharge excitation voltage of A, Y Vfay.For example,, apply 0V, and when the voltage VscL that equates with Vnf in this situation imposed on the Y electrode, between A and Y electrode, form voltage Vfay, and expectation produces discharge thus to the A electrode when in addressing period.Yet, in this case, do not produce desired discharge, because the discharge time-delay is greater than the width of scanning impulse and addressing pulse.Yet, if to A electrode application voltage Va, and to Y electrode application voltage VscL=Vnf, then between A and Y electrode, can produce the voltage that is higher than exciting voltage Vfay, and thus, reduced the discharge time-delay and made its width, thereby allow to produce discharge less than scanning impulse.Voltage difference between electrode A and the Y increases along with the increase of Va and VscL size, because Va is positive, and VscL bears, and the increase of their sizes means voltage difference bigger between them.Similarly, can promote to produce address discharge by voltage VscL is arranged to be lower than voltage Vnf.
Subsequently, during the cycle of keeping, between Y and X electrode, produce and keep discharge by initially apply pulse with voltage Vs form to suitable Y electrode.Just before applying this voltage, form wall voltage Vwxy, thereby make the electromotive force of Y electrode be higher than the electromotive force of X electrode in the unit 12 that in addressing period, lives through address discharge.During the cycle of keeping, voltage Vs is arranged to be lower than discharge excitation voltage Vfxy, and voltage Vs+Vwxy sum is arranged to be higher than voltage Vfxy.By this way, to the X electrode, existing positive wall voltage Vwxy does not produce discharge before applying Vs from the Y electrode.Simultaneously, in case Vs arrives, then these two common positive voltage sums will reach and be higher than the required voltage of exciting voltage discharge between X and Y, and keep discharge.
The result who keeps discharge is form (-) wall electric charge on the Y electrode, and form (+) wall electric charge on A electrode and X electrode, thereby the electromotive force of X electrode wall to be higher than the electromotive force of Y electrode wall.Because formed voltage Vwxy, thereby the electromotive force of the electromotive force of Y electrode self rather than its adjacent wall will become than the electromotive force height of X electrode self, apply the pulse of negative voltage-Vs to the Y electrode, to excite the discharge of keeping subsequently.The result of this discharge is, in case form (+) wall electric charge at the Y electrode once more, forms (-) wall electric charge on X and A electrode, thereby produces another and keep discharge by apply positive voltage Vs to the Y electrode.
Corresponding with the weighted value of corresponding son, repeat certain number of times alternately apply Vs to the Y electrode with the processing that-Vs keeps discharge pulse.
As mentioned above,, can reset addressing and keep operation by only applying drive waveforms and X electrode bias reference voltage carried out to the Y electrode according to the first embodiment of the invention shown in Fig. 4.Therefore, not needing to be used to drive the drive plate of X electrode, and can make the X electrode keep bias reference voltage simply, for example is 0V.
As shown in Figure 4, according to first exemplary embodiment, can approach Y and the interelectrode discharge excitation voltage of X Vfxy as the final voltage Vnf of the voltage that during the decline cycle of reset cycle, is applied to the Y electrode.Yet,, can be positive voltage with respect to the wall electromotive force of the Y electrode of A electrode, because the interelectrode discharge excitation voltage of Y and A Vfay is usually less than Y and the interelectrode discharge excitation voltage of X Vfxy at the final voltage Vnf of decline cycle.
When in unit 12, keeping above-mentioned wall state of charge, begin the reset cycle of son subsequently, because in those experience the unit 12 of address discharge, do not keep discharge.
In the above-mentioned state of unit 12 (Fig. 2), the wall electromotive force of the relative X electrode of Y electrode is higher than the wall electromotive force of the relative A electrode of Y electrode.Thus, when the voltage of Y electrode increased in the rising cycle in the reset cycle, can be after A and the interelectrode voltage of Y surpass discharge excitation voltage Vfay, the interelectrode voltage of X and Y surpasses discharge excitation voltage Vfxy.
In PDP, the material with high secondary electron yield covers X and Y electrode usually, is used for increasing and keeps discharge performance, and cover the A electrode with phosphorus, is used for colored the demonstration.Can be with the material of MgO film as this high secondary electron yield.When bumping against negatron, positive ion determines discharge unit 12 (Fig. 2) by the secondary electron amount of launching from negative electrode.This secondary that will come from the Y electrode is called " Y processing ".
During the rising cycle of reset cycle, the Y electrode is operated as positive electrode, and A electrode and X electrode are operated as negative electrode, because higher voltage is imposed on the Y electrode.
Yet during the rising cycle, when A and the interelectrode voltage of Y surpass discharge excitation voltage Vfay, may delay time, operate as negative electrode because will cover the A electrode of phosphorus at A and Y electric discharge between electrodes.Because the discharge time-delay, when in fact producing discharge between Y and A electrode, the voltage Vay between Y and A electrode is greater than discharge excitation voltage Vfay.Thus,, the high voltage that the discharge time-delay is caused between Y and A electrode, produces strong discharge because making, rather than weak discharge.
By the strong discharge between A and Y electrode, can between X and Y electrode, produce another strong discharge.Thus, in unit 12, form than during the normal rising cycle with the more positive wall electric charge of the electric charge that forms, and can produce (priming) particle of igniting of greater number.
Thus, during decline cycle, strong discharge can be produced, the wall electric charge between X shown in Fig. 5 and the Y electrode can not be suitably eliminated by the wall electric charge and the particle of igniting.In this case, when the reset cycle finishes, can keep high wall voltage Vwxy between X in unit 12 (Fig. 2) and the Y electrode.This high wall voltage can not excite producing between X and Y electrode during the cycle of keeping.Fig. 6, Fig. 7, Fig. 8, Fig. 9, Figure 10, Figure 11 illustrate and are used to the exemplary embodiment that prevents that this from not exciting discharge.
Fig. 6, Fig. 7 and Fig. 8 represent the plasma display panel driving waveform of second to the 4th exemplary embodiment according to the present invention respectively.
As shown in Figure 6, though the drive waveforms of second exemplary embodiment and first exemplary embodiment are similar according to the present invention, in a second embodiment, in the rising cycle of reset cycle with A electrode biasing positive voltage.In a second embodiment, during the rising cycle of reset cycle, the voltage of Y electrode is increased to voltage Vset gradually from voltage Vs, and the biasing of A electrode is higher than the constant voltage Va of reference voltage.Thus, if, just there is no need to utilize the additional supply that is used for applying bias voltage to the A electrode with the bias voltage of constant voltage Va as the A electrode.When the voltage of Y electrode increases and during with A electrode bias voltage Va, the interelectrode voltage of A and Y is less than these two interelectrode voltages in first exemplary embodiment of Fig. 5.Thus, before Y and the interelectrode voltage of A surpassed discharge excitation voltage, the interelectrode voltage of X and Y had surpassed discharge excitation voltage.As a result of, form the particle of igniting, and A and the interelectrode voltage of Y surpass discharge excitation voltage thereby between X and Y electrode, produce weak discharge.Can reduce A and the interelectrode discharge time-delay of Y by the particle of igniting.Thus, substitute strong discharge, between A and Y electrode, weak discharge takes place, and suitably form the wall electric charge.Thus, also can in the decline cycle of reset cycle, prevent from not excite, because strong discharge does not take place.
In second embodiment shown in Fig. 6, during the rising cycle with A electrode biasing constant voltage Va, and in the 3rd exemplary embodiment shown in Fig. 7, only stage morning in the cycle of rising with A electrode biasing constant voltage Va.As mentioned above, before X and the interelectrode voltage of Y surpass discharge excitation voltage, surpass discharge excitation voltage, prevent from during the rising cycle, to occur strong discharge by preventing the interelectrode voltage of A and Y.Thus, can be only stage morning in the cycle of rising with A electrode biasing constant voltage Va.After between A and Y electrode, weak discharge taking place, the voltage of A electrode can be established back reference voltage, for example 0V.
In first and second embodiment shown in Fig. 6 and Fig. 7, during the rising cycle,, on the contrary,, can increase the voltage of A electrode gradually according to the 4th exemplary embodiment shown in Fig. 8 with A electrode biasing constant voltage Va.When increasing the voltage of Y and A electrode together, between X and Y electrode, produce weak discharge, because voltage also is reduced to less than this identical voltage when the reference voltage of 0V for example that the A electrode is setovered between A and the Y electrode.Can be the duration of the cycle of rising whole or only during the part in this cycle, increase the voltage of A electrode.
And the voltage of alternative increase A electrode as shown in Figure 8, A electrode also float.When the voltage that increases the Y electrode and A electrode be float the time because between A and Y electrode, form electric capacity,, obtain the waveform shown in Fig. 8 thus so can increase the voltage of A electrode according to the voltage of Y electrode.Can be the duration of the cycle of rising whole or only during the part in this cycle, the voltage of the A electrode that floats.
At Fig. 6, during the rising cycle among Fig. 7 and Fig. 8, be higher than reference voltage by the voltage that increases the A electrode and produce weak discharge, and according to the 5th exemplary embodiment of the present invention shown in Fig. 9, can in decline cycle, control the Y electrode voltage reduce slope.
As shown in Figure 9, the drive waveforms of the 5th exemplary embodiment and first exemplary embodiment are similar according to the present invention.Yet in the 5th embodiment, during the decline cycle of reset cycle, the voltage of Y electrode is reduced to the voltage less than voltage Vs.Among Fig. 9, for example, the beginning voltage that descends is the 0V line, and the Y electrode voltage begins to descend from 0V with a slope.When the decline with the Y electrode begins voltage when being provided with lowlyer, during predetermined decline cycle, the descending slope of Y electrode voltage will be milder.
When the voltage slope of electrode became milder, the discharge that is produced was more weak.Though during the rising cycle, produce strong discharge, during decline cycle, prevented strong discharge, because the change in voltage of Y electrode is slower than the variation in first exemplary embodiment.In the present embodiment, when reference voltage 0V is begun voltage as descending, there is no need to comprise the additional supply that applies to the Y electrode.
When the decline of Y electrode begins voltage when being 0V, similar with the example shown in Fig. 9, do not produce discharge, because when the Y electrode voltage begins to descend, the difference that differs from and impose between the voltage of A and Y electrode that imposes between the voltage of X and Y electrode all is 0V.When reducing the voltage of Y electrode gradually, surpass under the discharge excitation voltage condition being formed on wall voltage on the unit 12 (Fig. 2) and the difference between the outside voltage that applies, produce weak discharge.
Figure 10 illustrates the figure of expression drive waveforms of the 6th exemplary embodiment according to the present invention.As shown in Figure 10, the drive waveforms of the Y electrode in the 5th exemplary embodiment can be applied to second to the 4th exemplary embodiment.For example, the decline of drive waveforms begins voltage and is set to 0V.Thus, prevent from strong discharge took place during the rising cycle of reset cycle, and reduce the slope of decline cycle, because reduced the beginning voltage that descends.
The decline of Y electrode begins voltage and is set to 0V among Fig. 9, and as shown in the Figure 11 that describes the 7th exemplary embodiment, should descend to beginning voltage and be set to negative voltage.When the rising end cycle of reset cycle, provide wall voltage Vwxy between Y and the X electrode by formula 1.In order to prevent the strong discharge during decline cycle, when being lower than decline beginning voltage Vn, the voltage of Y electrode must discharge.As shown in the formula 2, when descending beginning voltage Vn, formed voltage is less than discharge excitation voltage between Y and X electrode.Thus, decline beginning voltage Vn satisfies formula 3.
[formula 1]
Vwxy＝Vset-Vfxy
[formula 2]
Vwxy-Vn＜Vfxy
[formula 3]
Vn＞Vwxy-Vfxy＝Vset-2Vfxy
Usually, in the reset cycle, under all conditions unit is carried out initialization, and the maximum voltage that is applied thus and the difference between the minimum voltage be set to voltage 2Vfxy in this reset cycle, or greater than the voltage of voltage 2Vfxy.In the present embodiment, voltage Vnf is set to negative voltage-Vfxy of discharge excitation voltage Vfxy.Thus, be given in maximum voltage Vset during the reset cycle by formula 4.
[formula 4]
Vset＞2Vfxy+VnfVfxy
Therefore, when the voltage that voltage Vset is arranged between voltage Vfxy and the voltage 2Vfxy, voltage Vn can be arranged to negative voltage.
When voltage Vnf was similar to the negative voltage of discharge excitation voltage Vfxy-Vfxy, formula 3 can be expressed as formula 5.Afterwards, the decline of Y electrode is begun voltage Vn and be reduced to the voltage range that satisfies formula 5.
[formula 5]
Vn＞Vset+2Vnf
When voltage Vn be negative voltage and with the voltage of Y electrode directly when voltage Vset is reduced to voltage Vn, owing to huge change in voltage produces selfdemagnetization (erasing) discharge.Can prevent this selfdemagnetization discharge from the mode that voltage Vset is reduced to voltage Vn step by step by voltage with the Y electrode.For example, the voltage of Y electrode can be reduced to Vs from Vset, be reduced to 0V, be reduced to Vn from 0V then from Vs.Perhaps, the voltage of Y electrode can be reduced to Vs and be reduced to Vn from Vs from Vset.
As mentioned above, embodiments of the invention do not need to be used to drive the plate of X electrode,, simultaneously with X electrode biasing constant voltage, reset addressing and keep discharge operation because by applying drive waveforms to the Y electrode and carry out.In addition, can will be used to apply impedance Control on the path of keeping discharge pulse within a certain degree, because apply the pulse that is used to keep discharge by scanning buffer plate 300.
Each reset cycle that forms a plurality of sons of a field is similar to the reset cycle shown in Fig. 4 and all can comprises rising cycle and decline cycle.Yet as shown in Figure 12, one a little reset cycle can only comprise decline cycle.
Figure 12 illustrates the figure of the plasma display panel driving waveform of expression the 8th exemplary embodiment according to the present invention.In Figure 12, express two son fields in a plurality of sub, and describe in order to be easy to, respectively two sub-fields are described as the first son field and the second son field.The reset cycle of the first son field comprises rising cycle and decline cycle, and the reset cycle of the second son field only comprises decline cycle.
Among Figure 12 among the drive waveforms of first son and Fig. 4 the drive waveforms of first embodiment similar.Yet the reset cycle of the second son field only comprises decline cycle.In the reset cycle of second son, the voltage of Y electrode is reduced to voltage Vnf gradually, applies to the Y electrode keeping in the cycle of first son simultaneously and keep discharge pulse Vs.
During the cycle of keeping of the first son field, produce and keep discharge, and on the Y electrode, form (-) wall electric charge, on X and A electrode, form (+) wall electric charge.As a result of, during the decline cycle of reset cycle of second son, produce weak discharge.This discharge is similar with the discharge that reduces gradually when the voltage of Y electrode and produced during the decline cycle of reset cycle of the first son field when surpassing discharge excitation voltage.
Wall charge condition in the unit 12 (Fig. 2) after the decline cycle of the second son field and the wall charge condition equivalence after the decline cycle of the first sub-field are because the final voltage Vnf of the Y electrode in the decline cycle of the second son field equals the final voltage Vnf of the Y electrode in the decline cycle of the first son field.
Wall charge condition in unit 12 (Fig. 2) is remained the condition of decline cycle when finishing of first son, do not keep discharge, then can not produce address discharge because if during the cycle of keeping of first son, produce.When being reduced to Vnf, the voltage of Y electrode do not produce discharge.As the result of applied voltage, after finishing the decline cycle of the first son field, the wall voltage that is formed on the unit 12 (Fig. 2) reaches near discharge excitation voltage.Therefore, the wall charge condition of being set up in the reset cycle of the first son field is maintained, because produce discharge in the reset cycle of the second son field.
As described, during the reset cycle, have decline cycle and do not have the rising cycle, then can produce reset discharge when keeping discharge, just not can not produce reset discharge when not producing in the son formerly when keeping discharge when producing in the son formerly as the fruit field.Thus, if form this first son as first among Figure 13 and other sons as the sub-field of second among Figure 13 form, then when showing 0 gray shade scale (black gray grade), in the reset cycle of this first son field, produce reset discharge (weak discharge).As a result of, increased contrast ratio, because when showing the black gray grade, do not produce discharge in other son fields.
Though the drive waveforms of first exemplary embodiment is used for describing the 8th exemplary embodiment of Figure 12, equally also can utilize in the drive waveforms described in second to the 6th exemplary embodiment.
In addition, as shown in Figure 13, can be set to be lower than the voltage of voltage Vs in the 5th to the 7th exemplary embodiment at the beginning voltage in the decline cycle of the second son field.
Though the driving voltage of the 9th exemplary embodiment among Figure 13 and the driving voltage of the 8th exemplary embodiment among Figure 12 are similar, the decline of the Y electrode in Figure 13 begins the decline that voltage is lower than among Figure 12 and begins voltage Vs.Because lower beginning, can be during the decline cycle of second son be provided with the descending slope of Y electrode milder.When the beginning voltage that descends as shown in Figure 13 is set to 0V, do not need to be formed for applying the additional supply of the beginning voltage that descends to the Y electrode.
When the wall voltage of keeping end cycle and being caused by the wall electric charge surpasses discharge excitation voltage, on X and Y electrode, form the wall electric charge as shown in Figure 14 then.Under this unit condition, do not produce discharge, because when the voltage of Y electrode is 0V, can in unit 12 (Fig. 2), form voltage by the wall electric charge.Thus, the decline of Y electrode begins voltage and is set to be lower than 0V.
Although reduce the voltage of Y electrode gradually, when wall voltage surpasses discharge excitation voltage Vfxy with the voltage sum that imposes on X, Y electrode, produce discharge.At this moment, the drop-out voltage of Y electrode is higher than voltage-Vs, because can produce discharge like that when voltage-Vs is imposed on the Y electrode as described above.
Thus, in the predetermined decline cycle of Y electrode voltage, be provided with the descending slope of Y electrode voltage gently, and be set to reduce when being lower than 0V decline cycle when the decline of Y electrode begins voltage.
According to exemplary embodiment of the present invention, do not need to be used to drive the plate of keeping electrode, because apply drive waveforms, will keep electrode biasing constant voltage simultaneously to scan electrode.Single circuit board is enough for drive electrode, and can reduce cost.
When Y and X electrode have independent drive plate, be formed on impedance on the turntable driving plate with to be formed on the impedance of keeping on the drive plate different.Producing this difference is because the drive waveforms that is applied in reset cycle and addressing period mainly comes from the turntable driving plate.As a result of, in the cycle of keeping, impose on scan electrode keep discharge pulse with impose on keep electrode to keep discharge pulse different.Yet, according to exemplary embodiment of the present invention, can will be used to apply impedance Control on the path of keeping discharge pulse in a certain degree, because apply the pulse that is used to keep discharge from the turntable driving plate.
Though by invention has been described in conjunction with thinking practical exemplary embodiment at present, but be understandable that, the present invention is not limited by these disclosed embodiment, but the present invention contains has covered various modifications and equivalent included in the spirit and scope of the appended claims.
Claims (31)
1, a kind of method that is used to drive plasma display, described plasma display comprises scan electrode, keep electrode, and address electrode, described scan electrode with keep electrode form parallel right, described address electrode is perpendicular to described parallel to extending, described method drives plasma display in image duration, each frame all has the son field, and each son field all has the reset cycle, is addressing period afterwards, be the cycle of keeping then, the described reset cycle comprises the rising cycle, is decline cycle then, and described method comprises:
At each sub-field period, will keep electrode and keep biasing first voltage;
During the rising cycle, the voltage of scan electrode increases to tertiary voltage gradually from second voltage;
The voltage of scan electrode is reduced to the 4th voltage from tertiary voltage;
During decline cycle, the voltage of scan electrode is reduced to the 5th voltage gradually from the 4th voltage;
During addressing period,, select discharge cell by applying scanning voltage and non-scanning voltage to scan electrode and applying addressing pulse to address electrode; And
During the cycle of keeping, make selected discharge cell keep discharge by apply pulse to scan electrode, described pulse alternately has the 6th voltage and is lower than the 7th voltage of the 6th voltage,
The 8th voltage of wherein during decline cycle and part addressing period, address electrode being setovered.
2, driving method according to claim 1, wherein during the whole rising cycle, with the address electrode biasing just greater than the 9th voltage of the 8th voltage.
3, driving method according to claim 1, wherein during the part rising cycle, with the address electrode biasing just greater than the 9th voltage of the 8th voltage.
4, driving method according to claim 1, wherein during the part rising cycle, the voltage of address electrode just increases to the voltage greater than the 8th voltage gradually.
5, driving method according to claim 1, wherein floating address electrode during the rising cycle.
6, driving method according to claim 2, wherein said the 9th voltage equals addressing pulse voltage.
7, driving method according to claim 1, wherein said first voltage is ground voltage.
8, driving method according to claim 1, wherein said the 4th voltage is ground voltage.
9, driving method according to claim 1, wherein said the 6th voltage equals the 4th voltage.
10, driving method according to claim 1, wherein said the 8th voltage is ground voltage.
11, driving method according to claim 1,
Wherein said tertiary voltage is a positive voltage,
Wherein said the 5th voltage is negative voltage, and its absolute value is greater than tertiary voltage, and
Wherein said the 4th voltage is lower than ground voltage, and is higher than the voltage sum of tertiary voltage and the 5th voltage twice.
12, driving method according to claim 11, the voltage of wherein said scan electrode is reduced to the 6th voltage from tertiary voltage between rising cycle and decline cycle, and be reduced to ground voltage from the 6th voltage, and, during decline cycle, be reduced to the 5th voltage gradually then from ground voltage.
13, driving method according to claim 1, the reset cycle of the wherein said first son field comprises rising cycle and decline cycle, and the reset cycle of son field only comprises decline cycle subsequently, and described driving method also comprises:
Subsequently the son decline cycle during, the voltage of scan electrode is reduced to the 5th voltage gradually from the 4th voltage.
14, driving method according to claim 13, wherein subsequently the son decline cycle during, the voltage of scan electrode is reduced to the 5th voltage gradually from the 4th voltage, this process comprises, the voltage of scan electrode at first is reduced to ground voltage from the 4th voltage, and the voltage of scan electrode is reduced to the 5th voltage gradually from ground voltage afterwards.
15, a kind of plasm display device comprises:
Plasma display has a plurality of electrodes of keeping, a plurality of scan electrodes and a plurality of address electrode, described address electrode with keep electrode and scan electrode intersects, and keep the crossing formation unit of electrode and scan electrode and address electrode;
Control panel is used for frame is divided into a plurality of sons field; And
Drive plate is used for applying drive waveforms to scan electrode and address electrode, and with display image on described plasma display, and be used for making and keep electrode first voltage of setovering at a plurality of sub-field periods,
Wherein said drive plate produces discharge, is used for during the reset cycle of at least one height field the unit being carried out initialization, and discharge at first produces between scan electrode and address electrode, afterwards at scan electrode with keep between the electrode and produce.
16, plasm display device according to claim 15, wherein said drive plate produces discharge by voltage that increases scan electrode gradually and the voltage that reduces scan electrode subsequently gradually.
17, plasm display device according to claim 16, wherein said drive plate reduces to produce discharge by the voltage with scan electrode gradually from reference voltage.
18, plasm display device according to claim 16, wherein said drive plate reduces to produce discharge by the voltage with scan electrode gradually from the voltage that is lower than reference voltage.
19, plasm display device according to claim 16, wherein said drive plate increase gradually at described drive plate scan electrode voltage during, apply voltage to address electrode, the voltage that is applied just greater than during the voltage that reduces scan electrode at described drive plate gradually to voltage that address electrode applied.
20, a kind of driving method of plasma display panel that is used for, described plasma display has a plurality of first electrodes, a plurality of second electrodes, with a plurality of third electrodes, the described third electrode and first electrode and second electrode crossing form, simultaneously a frame is divided into a plurality of sons field, at least one height field, described method comprises:
In the reset cycle, the voltage of second electrode is reduced to tertiary voltage gradually from second voltage, first voltage of simultaneously first electrode being setovered;
During addressing period, select discharge cell; And
By applying pulse and selected discharge cell kept discharge to second electrode, described pulse alternately has the 4th voltage that is higher than first voltage and the 5th voltage that is lower than first voltage, first voltage of simultaneously first electrode being setovered, wherein said second voltage is lower than the 4th voltage.
21, driving method according to claim 20, wherein said second voltage equals first voltage.
22, driving method according to claim 20, wherein said second voltage are lower than first voltage and are higher than the 5th voltage.
23, driving method according to claim 20 also comprises:
In the reset cycle, before the voltage that reduces second electrode, the voltage of second electrode is increased to the 7th voltage gradually from the 6th voltage, first voltage of simultaneously first electrode being setovered.
24, driving method according to claim 23, wherein at least the voltage of second electrode increase to from the 6th voltage the 7th voltage during, the voltage of third electrode is set to be higher than first voltage.
25, driving method according to claim 23, wherein at the voltage of second electrode after the 7th voltage is reduced to the 4th voltage, the voltage of second electrode is reduced to second voltage from the 4th voltage.
26, driving method according to claim 20, wherein said first voltage is ground voltage.
27, a kind of plasm display device comprises:
Plasma display has a plurality of first electrodes, a plurality of second electrodes and a plurality of third electrode, and the described third electrode and first electrode and second electrode crossing form;
Control panel is used for frame is divided into a plurality of sons field; And
Drive plate in corresponding son, applies drive waveforms to second electrode and third electrode, and with display image on described plasma display, and described drive plate makes first electrode, first voltage of setovering,
Wherein said drive plate is in the reset cycle of the first son field of a plurality of sons field, by coming discharge cell is carried out initialization in that the voltage of second electrode is reduced to the 5th voltage with the voltage of second electrode from the 4th voltage after second voltage increases to tertiary voltage gradually
Wherein said drive plate was reduced to the 7th voltage by the voltage with second electrode from the 6th voltage and comes discharge cell is carried out initialization in the reset cycle of the second son field of a plurality of sons field, and
In wherein said the 4th voltage and the 6th voltage at least one is less than or equal to first voltage.
28, plasm display device according to claim 27, wherein said the 4th voltage equals the 6th voltage, and the 5th voltage equals the 7th voltage.
29, plasm display device according to claim 27, wherein to small part the voltage of second electrode is increased to from second voltage tertiary voltage during, drive plate is arranged to be higher than first voltage with the voltage of third electrode.
30, plasm display device according to claim 27, wherein said first voltage is ground voltage.
31, plasm display device according to claim 16, wherein said drive plate applies pulse to scan electrode, keeps discharge with execution, and described pulse alternately has voltage that is higher than reference voltage or the voltage that is lower than reference voltage.
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| KR38298/04 | 2004-05-28 | ||
| KR1020040038298A KR100578975B1 (en) | 2004-05-28 | 2004-05-28 | Plasma display device and driving method of plasma display panel |
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| KR38966/04 | 2004-05-31 |
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| CN101356568B (en) * | 2006-07-14 | 2011-12-14 | 松下电器产业株式会社 | Plasma display device and method for driving plasma display panel |
| CN101796569B (en) * | 2007-09-11 | 2013-03-27 | 松下电器产业株式会社 | Driving device, driving method, and plasma display device |
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| KR100647641B1 (en) * | 2004-11-12 | 2006-11-23 | 삼성에스디아이 주식회사 | Method for driving plasma display panel without using X drivers |
| KR100675323B1 (en) * | 2004-12-23 | 2007-01-26 | 엘지전자 주식회사 | Method of Driving Plasma Display Panel |
| KR100741123B1 (en) * | 2006-03-28 | 2007-07-20 | 삼성에스디아이 주식회사 | Plasma display panel |
| JP2008129552A (en) * | 2006-11-27 | 2008-06-05 | Hitachi Ltd | Plasma display device |
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| JP3201603B1 (en) * | 1999-06-30 | 2001-08-27 | 富士通株式会社 | Driving device, driving method, and driving circuit for plasma display panel |
| KR100420022B1 (en) * | 2001-09-25 | 2004-02-25 | 삼성에스디아이 주식회사 | Driving method for plasma display panel using variable address voltage |
| KR100458569B1 (en) * | 2002-02-15 | 2004-12-03 | 삼성에스디아이 주식회사 | A driving method of plasma display panel |
| AU2003262013A1 (en) * | 2002-10-02 | 2004-04-23 | Fujitsu Hitachi Plasma Display Limited | Drive circuit and drive method |
| KR100484647B1 (en) * | 2002-11-11 | 2005-04-20 | 삼성에스디아이 주식회사 | A driving apparatus and a method of plasma display panel |
| KR100612333B1 (en) * | 2003-10-31 | 2006-08-16 | 삼성에스디아이 주식회사 | Plasma display device and driving apparatus and method of plasma display panel |
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| CN101356568B (en) * | 2006-07-14 | 2011-12-14 | 松下电器产业株式会社 | Plasma display device and method for driving plasma display panel |
| CN101796569B (en) * | 2007-09-11 | 2013-03-27 | 松下电器产业株式会社 | Driving device, driving method, and plasma display device |
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| KR20050112867A (en) | 2005-12-01 |
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