CN1701647B - 电路形成衬底的制造方法 - Google Patents
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Abstract
一种电路形成衬底的制造方法及电路形成衬底的材料,在电路形成衬底的制造方法中,向与第一片的第一方向一致的第二方向输送第一片。在向与第一片的第一方向成直角的第三方向输送第一片的同时,在第一片的两面上粘贴薄膜。根据该方法,可利用导电膏等连接部件可靠地电连接电路形成衬底的层间。
Description
技术领域
本发明涉及用于各种电子设备中的电路形成衬底的制造方法。
背景技术
伴随近年来电子设备的小型化、高密度化,搭载电子部件的电路形成衬底从现有的单面衬底向两面、多层衬底发展,正在开发在衬底上可集成更多的电路及部件的高密度衬底。
以下说明在特开平6-268345号公报中公开的现有电路形成衬底。
图6表示作为衬底材料的预成型材料片13的制法。作为加强材料使用的玻璃织布11等纤维片,将热硬性树脂导入由溶剂稀释的作为浸渍材料的漆12内,在玻璃织布11上浸渍所希望量的漆12。为调整浸渍的漆12的量,在浸渍后利用滚子等榨取漆12,然后,通过加热使漆12构成半硬化状态(B级)。含有作为B级状态的漆的玻璃织布被切割为规定的尺寸,作为电路形成衬底制造用材料,得到预成型材料片13。
在图6中,预成型材料片13被切割为长方形,其边长方向202是作为玻璃织布11流动方向201的机器方向(MD:Machine Direction)方向。
在如上这样制造的预成型材料片13的两面利用图7及图8所示的方法粘贴薄膜。
图7是薄膜粘贴方法的立体图。图8是图7所示的方法,是从方向204看到的预成型材料片13或薄膜14的图示。预成型材料片13向与长边方向202相同方向201(MD方向)被导入上下一对薄膜14之间,通过热滚子15在预成型材料片13上按压薄膜14,加热加压预成型材料片13。由于在预成型材料片13上浸渍的树脂为半硬化状态,故通过加热熔融薄膜14和预成型材料片13被暂时粘接。然后,薄膜14由线203切断,形成所希望的尺寸,得到完成分层薄片的预成型材料片16。
以下说明电路形成衬底的制造方法。图9A~图9G是电路形成衬底制造方法的剖面图。图9A表示由预成型材料片13及粘贴在其两面上的薄膜14构成的完成分层薄片的预成型材料片16。如图9B所示,利用激光加工等方法在预成型材料片16上形成通孔(ビア穴)17,如图9C所示,利用印刷等方法在通孔17内填充导电膏18。导电膏18是在环氧树脂等热硬性树脂内混合了铜等金属粒子的膏。其次,参照图9D,剥离薄膜14。由于薄膜14仅微量熔融预成型材料片13表面的树脂成分而被粘接,故可容易地剥离。如图9D所示,在剥离薄膜14后,膏18从预成型材料片13突出薄膜14厚度的量。其次,如图9E所示,在粘合材料13的上下面上配置铜箔19,使用真空热压力装置等加热加压装置加热加压,熔融预成型材料片13的树脂成分使其硬化成型,压缩导电膏18。由此,如图9F所示,利用膏18电连接预成型材料片13上下面上的铜箔19。其次,如图9G所示,将铜箔19蚀刻成所希望的形状,形成电路20,得到两面的电路形成衬底。
在所述方法中,当图9D所示的粘合材料13的厚度不均匀时,进行从图9E到图9F中的热压力机时的膏18的压缩率产生偏差。由此,连接完成的电路形成衬底上下面的电路20的膏18的电阻值产生误差,对电路形成衬底的品质及可靠性产生恶影响。
即,在图9D所示的预成型材料片13的厚的部分形成通孔17时,膏18的压缩率降低,膏18的电阻值升高。
另外,在图9D所示的预成型材料片13的薄的部分形成通孔17时,膏18的压缩率升高,膏18的电阻值降低。但是,在设定膏18的金属粒子配合量时,由于实际的压缩率偏离假定标准的压缩率,故有损害连接的可靠性的情况。
另外,在电路形成衬底的导体电阻一定时,在使用例如高频信号时,膏18的电气电阻偏离电路形成衬底内的位置,是不理想。
即使在厚度偏差大的预成型材料片13上粘贴薄膜14,也具有预成型材料片13的厚度误差,在完成分层叠片的预成型材料片16上也具有预成型材料片13的厚度误差。
这种问题,作为加强材料的纤维片,即使在使用玻璃织布11,即纺布作为预成型材料片13的材料时以外的情况,使用无纺布也产生这种问题,由于纺布漆12的渗入量少,多粘附在预成型材料片13的表面上,故厚度的误差对导电膏18的电气特性产生大的影响。
近年来,迫切期待薄的电路形成衬底,由于玻璃织布11薄,而预成型
材料片13的表面粘附更多的漆12,故上述的问题更大。
为防止所述的问题,图9A所示的预成型材料片13具有均匀的厚度是重要的。
但是,如图6所示,在利用滚子等榨取漆12时,或如图7所示,在预成型材料片13的两面粘贴薄膜14时,由于制造装置精度的限制,要得到均匀厚度的预成型材料片13是有限度的。
发明内容
在电路形成衬底的制造方法中,包括:准备具有第一方向且具有与所述第一方向平行的两面的第一预成型材料片的步骤;向与所述第一预成型材料片的与所述第一方向和所述两面相对平行的第二方向输送所述第一预成型材料片的步骤;向相对于所述第一预成型材料片的所述第一方向成直角且与所述两面平行的第三方向输送所述且与所述两面平行,同时,在所述且与所述两面平行的所述两面上粘贴薄膜的步骤,其中,所述第一预成型材料片为具有长边方向和短边方向的长方形,所述第一方向为长边方向或短边方向。
根据该方法,可通过导电膏等连接部件可靠地电连接电路形成衬底的层之间。
另外,在向所述第二方向输送第二预成型材料片过程中将其切断,得到所述第一预成型材料片的步骤。
附图说明
图1是本发明实施例的预成型材料片制造方法的立体图;
图2A~图2C是实施例的预成型材料片的立体图及剖面图;
图3是实施例的电路形成衬底制造方法的立体图;
图4是实施例的电路形成衬底制造方法的横面图;
图5A~图5G是实施例的电路形成衬底制造方法的剖面图;
图6是现有的预成型材料片制造方法的立体图;
图7是现有的电路形成衬底制造方法的立体图;
图8是现有的电路形成衬底制造方法的横面图;
图9A~图9G是现有的电路形成衬底制造方法的剖面图;
图10A~图10C是现有的预成型材料片的立体图及剖面图。
符号说明
1 玻璃织布
2 漆
3预成型材料片(pre-preg sheet)
4薄膜
5A热滚子
5B热滚子
6完成分层叠片的预成型材料片
7通孔
8导电膏
9铜箔
10电路
具体实施方式
通过试验确认了由图6~图8所示的方法制造的现有预成型材料片13的厚度偏差的原因。
详细说明厚度不均匀的图9A所示的现有预成型材料片13。图10A是预成型材料片13的立体图。图10B是图10A所示的预成型材料片13的线10B-20B的剖面图。图10C是图10A所示的预成型材料片13的线10C-10C的剖面图。
剥离预成型材料片13两面上的薄膜14,观察预成型材料片13的剖面,如图10B所示,在10B-10B线的剖面预成型材料片13的厚度偏差大,如图10C所示,在10C-10C线的剖面厚度偏差小。
为调整浸渍于玻璃织布11上的漆12的量,而含有采用滚子等榨取漆12的操作,如图6所示,浸渍液状的漆12,将玻璃织布11送向MD方向201。在MD方向201漆12的量的偏差,即预成型材料片13的厚度偏差少,但在与MD方向201成直角的方向预成型材料片13的偏差大。
图1是本发明实施例的预成型材料片3制造方法的立体图。作为加强材料使用的玻璃织布1等纤维片被导入利用溶剂稀释了作为热硬性树脂的浸渍材料的漆2内,在玻璃织布1内浸渍所希望量的漆2。为调整浸渍了漆2的量,浸渍后利用滚子等榨取漆2,然后,通过加热使漆2形成半硬化状态(B级)。含有作为B级状态的漆的玻璃织布1被切割为规定的尺寸,得到预成型材料片3作为电路形成衬底制造用的材料。
在图1中,预成型材料片3被切割为长方形,其短边方向102是作为玻 璃织布1流入的方向101的机器方向(MD:Machine Direction)方向。
图1中显示了一片预成型材料片3,但勘查切断前的玻璃织布1的宽度和切断间隔,可横向并列配置多片预成型材料片3。即,在玻璃织布1的宽度为大约1m时,预成型材料片3可以以长边方向400mm、短边方向300mm的尺寸在横方向并列配置两片,从玻璃织布1上切下。
图2A是这样制造的预成型材料片3的立体图。图2B是图2A所示的2B-2B线的剖面图。图2C是图2A所示的2C-2C线的剖面图。图2B所示的预成型材料片3厚度的短边方向所误差比图2C所示的预成型材料片3厚度的长边方向的误差小。
其次,图3、图4所示,利用热滚子5A、5B将薄膜4按压粘贴在预成型材料片3上。此时,预成型材料片3的长边方向103和粘贴薄膜4时预成型材料片3流入的MD方向104一致。
热滚子5A、5B的直径误差、施加压力、加热温度、热滚子5A、5B的平行度等具有在热滚子的圆筒轴方向105的误差的倾向。如图3所示,使热滚子5A、5B的圆筒轴方向105与预成型材料片3的短边方向102一致,通过缩短相对于粘贴薄膜4时的预成型材料片3的MD方向103的宽度,可减少热滚子5A、5B的误差的影响,高质量地粘贴薄膜4。
在实施例中,如上所述,预成型材料片3制造时的MD方向101和粘贴薄膜4的MD方向104以预成型材料片3为基准垂直。
由此,消除预成型材料片3的厚度误差。
在制造预成型材料片3时及粘贴薄膜4时,厚度或热或压力的MD方向101、103的误差小,而在与MD方向101、103垂直的方向误差增大。因此,当以制造预成型材料片3时和粘贴薄膜4时的预成型材料片3为基准的MD方向101、103相同时,预成型材料片3厚度的误差保留至制造电路形成衬底。
但是,如实施例,当使以制造预成型材料片3时和粘贴薄膜4时的预成型材料片3为基准的MD方向101、103垂直时,双方工序中的误差相互抵销,在完成分层叠片的预成型材料片6上预成型材料片3的厚度均匀。
即,在向制造预成型材料片3时产生的纤维片3粘附漆12的粘附量即厚度的误差被粘贴薄膜4的工序通过加热加压预成型材料片6平均化。
其次,使用5A~图5G说明实施例中的电路形成衬底的制造方法。作 为图5A所示的衬底材料,完成分层叠片的预成型材料片6由预成型材料片3及预成型材料片3两面上的薄膜4构成。其次,如图5B所示,通过激光加工等方法形成通孔7,如图5C所示,通过印刷等向通孔7内填充导电膏8。导电膏8是在环氧树脂等热硬性树脂内混合了铜等金属粒子的膏。
其次,如图5D所示,自预成型材料片6剥离薄膜4。由于薄膜4仅微量熔融预成型材料片3表面的部分树脂而被粘接,故可容易地剥离。如图5D所示,导电膏8仅突出薄膜4的厚度的量。其次,如图5E所示,在预成型材料片3的两面上配置铜箔9,使用真空热压力装置等加热加压装置进行加热加压,如图5F所示,熔融预成型材料片3并使其成型硬化,在压缩压缩膏8的同时,利用膏8电连接预成型材料片3两面上的两片铜箔9。其次,如图5G所示,将铜箔9蚀刻成所希望的形状,形成电路10,得到具有层间连接的两面的电路形成衬底。
剥离图5A所示的完成分层叠片的粘合材料6的薄膜4,测定预成型材料片3的厚度,观察到即使在完成分层叠片的预成型材料片6的薄膜4的外观,也可以得到非常均匀的厚度。由于表面均匀,故导电膏的电阻稳定,在形成通孔等的加工时容易处理,且在预成型材料片3的各工序中的尺寸稳定。
在实施例中,衬底材料,即预成型材料片3是通常的玻璃织布1等纤维片即纺布或无纺布和浸渍于纺布或无纺布内的B级热硬性树脂。纤维片也可以使用芳香族聚酰胺等有机纤维代替玻璃织布。
另外,除热硬性树脂之外,也可以使用通过进行烧结构成硬衬底的无机系材料代替漆2,还可以使用未使用加强材料即纤维片的薄膜基材或B级薄膜作为预成型材料片3。
另外,可在混合了纺布和无纺布的材料,例如两片玻璃纤维之间使用夹入了玻璃纤维无纺布的材料作为加强材料即纤维片1。
实施例中的热硬性树脂可以单独使用环氧系树脂、环氧树脂·蜜胺系树脂、不饱和聚酯系树脂、酚醛系树脂聚酰亚胺系树脂、氰酸盐系树脂、氰酸酯系树脂、萘系树脂、脲醛系树脂、氨基树脂、醇酸系树脂、硅系树脂、呋喃系树脂、聚氨酯系树脂、氨基醇酸系树脂、丙烯酸系树脂、氟系树脂、聚苯醚系树脂、氰酸盐酯系树脂等,或将上述两种或两种以上混合后的热硬性树脂组合物,或者由热塑性树脂改性的热硬性树脂组合物,根据需要,也可以添加阻燃剂或无机填充剂。
在实施例中说明了两面电路衬底的制造方法,但可根据需要,通过反复进行同样的工序制造多层电路衬底,可利用填充了导电膏的预成型材料片粘合多层电路衬底,制造多层电路衬底。
作为连接铜箔9间的部件的导电膏8,除使用在含有硬化剂的热硬性树脂内混合了铜粉等导电性粒子的膏之外,还使用利用导电性粒子和在热压时排出到衬底材料中的适当粘度的高分子材料形成的膏或混合了溶剂等的膏等。
另外,除导电膏之外,也可以使用通过电镀等形成的柱状导电性突起或未膏化的比较大粒径的导电性粒子单独作为铜箔9间的连接部件。
另外,如通常的多层印刷线路板,在进行热压后施行穴加工,通过镀敷连接层间的电路形成衬底也可以利用实施例的方法制造。
本发明的电路形成衬底中,可利用导电膏等层间连接部件稳定且高品质地电连接两面上的铜箔间。
Claims (7)
1.一种电路形成衬底的制造方法,其特征在于,包括:准备具有第一方向且具有与所述第一方向平行的两面的第一预成型材料片的步骤;向与所述第一预成型材料片的与所述第一方向和所述两面相对平行的第二方向输送所述第一预成型材料片的步骤;向相对于所述第一预成型材料片的所述第一方向成直角且与所述两面平行的第三方向输送所述第一预成型材料片,同时,在所述第一预成型材料片的所述两面上粘贴薄膜的步骤,其中,所述第一预成型材料片为具有长边方向和短边方向的长方形,所述第一方向为长边方向或短边方向。
2.如权利要求1所述的电路形成衬底的制造方法,其特征在于,所述粘贴薄膜的工序包括:向所述第三方向输送所述第一预成型材料片的同时用加热滚在所述第一预成型材料片上压附所述薄膜的步骤。
3.如权利要求1所述的电路形成衬底的制造方法,其特征在于,所述第一预成型材料片具有加强材料,向所述第二方向输送所述第一预成型材料片的步骤包括:向所述第二方向输送加强材料的同时,在所述加强材料上浸渍浸渍材料的步骤。
4.如权利要求3所述的制造方法,其特征在于,所述加强材料由纺布构成。
5.如权利要求1所述的制造方法,其特征在于,还包括:在粘贴了所述薄膜的所述第一预成型材料片上加工通孔的步骤;在所述通孔内填充导电膏的步骤;自所述第一预成型材料片剥离所述薄膜的步骤;在剥离了所述薄膜的第一预成型材料片的两面上配置金属箔,加热加压的步骤。
6.如权利要求1所述的制造方法,其特征在于,所述长边方向与所述第一预成型材料片的所述第一方向成直角。
7.如权利要求1所述的制造方法,其特征在于,还包括:在向所述第二方向输送所述第一预成型材料片过程中将其切断,得到所述第一预成型材料片的步骤。
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JP5050656B2 (ja) * | 2007-05-29 | 2012-10-17 | パナソニック株式会社 | 回路形成基板の製造方法 |
TWI418045B (zh) * | 2010-12-07 | 2013-12-01 | Aplus Energy Co Ltd | Improvement of manufacturing method of solar module |
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US3810816A (en) * | 1972-04-06 | 1974-05-14 | Dow Chemical Co | Process for making reinforced resin laminates of uniform thickness |
US4470858A (en) * | 1982-12-06 | 1984-09-11 | Deltaglass S.A. | Lamination process and apparatus |
JPH04323034A (ja) * | 1991-04-24 | 1992-11-12 | Matsushita Electric Works Ltd | 積層板の製造方法 |
JP2601128B2 (ja) * | 1992-05-06 | 1997-04-16 | 松下電器産業株式会社 | 回路形成用基板の製造方法および回路形成用基板 |
JPH0639958A (ja) | 1992-07-22 | 1994-02-15 | Nitto Denko Corp | フツ素樹脂積層板、回路基板および多層回路基板 |
JPH06166029A (ja) * | 1992-11-30 | 1994-06-14 | Tonen Corp | プリプレグの製造方法 |
NL1006092C2 (nl) * | 1997-05-21 | 1998-11-25 | Beiler Beheer Bv | Werkwijze voor het vervaardigen van een dwarsvezelbaan, een volgens de werkwijze vervaardigde dwarsvezelbaan, alsmede een inrichting voor het vervaardigen van een kruislegsel met behulp van een dwarsvezelbaan volgens de uitvinding. |
JP3420039B2 (ja) | 1997-09-04 | 2003-06-23 | 坂本造機株式会社 | 型抜き装置 |
JPH11277676A (ja) * | 1998-03-30 | 1999-10-12 | Matsushita Electric Works Ltd | 積層板の製造方法 |
JP2000174438A (ja) * | 1998-12-07 | 2000-06-23 | Shin Kobe Electric Mach Co Ltd | プリプレグの製造法及び多層プリント配線板の製造法 |
CN1461254A (zh) * | 2001-04-23 | 2003-12-10 | 积水化学工业株式会社 | 层合复合体的制造方法及制造装置 |
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2003
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2004
- 2004-05-14 KR KR1020057017305A patent/KR100736516B1/ko not_active IP Right Cessation
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- 2004-05-14 CN CN2004800007467A patent/CN1701647B/zh not_active Expired - Fee Related
- 2004-05-14 EP EP04733120A patent/EP1551210A4/en not_active Withdrawn
- 2004-05-18 TW TW093113939A patent/TW200501864A/zh not_active IP Right Cessation
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EP1551210A1 (en) | 2005-07-06 |
KR20050109580A (ko) | 2005-11-21 |
TW200501864A (en) | 2005-01-01 |
EP1551210A4 (en) | 2009-11-11 |
TWI318094B (zh) | 2009-12-01 |
US20050198818A1 (en) | 2005-09-15 |
JP2004338329A (ja) | 2004-12-02 |
JP4254343B2 (ja) | 2009-04-15 |
CN1701647A (zh) | 2005-11-23 |
KR100736516B1 (ko) | 2007-07-06 |
WO2004103041A1 (ja) | 2004-11-25 |
US8069557B2 (en) | 2011-12-06 |
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