CN1687982A - Display panel and display panel repairing method - Google Patents
Display panel and display panel repairing method Download PDFInfo
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- CN1687982A CN1687982A CN 200510075921 CN200510075921A CN1687982A CN 1687982 A CN1687982 A CN 1687982A CN 200510075921 CN200510075921 CN 200510075921 CN 200510075921 A CN200510075921 A CN 200510075921A CN 1687982 A CN1687982 A CN 1687982A
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Abstract
The invention provides a display panel, comprising a pixel array and at least a repair line, and its repairing method. The pixel array comprises at least a first rank and at least a second rank. And the first rank comprises many first pixels, where each first pixel comprises a thin film transistor (TFT) situated at the top end; the second pixel rank is adjacent to the bottom end of the first rank and includes many second pixels, arranged in a horizontal line relatively to the first pixels, where each second pixel includes a TFT situated at the bottom end. The repairing line is horizontally laid in the gap between the first rank and the second rank.
Description
Technical field
The present invention relates to have the repair line structure display panel, particularly relate to the display panel that patch cord is laid in the space that utilizes the different directions pixel.
Background technology
Fig. 1 a is the Organization Chart of existing display panel.One source pole control panel 104 is positioned at pel array 108 upsides, joins with this pel array 108 with a flexible printed wiring board 112.One grid control panel 106 is positioned at pel array 108 left sides, joins with this pel array 108 with a flexible printed wiring board 112.This source electrode control panel 104 sees through many source electrode lines 110, drives the source electrode of each pixel in this pel array 108.In addition, this display panel still comprises at least one patch cord 102, its head end is across the upside of this pel array 108, be overlapping with these source electrode lines 110 and do not couple, tail end by signal amplifier 114 amplifying signals, passes through pel array 108, flexible printed wiring board 112, grid control panel 106 again through flexible printed wiring board 112 in source electrode control panel 104, extend to the downside of this pel array 108 at last, be overlapping with the tail end of these source electrode lines 110 and do not couple.Fig. 1 b is the spatial structure of existing display panel.Wherein, this patch cord 102 is positioned at first conductive layer 103, and these source electrode lines 110 are positioned at second conductive layer, 105, the first conductive layers 103 and second conductive layer, the 105 middle insulation courses 107 of being separated by.In panel manufacturing process, one of them has the obstructed phenomenon that opens circuit if find these source electrode lines 110, then makes this patch cord 102 connect this corresponding source electrode line 110 that opens circuit, and reaches the purpose that panel is repaired.Because each pixel is arranged closely in this pel array 108, this patch cord 102 only can be laid on the edge of pel array 108.In some cases, be the framework of bilateral driving as display panel, then patch cord 102 will not have the space and can lay, and bring puzzlement thereby repair to panel.
Summary of the invention
For addressing the above problem, the invention provides a kind of display panel, comprise a pel array and at least one patch cord.This pel array comprises at least one first line and at least one second line.This at least one first line comprises that a plurality of first pixels are transversely arranged, wherein comprises a thin film transistor (TFT) in each first pixel, is positioned at the upper end of this first pixel.Adjacent this first line lower end of this at least one second line comprises that a plurality of second pixels and these first pixels are transversely arranged accordingly, wherein comprises a thin film transistor (TFT) in each second pixel, is positioned at the lower end of this second pixel.This at least one patch cord laterally is layed in the gap between this first line and this second line.
In one embodiment, this pel array is divided into a first half and a Lower Half, the pixel that is positioned at this first half is all first pixel, the pixel that is positioned at this Lower Half is all second pixel, this first line is positioned at this first half bottom, this second line is positioned at the top of this Lower Half, adjacent this first line.In addition, this display panel also comprises source electrode control panel on, is positioned at this pel array upside, in order to supply with the picture element signal of this first half.Once the source electrode control panel is positioned at this pel array downside, in order to supply with the picture element signal of this Lower Half.One left gate drivers, be positioned at this pel array left side, in order to drive this first half and Lower Half pixel, an and right gate drivers, be positioned at this pel array right side, in order to drive this first half and Lower Half pixel, the visual need assessment of gate line links to each other or disconnection on the same level of this pel array.
In this embodiment, this at least one patch cord comprises one first patch cord, is layed in the gap of this first half and Lower Half, extends to source electrode control panel on this along this left side gate drivers, and is half of in order to a left side of repairing this first half.One second patch cord is layed in the gap of this first half and Lower Half, extends to source electrode control panel on this along this right side gate drivers, in order to repair the right half of of this first half.One the 3rd patch cord is layed in the gap of this first half and Lower Half, extends to this time source electrode control panel along this left side gate drivers, and is half of in order to a left side of repairing this Lower Half.One the 4th patch cord is layed in the gap of this first half and Lower Half, extends to this time source electrode control panel along this right side gate drivers, in order to repair the right half of of this Lower Half.The number ratio optimum of first pixel and second pixel is 1: 1, but still can adjust the number ratio according to the patch cord position.
In another embodiment, this pel array also comprises a plurality of the 3rd pixels, comprises two thin film transistor (TFT)s in each the 3rd pixel, is each positioned at the top and bottom of the 3rd pixel.This first line also comprises continuously a plurality of first pixels and a plurality of the 3rd pixels are transversely arranged continuously, one first grid polar curve contact these first pixels of this first line and the upper end of the 3rd pixel, and a second grid line, the lower end of these the 3rd pixels of this first line of contacting.This second line also comprises continuously a plurality of second pixels and a plurality of the 3rd pixels are transversely arranged continuously, one the 3rd gate line contact these second pixels of this second line and the lower end of the 3rd pixel, and one the 4th gate line, the upper end of these the 3rd pixels of this second line of contacting.And this at least one patch cord comprises that one first patch cord is layed in the lower end of these first pixels of this first line, and one second patch cord is layed in the upper end of these second pixels of this second line.
Description of drawings
Fig. 1 a is the Organization Chart of existing display panel.
Fig. 1 b is the spatial structure of existing display panel.
Fig. 2 is the display panel Organization Chart of the embodiment of the invention one.
Fig. 3 is the display panel Organization Chart of another embodiment of the present invention.
Fig. 4 is the display panel Organization Chart of yet another embodiment of the invention.
The simple symbol explanation
102～patch cord, 104～source electrode control panel
103～the first conductive layers, 105～the second conductive layers
106～grid control panel, 107～insulation course
108～pel array
110～source electrode line, 112～flexible printed wiring board
114～signal amplifier, 120～gate line
202～patch cord, 204～pel array
304～bigrid pixel 306～last grid pixel
310～following grid pixel
Embodiment
In the typical image element circuit, comprise a thin film transistor (TFT), in order to couple gate line and source electrode line, received signal control pixel.This thin film transistor (TFT) is usually located at an end of image element circuit, for example upper end or lower end.The present invention rearranges by image element circuit, and the thin film transistor (TFT) of the row's of making pixel is positioned at the upper end, and the thin film transistor (TFT) of following row pixel is positioned at the lower end, and the gap of generation in the middle of two rows just is enough to assign patch cord in wherein.
Fig. 2 is the display panel Organization Chart of one of embodiment of the invention.One pel array 204 is subjected to bilateral driving.Each two source electrode control panel 104 is supplied with the last Lower Half signal of pel array 204 respectively up and down, and about each two grid control panel 106 drive pel array 204 respectively, gate line 120 visual need assessments link to each other or disconnect on the same level of this pel array.If same horizontal gate line 120 links to each other, the object that then left and right gate drivers 106 is driven is the same; If same horizontal gate line 120 in separated, 106 of then left and right gate drivers drive left side and right-hand part respectively, therefore pel array 204 can be divided into four zones.Wherein, included thin film transistor (TFT) in the middle of each pixel of the first half is positioned at the pixel upper limb, and grid couples gate line 120 up.Relatively, included thin film transistor (TFT) in the middle of each pixel of Lower Half is positioned at the pixel lower edge, and grid couples gate line 120 down.This framework makes the intersection of Lower Half form a gap, is enough to hold patch cord 202 and lays wherein.
In the embodiment of Fig. 2, four patch cords 202 have been arranged altogether, respectively in order to upper left, upper right, the lower-left in the inpainted pixels array 204, four zones, bottom right.The head end juxtaposition of the head end of patch cord 202 and 104 extended source electrode lines 110 of source electrode control panel and not coupling.Through the amplification of a signal amplifier 114, tail end enters pel array 204 through grid control panel 106 and flexible printed wiring board 112 to patch cord, across the gap of Lower Half intersection on the pel array 204 in source electrode control panel 104.Each display panel can be tested before dispatching from the factory, open circuit if find to be couple to have in the middle of the source electrode line 110 of pel array 204 by source electrode control panel 104, then this patch cord 202 and the Origin And Destination of this source electrode line 110 are connected, road makes source signal see through this patch cord 202 and is communicated to corresponding pixel as an alternative.Though in the present embodiment with panel repairing area quadrisection, and provide four corresponding patch cords 202, this framework also can be applicable in the display panel of existing monolateral driving.And the quantity of patch cord 202 also visual reality gap length and increase and decrease.
Fig. 3 is another embodiment of the present invention, has the display panel of the pixel of double thin-film transistors.In this display panel, comprise the pel array of forming by bigrid pixel 304.The two ends up and down of each bigrid pixel 304 respectively comprise a thin film transistor (TFT), respectively be coupled to a gate line 120 and source electrode line 110, gate line 120 visual need assessments link to each other or disconnect on the same level of this pel array, and drive this bigrid pixel 304 simultaneously from two ends up and down.In order to lay patch cord 202 in the middle of first line and second line of pel array 204, a plurality of bigrid pixels 304 are replaced by last grid pixel 306 in first line, and a plurality of bigrid pixels 304 are by grid pixel 310 replacements down in second line.Last grid pixel 306 only upper end has a thin film transistor (TFT), and following grid pixel 310 only lower end has a thin film transistor (TFT).Compare with bigrid pixel 304,310 of last grid pixel 306 and following grid pixels are driven by a gate line, do not have that side of thin film transistor (TFT) so obtain exceptional space.The colour developing area of considering pixel 306,310,304 must equate, makes in grid pixel 306 and the following grid pixel 310 thin film transistor (TFT) size and usefulness equal bigrid pixel 304 above and belows two and approaches the transistorized general performances of mould; Be arranged in the upside line by going up grid pixel 306, following grid pixel 310 is arranged in the downside line, and the one section space that has more between two lines must be in order to lay patch cord 202.
Fig. 4 is another embodiment of the present invention, first line and second line in Fig. 3, in other row, also have grid pixel 306 and following grid pixel 310, thereby can be provided with patch cord 202 in these between grid pixel 306 and the following grid pixel 310, each does not limit length that each group is extended, with the terminal adjacent of source electrode line in the pel array 110 but disconnect.The other end of these patch cords 202 (not icon) extends to the source electrode control panel, and is adjacent with the starting point of source electrode line but disconnect.In the present embodiment, be positioned at and repair once on the same signal line or the broken string more than the secondary, look conditions of demand and the expansion of panel repairing area can be divided into the multizone repairing; No matter display panel is monolateral driving or bilateral driving, the arrangement mode that all can see through dot structure provides the laying space of patch cord.Because last grid pixel 306 and following grid pixel 310 have a thin film transistor (TFT) compared to 304 of bigrid pixels, only couple a gate line, therefore wherein the width/length of thin film transistor (TFT) need be adjusted than also, so that whole line pixel does not produce difference when driving and picture demonstration.Source electrode line within patch cord 202 covering scopes opens circuit, and then the Origin And Destination of this source electrode line that opens circuit is connected with this patch cord 202 with welding manner in when test of dispatching from the factory, and makes the source electrode data of respective pixel be seen through this alternative road and drives.
In addition, same patch cord can be connected in series by first metal wire and the second metal wire segmentation.With gate line is first metal wire, and data line is that following grid (bottom gate) technology of second metal wire is example.Generally in the viewing area, patch cord is then parallel with gate line in horizontal direction the time, and this moment, patch cord was first metal wire, was positioned at one deck other with gate line.And outside the viewing area, when patch cord must be with the gate line cross-over connection, this moment, patch cord was second metal wire, with data line bit in other with one deck.Same patch cord then is electrically connected with through hole in the junction of first metal wire and second metal wire.
Therefore, based on the display panel that the foregoing description provided, display panel repairing method provided by the present invention comprises the steps.At first, checking in this pel array whether there to be each source electrode line 110 opens circuit.When one source pole line 110 is found to open circuit, then the intersection point of this patch cord 202 with this source electrode line 110 coupled, and this patch cord 202 and these source electrode line 110 pairing source electrode control panels are coupled, this source electrode line 110 can see through the signal that this patch cord 202 receives these source electrode control panels 104 by this.Check that method that source electrode line 110 opens circuit can be with reference to existing way, and the method that patch cord and source electrode line couple can be to finish in the laser bonding mode before dispatching from the factory.
The embodiment that more than provides has highlighted many characteristics of the present invention.Though the present invention discloses as above with preferred embodiment, yet it is not in order to limiting scope of the present invention, and any those skilled in the art are not breaking away from the spirit and scope of the invention, when doing various changes and retouching.So the scope of the present invention should be with being as the criterion that claims were defined.
Claims (19)
1, a kind of display panel comprises:
One pel array comprises:
At least one first line comprises that a plurality of first pixels are transversely arranged, wherein comprises a thin film transistor (TFT) in each first pixel, is positioned at the upper end of this first pixel; And
At least one second line, adjacent this first line lower end comprises that a plurality of second pixels and these first pixels are transversely arranged accordingly, wherein comprises a thin film transistor (TFT) in each second pixel, is positioned at the lower end of this second pixel; And
At least one patch cord, wiring is disposed at the gap of this first line and this second line.
2, display panel as claimed in claim 1 also comprises many source electrode lines, and each source electrode line is to the file in should pel array, and these source electrode lines and this patch cord are separated by with an insulation course.
3, display panel as claimed in claim 2, wherein these source electrode lines are positioned at different circuit layers with this patch cord.
4. display panel as claimed in claim 1 also comprises many gate lines, and each gate line is to the line in should pel array, and when this patch cord and these gate line cross-over connections, both are separated by with an insulation course.
5, display panel as claimed in claim 4, wherein these gate lines are positioned at different circuit layers with this patch cord.
6, display panel as claimed in claim 1, wherein:
This pel array is divided into a first half and a Lower Half;
This first line is positioned at this first half bottom; And
This second line is positioned at the top of this Lower Half, adjacent this first line.
7, display panel as claimed in claim 6 also comprises:
At least one source electrode control panel of going up is positioned at this pel array upside, comprises that going up the source electrode line parallel longitudinal for many arranges, and head end couples source electrode control panel on this, and tail end extends to this first line and couples, in order to drive the pixel of this first half;
At least one source electrode control panel down is positioned at this pel array downside, comprises many following source electrode line parallel longitudinals arrangements, and head end couples this time source electrode control panel, and tail end extends to this second line and couples, in order to drive the pixel of this Lower Half;
At least one left gate drivers is positioned at this pel array left side, in order to drive this first half and Lower Half pixel; And
At least one right gate drivers is positioned at this pel array right side, in order to drive this first half and Lower Half pixel.
8, display panel as claimed in claim 7 also comprises a plurality of flexible printed wiring boards, in order to should go up source electrode control panel, this time source electrode control panel, this left side gate drivers and should right side gate drivers and this pel array couple, and pass through for this patch cord.
9, display panel as claimed in claim 8 wherein should be gone up in source electrode control panel and this time source electrode control panel, comprised that respectively an amplifier connects with the patch cord of process.
10, display panel as claimed in claim 9, wherein this at least one patch cord comprises:
One first patch cord, head end and many head end juxtapositions of going up source electrode line extend to source electrode control panel on this, and through after this left side gate drivers, tail end extends to the gap of this first half and Lower Half, and is half of in order to a left side of repairing this first half;
One second patch cord, head end and many head end juxtapositions of going up source electrode line extend to source electrode control panel on this, and through after this right side gate drivers, tail end extends to the gap of this first half and Lower Half, in order to repair the right half of of this first half;
One the 3rd patch cord, the head end juxtaposition of head end and many following source electrode lines extends to this time source electrode control panel, and through after this left side gate drivers, tail end extends to the gap of this first half and Lower Half, and is half of in order to a left side of repairing this Lower Half; And
One the 4th patch cord, the head end juxtaposition of head end and many following source electrode lines extends to this time source electrode control panel, and through after this right side gate drivers, tail end extends to the gap of this first half and Lower Half, in order to repair the right half of of this Lower Half.
11, display panel as claimed in claim 10, wherein:
The pixel that is positioned at this first half is all first pixel; And
The pixel that is positioned at this Lower Half is all second pixel.
12, display panel as claimed in claim 10, wherein:
This pel array also comprises a plurality of the 3rd pixels, comprises two thin film transistor (TFT)s in each the 3rd pixel, is each positioned at the top and bottom of the 3rd pixel;
Be positioned at the pixel of this first half, except that this first line, be all the 3rd pixel; And
Be positioned at the pixel of this Lower Half, except that this second line, be all the 3rd pixel.
13, display panel as claimed in claim 9, wherein:
This pel array also comprises a plurality of the 3rd pixels, comprises two thin film transistor (TFT)s in each the 3rd pixel, is each positioned at the top and bottom of the 3rd pixel;
This first line also comprises:
A plurality of first pixels are with a plurality of the 3rd pixels are transversely arranged continuously continuously;
One first grid polar curve, these first pixels of this first line of contacting and the upper end of the 3rd pixel; And
One second grid line, the lower end of these the 3rd pixels of this first line of contacting;
This second line also comprises:
A plurality of second pixels are with a plurality of the 3rd pixels are transversely arranged continuously continuously;
One the 3rd gate line, these second pixels of this second line of contacting and the lower end of the 3rd pixel; And
One the 4th gate line, the upper end of these the 3rd pixels of this second line of contacting; And
This at least one patch cord comprises:
One first patch cord is layed in the lower end of these first pixels of this first line; And
One second patch cord is layed in the upper end of these second pixels of this second line.
14, a kind of display panel repairing method is used for a display panel, and wherein the apparent panel of this face comprises:
One pel array comprises:
At least one first line comprises that a plurality of first pixels are transversely arranged, wherein comprises a thin film transistor (TFT) in each first pixel, is positioned at the upper end of this first pixel; And
At least one second line, adjacent this first line lower end comprises that a plurality of second pixels and these first pixels are transversely arranged accordingly, wherein comprises a thin film transistor (TFT) in each second pixel, is positioned at the lower end of this second pixel; And
Many source electrode lines, each source electrode line are to the file in should pel array, in order to data signal each pixel to this file;
At least one source electrode control panel couples these source electrode lines, in order to data-signal to be provided;
At least one patch cord laterally is layed in the gap of this first line and this second line, and wherein these source electrode lines are positioned at different circuit layers with this patch cord, are separated by with an insulation course;
This display panel repairing method comprises the following steps:
Whether each source electrode line of checking this pel array has is opened circuit;
When the one source pole line is found to open circuit, the intersection point of this patch cord and this source electrode line is coupled; And
This patch cord and this source electrode control panel are coupled, and each pixel in this file can see through the signal that this patch cord receives this source electrode control panel by this.
15, a kind of display panel comprises:
One pel array comprises:
At least one first pixel has the upper end that single thin film transistor (TFT) is positioned at this first pixel; And
At least one second pixel is positioned at first pixel below, and this second pixel has the lower end that single thin film transistor (TFT) is positioned at this second pixel; And
At least one patch cord, wiring is disposed at the gap of this first pixel and this second pixel.
16, display panel as claimed in claim 15 is crossed and to be comprised the one source pole line, and this source electrode line is to a file that should pel array, and this source electrode line and this patch cord are separated by with an insulation course.
17, display panel as claimed in claim 16, wherein this source electrode line is positioned at different circuit layers with this patch cord.
18, display panel as claimed in claim 15 also comprises many gate lines, and each gate line is to the line in should pel array, and when this patch cord and these gate line cross-over connections, both are separated by with an insulation course.
19, display panel as claimed in claim 18, wherein these gate lines are positioned at different circuit layers with this patch cord.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100759215A CN100354907C (en) | 2005-06-01 | 2005-06-01 | Display panel and display panel repairing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100759215A CN100354907C (en) | 2005-06-01 | 2005-06-01 | Display panel and display panel repairing method |
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| CN1687982A true CN1687982A (en) | 2005-10-26 |
| CN100354907C CN100354907C (en) | 2007-12-12 |
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| CNB2005100759215A Active CN100354907C (en) | 2005-06-01 | 2005-06-01 | Display panel and display panel repairing method |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100371818C (en) * | 2005-12-02 | 2008-02-27 | 友达光电股份有限公司 | Repair line structure for liquid crystal display device |
| CN100410744C (en) * | 2005-11-22 | 2008-08-13 | 友达光电股份有限公司 | Liquid crystal display device and repair line structure thereof |
| US7609246B2 (en) | 2005-11-14 | 2009-10-27 | Au Optronics Corp. | Liquid crystal display and repair lines structure thereof |
| CN103137054A (en) * | 2011-11-30 | 2013-06-05 | 上海中航光电子有限公司 | Bigrid horizontal pixel reversal driving method |
| CN103871342B (en) * | 2012-12-13 | 2017-02-08 | 厦门天马微电子有限公司 | Bilateral drive unit for grid driving, TFT array substrate and flat display |
| CN109946894A (en) * | 2017-12-01 | 2019-06-28 | 夏普株式会社 | Display device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001109018A (en) * | 1999-10-12 | 2001-04-20 | Matsushita Electric Ind Co Ltd | Liquid crystal display device and driving method therefor |
| TWI282457B (en) * | 2000-04-06 | 2007-06-11 | Chi Mei Optoelectronics Corp | Liquid crystal display component with defect restore ability and restoring method of defect |
| US6906875B2 (en) * | 2001-05-15 | 2005-06-14 | Fuji Photo Film Co., Ltd. | Magnetic transfer device |
| CN1264135C (en) * | 2003-03-07 | 2006-07-12 | 友达光电股份有限公司 | Planar display with data line capable of being repaired and its repair method |
| TW583490B (en) * | 2003-03-31 | 2004-04-11 | Au Optronics Corp | Pixel structure and method of repairing the same |
| KR100980012B1 (en) * | 2003-07-23 | 2010-09-03 | 삼성전자주식회사 | Thin film transistor array panel |
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2005
- 2005-06-01 CN CNB2005100759215A patent/CN100354907C/en active Active
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7609246B2 (en) | 2005-11-14 | 2009-10-27 | Au Optronics Corp. | Liquid crystal display and repair lines structure thereof |
| CN100410744C (en) * | 2005-11-22 | 2008-08-13 | 友达光电股份有限公司 | Liquid crystal display device and repair line structure thereof |
| CN100371818C (en) * | 2005-12-02 | 2008-02-27 | 友达光电股份有限公司 | Repair line structure for liquid crystal display device |
| CN103137054A (en) * | 2011-11-30 | 2013-06-05 | 上海中航光电子有限公司 | Bigrid horizontal pixel reversal driving method |
| CN103137054B (en) * | 2011-11-30 | 2015-09-23 | 上海中航光电子有限公司 | Bigrid pixels across inversion driving method |
| CN103871342B (en) * | 2012-12-13 | 2017-02-08 | 厦门天马微电子有限公司 | Bilateral drive unit for grid driving, TFT array substrate and flat display |
| CN109946894A (en) * | 2017-12-01 | 2019-06-28 | 夏普株式会社 | Display device |
| CN109946894B (en) * | 2017-12-01 | 2022-03-04 | 夏普株式会社 | Display device |
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| CN100354907C (en) | 2007-12-12 |
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