CN1684358A - Band gap reference circuit - Google Patents

Abstract

This invention relates to band-gap reference circuit, among which, a subtracter is connected between a P-channel band-gap reference unit and a N-channel band-gap reference unit containing two NPN transistors connected to said P- channel band-gap reference unit and two PNP transistors connected to said N- channel band-gap reference unit. Said subtracter subtracts the current generated by the two units and generates less then 1V curvature compensating voltage on an output resistor, which is the least sensitive to temperatures.

Description

Bandgap reference circuit

Technical field

The invention provides a kind of bandgap reference circuit (bandgap reference circuit), refer in particular to a kind of low-voltage bandgap reference circuit.

Background technology

Reference voltage generator is widely used in simulation and the digital circuit, and as dynamic random access memory and speed flash memory, and bandgap reference circuit is used to provide a stable output voltage, and its susceptibility to temperature and supply power voltage is extremely low.

Tradition bandgap reference output voltage is approximately 1.25 volts, the silicon band gap that it is measured with electron-volt no better than, however approximately based on 1 volt, therefore traditional bandgap reference circuit just can't meet the demand of present stage in the modern inferior micron technology.

1 volt minimum supply power voltage is subject to two factors, one is that 1.25 volts reference voltage is above 1 volt, another for ratio in absolute temperature (proportional-to-absolute-temperature) (PTAT) the electric current low voltage designs that produces the loop be subject to the common mode input of amplifier, the known resistance that utilizes is made dividing potential drop, or utilize low threshold voltage device or BiCMOS manufacturing process to reduce the influence that these limiting factors cause, but these solution roads need the higher manufacturing process technology of cost to finish.

Bandgap reference circuit can be divided into two types, a kind ofly add stack up (being called the A type) for voltage with the interdependent opposite element of two temperature, another kind of for the electric current with two elements adds stack up (being called Type B), all can design for these two types and can work in supply power voltage for greater than 1 volt and less than under 1 volt the state.

Fig. 1 is the schematic diagram of traditional A type bandgap reference circuit 10, and bandgap reference circuit 10 comprises an operational amplifier 12, two transistor M1, M2, two resistance R 1, R2, and two diode Q1, Q2.The source electrode of transistor M1, M2 is connected to supply power voltage V _DD, the drain electrode of transistor M1 is connected to the emitter-base bandgap grading of diode Q1 via resistance R 1, and the positive input terminal that is connected to operational amplifier 12.Similarly, the drain electrode of transistor M2 is connected to the emitter-base bandgap grading of diode Q2 via resistance R 2, and the negative input end that is connected to operational amplifier 12.The grid of transistor M1, M2 is connected to the output of operational amplifier 12.In the application of CMOS, each diode Q1, Q2 are symmetrically formed in the structure as Fig. 1, and collector electrode of the two and base stage are connected to earth terminal, as shown in Figure 1.

The electric current of ignoring base stage, the emitter-base bandgap grading-base voltage of the diode under the forward operating state are following arithmetic expression:

$V_{\mathrm{EB}}=\frac{\mathrm{kT}}{q}\ln \left(\frac{I_C}{I_S}\right),---\left(1\right)$

Wherein

K is a Boltzmann's constant (1.38 * 10 ^-23J/K),

Q is 1 electronics enclosed pasture (1.6 * 10 ^-19C),

T is a temperature,

I _CBe the electric current of collector electrode, and

I _SBe saturation current.

When the input terminal voltage of operational amplifier 12 is all identical, and the size of diode Q1 is when being N times of diode Q2 size, emitter-base bandgap grading between diode Q1 and the Q2-base voltage difference Δ V _EBBe following arithmetic expression:

${\mathrm{\&Delta;V}}_{\mathrm{EB}}=V_{\mathrm{EB}2}-V_{\mathrm{<figure-callout\; id="1"\; label="EB"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">EB</figure-callout>}1}=\frac{\mathrm{kT}}{q}\ln N,---\left(2\right)$

Wherein

V _EB1Be emitter-base bandgap grading-base voltage of diode Q1, and

V _EB2Emitter-base bandgap grading-base voltage for diode Q2.

When the electric current of the resistance R 1 of flowing through is equal to the electric current of resistance R 2 of flowing through, and the electric current of the resistance R 1 of flowing through can get output reference voltage V when being made as PTAT _REFAs follows:

$V_{\mathrm{REF}}=V_{\mathrm{EB}2}+\frac{R_2}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}{\mathrm{\&Delta;V}}_{\mathrm{EB}}\&equiv;V_{\mathrm{REF}-\mathrm{CONV}},---\left(3\right)$

Wherein

R ₁Be the resistance value of resistance R 1,

R ₂Be the resistance value of resistance R 2, and

V _REF-CONVBe traditional reference voltage.

Emitter-base bandgap grading-base voltage V _EBNegative temperature coefficient be-2mV/ ℃ and emitter-base bandgap grading-base voltage difference Δ V _EBPositive temperature coefficient be 0.085mV/ ℃, if the careful resistance value ratio of selecting resistance R 1, R2, output reference voltage V _REFSusceptibility for temperature can be lower.In general, supply power voltage V _DDBe approximately 3 to 5 volts, and output reference voltage V _REFBe approximately 1.25 volts, therefore traditional band-gap circuit 10 can't work in supply power voltage less than under 1 volt the state.

Fig. 2 is the schematic diagram of traditional B type bandgap reference circuit 20, the identical person of code name among Fig. 2 with code name among Fig. 1, its element is also identical, bandgap reference circuit 20 comprises an operational amplifier 22, three transistor M1, M2, M3, four resistance R 1, R2, R3, R4, and two diode Q1, Q2, its each element connected mode as shown in Figure 2.

Compare with bandgap reference circuit 10, bandgap reference circuit 20 is more suitable for working in low supply power voltage, it need not be superimposed as the voltage of two complementations, Type B bandgap reference circuit 20 is done addition with two interdependent opposite electric currents of temperature, in the bandgap reference circuit 20 of Fig. 2, the electric current of the resistance R of flowing through 3 is PTAT, if resistance R 1 is identical with the resistance value of R2, the electric current of the MOS transistor M3 identical with transistor M1, M2 that flow through is following arithmetic expression:

$I_{M3}=\frac{1}{R_1}(V_{\mathrm{EB}2}+\frac{R_1}{R_3}\frac{\mathrm{kT}}{q}\ln N),---\left(4\right)$

And reference voltage is as follows:

$V_{\mathrm{REF}}=\frac{R_4}{R_1}(V_{\mathrm{EB}2}+\frac{R_1}{R_3}\frac{\mathrm{kT}}{q}\ln N)=\frac{R_4}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}\&CenterDot;V_{\mathrm{REF}-\mathrm{CONV}}---\left(5\right)$

Therefore, in the bandgap reference circuit 20 of Fig. 2, serve as main crucial with the ratio of resistance, the difference of each resistance during because of manufacturing process will can not have very big influence to reference voltage, in general, supply power voltage V _DDBe approximately 1.5 volts, and output reference voltage V _REFBe approximately 1.2 volts.

Fig. 3 is for working in supply power voltage less than 1 volt traditional B type bandgap reference circuit 30, the identical person of code name among Fig. 3 with code name among Fig. 2, its element is also identical, bandgap reference circuit 30 comprises an operational amplifier 32, three transistor M1, M2, M3, six resistance R 1a, R1b, R2a, R2b, R3, R4, and two diode Q1, Q2, its each element connected mode as shown in Figure 3, supply power voltage is subject to the common mode input of operational amplifier 32, and its voltage must be quite little of to guarantee that two inputs can work in the zone of saturation.

The improvement of low suppling voltage, as bandgap reference circuit 30, its pass lies in two inputs of operational amplifier 32, feedback loop produces PTAT voltage in resistance R 3, and the ratio of resistance R 1a and R2a can make the voltage between the common mode input of supply power voltage and operational amplifier 32 increase, even so that two inputs of P raceway groove still can work in the zone of saturation at supply power voltage during less than 1 volt, bandgap reference circuit 30 provides are as follows less than 1 volt voltage:

$V_{\mathrm{REF}-\mathrm{SUBW}}=\frac{R_4}{R_1}(V_{\mathrm{EB}2}+\frac{R_1}{R_3}\frac{\mathrm{kT}}{q}\ln N)=\frac{R_4}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}\&CenterDot;V_{\mathrm{REF}-\mathrm{CONV}}---\left(6\right)$

Its voltage is similar to the arithmetic expression of the voltage that bandgap reference circuit 20 among Fig. 2 is provided, in the work of bandgap reference circuit 30, and supply power voltage V _DDBe approximately 1.0 to 1.9 volts, and output reference voltage V _REFBe approximately 0.6 volt.

By the detailed description of above-mentioned well know bandgap reference circuit 10,20 and 30 as can be known, be badly in need of a kind of improvement and low reference voltage circuit with low cost and improve known problem.

Summary of the invention

The invention provides a kind of bandgap reference circuit, to solve the above problems.

The present invention discloses a kind of bandgap reference circuit, and it comprises one first bandgap reference unit, and it comprises an output and is connected to a first node (n1), one second bandgap reference unit, and it comprises an output and is connected to a Section Point (n2), and a subtracter.This subtracter comprises a first transistor (M4), it comprises one source pole and is connected to one first voltage, one drain electrode and a grid, its the two be connected to this Section Point (n2), one transistor seconds (M5), it comprises one source pole and is connected to this first voltage, one drain electrode is connected to one the 3rd node (n3), and one grid be connected to the grid of this first transistor (M4), one the 3rd transistor (M6), it comprises one source pole and is connected to one second voltage, a drain electrode and a grid, its the two be connected to this first node (n1), one the 4th transistor (M7), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to the 3rd node (n3), and one grid be connected to the grid of the 3rd transistor (M6), and an output resistance (RREF) is connected between the 3rd node (n3) and this second voltage.

The invention has the advantages that when this first and second voltage suitably is provided can obtain one less than 1 volt reference voltage at the 3rd node, its voltage is extremely low for the susceptibility of temperature.

Another advantage of the present invention is that this bandgap reference circuit is fit to the CMOS manufacturing process.

Another advantage of the present invention be need not the lower bound voltage device or the BiCMOS manufacturing process can realize the present invention.

Description of drawings

Fig. 1 is the schematic diagram of traditional bandgap reference circuit.

Fig. 2 is the schematic diagram of traditional low-voltage bandgap reference circuit.

Fig. 3 is the schematic diagram of traditional low-voltage bandgap reference circuit.

Fig. 4 is the schematic diagram of the base-emitter voltage of two diodes with respect to temperature.

Fig. 5 is the schematic diagram of the base-emitter voltage difference of two diodes among Fig. 4 with respect to temperature.

Fig. 6 is the output reference voltage curve chart.

Fig. 7 is the schematic diagram of the low-voltage curvature compensation reference circuit of first embodiment.

Fig. 8 is the electric current of Fig. 7 circuit and the schematic diagram of reference voltage.

Fig. 9 is the schematic diagram of NPN type CMOS BJT.

Figure 10 is the schematic diagram of the low-voltage curvature compensation reference circuit of second embodiment.

Figure 11 is the schematic diagram of the low-voltage curvature compensation reference circuit of the 3rd embodiment.

Figure 12 is the schematic diagram of the reference voltage of Figure 11 circuit with respect to temperature.

Figure 13 is the schematic diagram of the minimum supply power voltage of Figure 11 circuit.

The schematic symbol explanation

76 subtracters

10,20,30,70,100,200 bandgap reference circuits

12,22,32,112,114 operational amplifiers

72,74,102,104,202,204 bandgap reference unit

N1, n2, n3 node

Q1, Q2, Q1 ', Q2 ' diode

M1, M2, M3, M4, M5, M6, M7, M1 ', M2 ', M3 ' transistor

R1, R2, R3, R4, R1a, R1b, R2a, R2b resistance

R1a ', R1b ', R2a ', R2b ' resistance

Embodiment

For illustrating the present invention, please refer to Fig. 4 and Fig. 5, Fig. 4 is the graph of a relation of the base-emitter voltage of diode Q1, Q2 with respect to temperature, Fig. 5 is the graphs of a relation of two diode base-emitter voltage differences with respect to temperature.As base-emitter voltage V _EBWhen=0.55 V and temperature T=300K, base-emitter voltage V _EBNegative temperature coefficient be approximately-2mV/ ℃ and the base-emitter voltage discrepancy delta V of two diodes _EBWith respect to temperature, as shown in Figure 5, be used for producing PTAT in the present invention to reduce the influence of negative temperature coefficient.

Suppose the output reference voltage V of traditional band-gap circuit _REFAs follows:

$V_{\mathrm{REF}}=E_G+V_T(\mathrm{\&gamma;}-\mathrm{\&alpha;})(1+\ln \frac{T_0}{T}),---\left(7\right)$

Wherein

γ is the average electrical hole migration rule μ=CT of base stage ^γ-4In γ,

α is I _C=GT ^αIn α,

E _GBe the band gap voltage of silicon,

T ₀Be V _REFThe open type temperature of temperature coefficient when being zero, and

T is the open type temperature.

The band gap voltage E that ignores silicon _GTemperature interdependent, with arithmetic expression (7) with the temperature differential once and twice of differential as follows:

$\frac{{\&PartialD;V}_{\mathrm{REF}}}{\&PartialD;T}=\frac{k}{q}(\mathrm{\&gamma;}-\mathrm{\&alpha;})\ln \frac{T_0}{T}---\left(8\right)$

And

$\frac{\&PartialD;}{\&PartialD;T}\left(\frac{{\&PartialD;V}_{\mathrm{REF}}}{\&PartialD;T}\right)=-\frac{k}{q}\frac{(\mathrm{\&gamma;}-\mathrm{\&alpha;})}{T}---\left(9\right)$

What note is, (the V in the control arithmetic expression (7) of γ-α) in the arithmetic expression (9) _REFCurvature, in other words, if (γ-α) is a positive number, V _REFRecess downward; And if (γ-α) is a negative, V _REFRecess upwards.

Please refer to Fig. 6, Fig. 6 is the schematic diagram according to the downward output reference voltage of the recess of arithmetic expression (7), and Fig. 6 shows several different reference temperature T ₀Simulation curve, it is according to the simulation of the band-gap circuit of the PNP polarized lense pipe of TSMC 0.25 μ m 1P5M manufacturing process, this manufacturing process is the pure P type silicon near room temperature, its γ=1.8 and α=0.

Please refer to Fig. 7, Fig. 7 is the low-voltage curvature compensation bandgap reference circuit 70 of first embodiment of the invention, and bandgap reference circuit 70 is a cmos circuit, and it also can utilize other modes to realize.Bandgap reference circuit 70 comprises one first bandgap reference unit 72, its output is connected to a first node n1, and one second bandgap reference unit 74, its output are connected to a Section Point n2, and a subtracter 76, be connected between the first bandgap reference unit 72 and the second bandgap reference unit 74.The first bandgap reference unit 72 is a P channel material (device), and it exports an electric current I ₁, and the second bandgap reference unit 74 is a N channel material, it exports an electric current I ₂

Subtracter 76 comprises a first transistor M4, and its source electrode is connected to one first voltage V _DD, its drain electrode all is connected to Section Point n2 with grid, and a transistor seconds M5, and its source electrode also is connected to the first voltage V _DD, its drain electrode is connected to one the 3rd node n3, and its grid is connected to the grid of the first transistor M4, and transistor M4 and M5 are all the positive-negative-positive material.Subtracter 76 comprises one the 3rd transistor M6 in addition, its source electrode is connected to earth terminal, its drain electrode all is connected to first node n1 with grid, and one the 4th transistor M7, its source electrode is connected to earth terminal, its drain electrode is connected to the 3rd node n3, and its grid is connected to the grid of transistor M6, and transistor M4 and M5 are all NPN section bar material.One output resistance RREF is connected between the 3rd node and the earth terminal.

Please refer to Fig. 8, Fig. 8 is the electric current of bandgap reference circuit 70 among Fig. 7 and the curve chart of reference voltage, electric current I ₁And I ₂Be all curve, reference temperature T when the first bandgap reference unit 72 and the second bandgap reference unit 74 to fovea superior ₀Close, electric current I ₁And I ₂Curve similar.As shown in Figure 8, the big electric current I of the basic operation of subtracter 76 for being produced from the second bandgap reference unit 74 ₂In deduct the little electric current I that the first bandgap reference unit 72 is produced ₁, its operation can make the sensitivity of temperature reduce and produce curvature compensation voltage V on resistance R REF _REFWith reference to figure 9, Fig. 9 is the schematic diagram of NPN type BJT in addition, and it is the standard CMOS manufacturing process of deep N-well, and it can be implements a kind of material of the present invention.

Please refer to Figure 10, Figure 10 is the low-voltage curvature compensation bandgap reference circuit 100 of second embodiment of the invention, bandgap reference circuit 100 comprises a P raceway groove bandgap reference unit 102 (similar to reference unit 72) and a N raceway groove bandgap reference unit 104 (similar to reference unit 74), its two be connected via subtracter 76.Bandgap reference circuit 100 can be considered the most preferred embodiment of bandgap reference circuit 70, and bandgap reference circuit 70 also can be applicable in the bandgap reference circuit 100.

P raceway groove bandgap reference unit 102 is similar to the bandgap reference circuit 20 of Fig. 2, therefore, has identical code name person, and its element is also identical, and P raceway groove bandgap reference unit 102 comprises one first operational amplifier 112, the 5th transistor M1, and its source electrode is connected to the first voltage V _DD, its drain electrode is connected to the positive input terminal of first operational amplifier 112, and its grid is connected to the output of first operational amplifier 112, and one the 6th transistor M2, and its source electrode is connected to the first voltage V _DD, its drain electrode is connected to the negative input end of first operational amplifier 112, and its grid is connected to the output of first operational amplifier 112.N raceway groove bandgap reference unit 104 comprises one first resistance R 1 in addition, be connected between the positive input terminal of the earth terminal and first operational amplifier 112, one second resistance R 2, be connected between the negative input end of the earth terminal and first operational amplifier 112, one first diode Q1, its collector electrode and base stage all are connected to earth terminal, its emitter-base bandgap grading is connected to the positive input terminal of first operational amplifier 112 via one the 3rd resistance R 3, and one second diode Q2, its collector electrode and base stage all are connected to earth terminal, and its emitter-base bandgap grading is connected to the negative input end of first operational amplifier 112.P raceway groove bandgap reference unit 102 comprises one the 7th transistor M3 in addition, and its source electrode is connected to the first voltage V _DD, its grid is connected to the output of first operational amplifier 112, and its drain electrode is connected to first node n1, and wherein transistor M1, M2 and M3 and diode Q1 and Q2 are all the positive-negative-positive material.

N raceway groove bandgap reference unit 104 is similar to the bandgap reference circuit 20 of Fig. 2 of N channel material, N raceway groove bandgap reference unit 104 comprises one second operational amplifier 114, one the 8th transistor M1 ', its source electrode is connected to earth terminal, its drain electrode is connected to the positive input terminal of second operational amplifier 114, its grid is connected to the output of second operational amplifier 114, and one the 9th transistor M2 ', its source electrode is connected to earth terminal, its drain electrode is connected to the negative input end of second operational amplifier 114, and its grid is connected to the output of second operational amplifier 114.Bandgap reference circuit 104 comprises one the 4th resistance R 1 ' in addition, is connected to the first voltage V _DDAnd between the positive input terminal of second operational amplifier 114, one the 5th resistance R 2 ' is connected to the first voltage V _DDAnd between the negative input end of second operational amplifier 114, one the 3rd diode Q1 ', its collector electrode and base stage all are connected to the first voltage V _DD, its emitter-base bandgap grading is connected to the positive input terminal of second operational amplifier 114 via one the 6th resistance R 3 ', and one the 4th diode Q2 ', and its collector electrode and base stage all are connected to the first voltage V _DD, its emitter-base bandgap grading is connected to the negative input end of second operational amplifier 114.N raceway groove bandgap reference unit 104 comprises 1 the tenth transistor M3 ' in addition, its source electrode is connected to earth terminal, its grid is connected to the output of second operational amplifier 114, its drain electrode is connected to Section Point n2, and wherein transistor M1 ', M2 ' and M3 ' are all NPN section bar material with diode Q1 ' and Q2 '.

It is as follows at the electric current that first node n1 is produced to get P raceway groove bandgap reference unit 102 by arithmetic expression (4):

$I_1=\frac{1}{R_1}(V_{\mathrm{EB}2}+\frac{R_1}{R_3}\frac{\mathrm{kT}}{q}\ln N_{\mathrm{PNP}})=\frac{V_{\mathrm{REF}\_\mathrm{PNP}}}{R_1}---\left(10\right)$

Wherein

R ₁Be the resistance value of resistance R 1,

R ₃Be the resistance value of resistance R 3,

V _EB2Be emitter-base bandgap grading-base voltage of diode Q2,

N _PNPBe the size value of diode Q1 and Q2, and

V _{REF_PNP}Be magnitude of voltage at first node n1.

In the same manner, N raceway groove bandgap reference unit 104 is as follows at the electric current that Section Point n2 is produced:

$I_2=\frac{1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1^{\&prime;}}(V_{\mathrm{BE}2}+\frac{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1^{\&prime;}}{R_3^{\&prime;}}\frac{\mathrm{kT}}{q}\ln N_{\mathrm{NPN}})=\frac{V_{\mathrm{REF}\_\mathrm{<figure-callout\; id="1"\; label="PNP\; R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">PNP</figure-callout>}}}{R_{}^{}}---\left(11\right)$

Wherein

R _{1 '}Be the resistance value of resistance R 1 ',

R _{3 '}Be the resistance value of resistance R 3 ',

V _EB2Be the base-emitter voltage of diode Q2 ',

N _NPNBe the size value of diode Q1 ' and Q2 ', and

V _{REF_NPN}Be magnitude of voltage at Section Point n2.

Use arithmetic expression (7) then to calculate current difference Δ I=I ₂-I ₁As follows:

$\mathrm{\&Delta;I}=E_G(\frac{1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1^{\&prime;}}-\frac{1}{R_1})+V_T(1+\ln \frac{T_0}{T})(\frac{{(\mathrm{\&gamma;}-\mathrm{\&alpha;})}_{\mathrm{<figure-callout\; id="1"\; label="NPN\; R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">NPN</figure-callout>}}}{R_{}^{}}-\frac{{(\mathrm{\&gamma;}-\mathrm{\&alpha;})}_{\mathrm{PNP}}}{R_1})---\left(12\right)$

Wherein

Unity gamma .58 in the NPN unit 104, it is a silicon state at room temperature, and

Unity gamma .8 in the PNP unit 102, it is a silicon state at room temperature.

When selecting suitable resistance R 1 and R1 ', last of arithmetic expression (12) can be omitted, and ignores E _GTemperature interdependent, Δ I just is temperature independent electric current, therefore, produces a temperature independent electric current at resistance R REF, its corresponding output reference voltage that produces is as follows:

$V_{\mathrm{REF}}=R_{\mathrm{REF}}(I_2-I_1)=\frac{R_{\mathrm{REF}}}{R_1}((V_{\mathrm{BE}2}-V_{\mathrm{EB}2})+(\frac{1}{R_3^{\&prime;}}-\frac{1}{R_3}){\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20041003433600291.png"\; state="\{\{state\}\}">R</figure-callout>}}_1\frac{\mathrm{kT}}{q}\ln N)---\left(13\right)$

Wherein

R _REFBe the resistance value of resistance R REF,

R ₁' equal R ₁, and

N _NPNEqual N _PNP

Via adjusting resistance so that the reference temperature T of P raceway groove bandgap reference unit 102 and N raceway groove bandgap reference unit 104 ₀Close, so reference unit 102 and 104 produces the electric current I of different sizes respectively ₁And I ₂, but its reference temperature T ₀Close, so that subtracter 76 is able to produce one for the extremely low voltage V of temperature susceplibility at the 3rd node n3 _REF

At the bandgap reference circuit 100 of second embodiment, minimum supply power voltage V _{DD (min)}As follows:

V _DD(min)＝Max[(V _{EB2_PNP}+|V _TP|+2·|V _DSsat|)，(V _{BE2_NPN}+V _TN+2V _DSsat)](14)

Wherein

V _{EB2_PNP}Be emitter-base bandgap grading-base voltage of diode Q2,

V _{EB2_NPN}Be the base-emitter voltage of diode Q2 ',

V _TPBe the threshold voltage of positive-negative-positive, is the PNP threshold voltage,

V _TNBe the threshold voltage of NPN type, and

V _DSsatBe drain electrode-source electrode saturation voltage.

Please refer to Figure 11, Figure 11 is for being the low-voltage curvature compensation bandgap reference circuit 200 of third embodiment of the invention, bandgap reference circuit 200 comprises a P raceway groove bandgap reference unit 202 (similar to reference unit 72,102) and a N raceway groove bandgap reference unit 204 (similar to reference unit 74,104), its two be connected via subtracter 76.Bandgap reference circuit 200 can be considered the most preferred embodiment of bandgap reference circuit 70, and bandgap reference circuit 70 also can be applicable in the bandgap reference circuit 200.

P raceway groove bandgap reference unit 202 is similar to the bandgap reference circuit 30 of Fig. 3, therefore, has identical code name person, and its element is also identical, and P raceway groove bandgap reference unit 202 comprises one first operational amplifier 112, the 5th transistor M1, and its source electrode is connected to the first voltage V _DD, it drains and is connected to the positive input terminal of first operational amplifier 112 via one the 7th resistance R 1a, and its grid is connected to the output of first operational amplifier 112, and one the 6th transistor M2, and its source electrode is connected to the first voltage V _DD, it drains and is connected to the negative input end of first operational amplifier 112 via one the 8th resistance R 2a, and its grid is connected to the output of first operational amplifier 112.P raceway groove bandgap reference unit 202 comprises one the 9th resistance R 1b in addition, be connected between the positive input terminal of the earth terminal and first operational amplifier 112, the tenth a resistance R 2b is connected between the negative input end of the earth terminal and first operational amplifier 112, one first diode Q1, its collector electrode and base stage all are connected to earth terminal, its emitter-base bandgap grading is connected to the drain electrode of transistor M1 via one the 3rd resistance R 3, and one second diode Q2, its collector electrode and base stage all are connected to earth terminal, and its emitter-base bandgap grading is connected to the drain electrode of transistor M2.P raceway groove bandgap reference unit 202 comprises one the 7th transistor M3 in addition, and its source electrode is connected to the first voltage V _DD, its grid is connected to the output of first operational amplifier 112, and its drain electrode is connected to first node n1, and in the P raceway groove bandgap reference unit 202, as bandgap reference unit 102, transistor M1, M2 and M3 and diode Q1 and Q2 are all the positive-negative-positive material.

N raceway groove bandgap reference unit 204 is similar to the bandgap reference circuit 30 of Fig. 3 of N channel material, N raceway groove bandgap reference unit 204 comprises one second operational amplifier 114, one the 8th transistor M1 ', its source electrode is connected to earth terminal, its drain electrode is connected to the positive input terminal of second operational amplifier 114 via 1 the 11 resistance R 1a ', its grid is connected to the output of second operational amplifier 114, and one the 9th transistor M2 ', its source electrode is connected to earth terminal, its drain electrode is connected to the negative input end of second operational amplifier 114 via 1 the 12 resistance R 2a ', its grid is connected to the output of second operational amplifier 114, the 13 a resistance R 1b ' is connected to the first voltage V _DDAnd between the positive input terminal of second operational amplifier 114, and 1 the 14 resistance R 2b ', be connected to the first voltage V _DDAnd between the negative input end of second operational amplifier 114.N raceway groove bandgap reference unit 204 comprises one the 3rd diode Q1 ' in addition, and its collector electrode and base stage all are connected to the first voltage V _DD, its emitter-base bandgap grading is connected to the drain electrode of transistor M1 ' via one the 6th resistance R 3 ', and one the 4th diode Q2 ', and its collector electrode and base stage all are connected to the first voltage V _DD, its emitter-base bandgap grading is connected to the drain electrode of transistor M2 '.N raceway groove bandgap reference unit 204 comprises 1 the tenth transistor M3 ' in addition, its source electrode is connected to earth terminal, its grid is connected to the output of second operational amplifier 114, its drain electrode is connected to Section Point n2, in the N raceway groove bandgap reference unit 204, as bandgap reference unit 104, wherein transistor M1 ', M2 ' and M3 ' are all NPN section bar material with diode Q1 ' and Q2 '.

At the bandgap reference circuit 200 of the 3rd embodiment, minimum supply power voltage V _{DD (min)}As follows:

$V_{\mathrm{DD}\left(\min \right)}=\mathrm{Max}\left[\begin{array}{c}(\frac{R_{1b}}{R_{1a}+R_{1b}}{V}_{\mathrm{EB}2\_\mathrm{PNP}}+|V_{\mathrm{TP}}|+2\&CenterDot;|V_{\mathrm{DSsat}}\left|\right),\\ (\frac{R_{1b}^{\&prime;}}{R_{1a}^{\&prime;}+R_{1b}^{\&prime;}}{V}_{\mathrm{BE}2\_\mathrm{NPN}}+V_{\mathrm{TN}}+{2V}_{\mathrm{DSsat}})\end{array}\right]---\left(15\right)$

Wherein

R _1a, R _1b, R _1a' and R _1b' be respectively the resistance value of resistance R 1a, R1b, R1a ' and R1b '.

Circuit 70,100 among first, second and the 3rd embodiment and 200 work are similar to the result, in the 3rd embodiment, still need use arithmetic expression (13), and resistance value R ₁Equal R _1a'+R _1b'=R _1a+ R _1b, in general, the circuit 100 of second embodiment needs more accurate supply power voltage V _DD=1.5V, and the supply power voltage of the circuit 200 of the 3rd embodiment only needs V _DD=0.9V.

Figure 12 is the schematic diagram of reference voltage with respect to temperature, and Figure 13 is the schematic diagram of minimum supply power voltage of the circuit 200 of Figure 11, Figure 12 and 13 is all the result of analog circuit 200, it is the manufacturing process of TSMC 0.25 μ m, Figure 12 shows 10.7ppm/ ℃ band gap reference voltage, its temperature is between-10 degree are spent to 120, and the minimum supply power voltage of Figure 13 is 0.9V.

Described bandgap reference circuit 70,100 and 200 before this and be cmos circuit, it also can utilize other manufacturing process technologies to realize, as discrete component, BiCMOS, or semiconductor fabrication process.In addition, suitably combination current or new technology also can be used for realizing the present invention.

Compare with known technology, the invention provides a curvature compensation low-voltage bandgap reference circuit, it is at the reference voltage of the 3rd node n3 generation one less than 1 volt, its voltage is extremely low for the susceptibility of temperature, circuit of the present invention can utilize the manufacturing of CMOS manufacturing process, and need not utilize low threshold voltage device or BiCMOS manufacturing process.

The above only is preferred embodiment of the present invention, and all equivalences of carrying out according to claim of the present invention change and revise, and all should belong to covering scope of the present invention.

Claims (17)

1. bandgap reference circuit, it comprises:

One first bandgap reference unit, it comprises an output and is connected to a first node (n1);

One second bandgap reference unit, it comprises an output and is connected to a Section Point (n2); And

One subtracter, it comprises:

One the first transistor (M4), it comprises one source pole and is connected to one first voltage, a drain electrode and a grid, its two be connected to this Section Point (n2);

One transistor seconds (M5), it comprises one source pole and is connected to this first voltage, and a drain electrode is connected to one the 3rd node (n3), and a grid is connected to the grid of this first transistor (M4);

One the 3rd transistor (M6), it comprises one source pole and is connected to one second voltage, a drain electrode and a grid, its two be connected to this first node (n1);

One the 4th transistor (M7), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to the 3rd node (n3), and a grid is connected to the grid of the 3rd transistor (M6); And

One output resistance (RREF) is connected between the 3rd node (n3) and this second voltage.

2. bandgap reference circuit as claimed in claim 1, wherein this first transistor (M4) and this transistor seconds (M5) are PNP transistor, the 3rd transistor (M6) and the 4th transistor (M7) are NPN transistor, this second voltage is earth terminal, and this first voltage is higher than earth terminal.

3. bandgap reference circuit as claimed in claim 2, wherein this first bandgap reference unit is a CMOS P raceway groove bandgap reference, and this second bandgap reference unit is a CMOS N raceway groove bandgap reference.

4. bandgap reference circuit as claimed in claim 3, wherein this first bandgap reference unit and this second bandgap reference unit produce an output reference voltage that is lower than 1 volt respectively and also are input into this first node (n1) and this Section Point (n2) respectively.

5. bandgap reference circuit as claimed in claim 1, wherein when second voltage was earth terminal, this first voltage was approximately 0.9 volt, so that the output reference voltage of one the 3rd node is between 550 to 570 millivolts.

6. bandgap reference circuit as claimed in claim 1, wherein this first bandgap reference unit comprises:

One first operational amplifier (112), it comprises a positive input terminal, a negative input end and an output;

One the 5th transistor (M1), it comprises one source pole and is connected to this first voltage, and a drain electrode is connected to this positive input terminal, and a grid is connected to this output;

One the 6th transistor (M2), it comprises one source pole and is connected to this first voltage, and a drain electrode is connected to this negative input end, and a grid is connected to this output;

One first resistance (R1) is connected between this second voltage and this positive input terminal;

One second resistance (R2) is connected between this second voltage and this negative input end;

One first diode (Q1), it comprises a collector electrode, a base stage, its two be connected to this second voltage, and an emitter-base bandgap grading is connected to this positive input terminal via one the 3rd resistance (R3);

One second diode (Q2), it comprises a collector electrode, a base stage, its two be connected to this second voltage, and an emitter-base bandgap grading is connected to this positive input terminal; And

One the 7th transistor (M3), its comprise one its comprise one source pole and be connected to this first voltage, a grid is connected to this output, and a drain electrode is connected to this first node (n1).

7. bandgap reference circuit as claimed in claim 6, wherein this second voltage is earth terminal, this first voltage is higher than earth terminal, the 3rd transistor (M6) and the 4th transistor (M7) are NPN transistor, the 5th transistor (M1), the 6th transistor (M2) and the 7th transistor (M3) are PNP transistor, and this first diode (Q1) and this second diode (Q2) are the positive-negative-positive diode.

8. bandgap reference circuit as claimed in claim 1, wherein this second bandgap reference unit comprises:

One second operational amplifier (114), it comprises a positive input terminal, a negative input end and an output;

One the 8th transistor (M1 '), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to this positive input terminal, and a grid is connected to this output;

One the 9th transistor (M2 '), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to this negative input end, and a grid is connected to this output;

One the 4th resistance (R1 ') be connected between this first voltage and this positive input terminal;

One the 5th resistance (R2 ') be connected between this first voltage and this negative input end;

One the 3rd diode (Q1 '), it comprises a collector electrode, a base stage, its two be connected to this first voltage, and an emitter-base bandgap grading is connected to this positive input terminal via one the 6th resistance (R3 ');

One the 4th diode (Q2 '), it comprises a collector electrode, a base stage, its two be connected to this first voltage, and an emitter-base bandgap grading is connected to this positive input terminal; And

The tenth transistor (M3 '), its comprise one its comprise one source pole and be connected to this second voltage, a grid is connected to this output, and a drain electrode is connected to this Section Point (n2).

9. bandgap reference circuit as claimed in claim 8, wherein this second voltage is earth terminal, this first voltage is higher than earth terminal, this the first transistor (M4) and this transistor seconds (M5) are PNP transistor, the 8th transistor (M1 '), the 9th transistor (M2 ') and the tenth transistor (M3 ') be NPN transistor, and the 3rd diode (Q1 ') and the 4th diode (Q2 ') be NPN type diode.

10. bandgap reference circuit as claimed in claim 1, wherein this first bandgap reference unit comprises:

One first operational amplifier (112), it comprises a positive input terminal, a negative input end and an output;

One the 5th transistor (M1), it comprises one source pole and is connected to this first voltage, and a drain electrode is connected to this positive input terminal via one the 7th resistance (R1a), and a grid is connected to this output;

One the 6th transistor (M2), it comprises one source pole and is connected to this first voltage, and a drain electrode is connected to this negative input end via one the 8th resistance (R2a), and a grid is connected to this output;

One the 9th resistance (R1b) is connected between this second voltage and this positive input terminal;

1 the tenth resistance (R2b) is connected between this second voltage and this negative input end;

One first diode (Q1), it comprises a collector electrode, a base stage, its two be connected to this second voltage, and an emitter-base bandgap grading is connected to the drain electrode of the 5th transistor (M1) via one the 3rd resistance (R3);

One second diode (Q2), it comprises a collector electrode, a base stage, its two be connected to this second voltage, and an emitter-base bandgap grading is connected to the drain electrode of the 6th transistor (M2); And

One the 7th transistor (M3), its comprise one its comprise one source pole and be connected to this first voltage, a grid is connected to this output, and a drain electrode is connected to this first node (n1).

11. bandgap reference circuit as claimed in claim 10, wherein this second voltage is earth terminal, this first voltage is higher than earth terminal, the 3rd transistor (M6) and the 4th transistor (M7) are NPN transistor, the 5th transistor (M1), the 6th transistor (M2) and the 7th transistor (M3) are PNP transistor, and this first diode (Q1) and this second diode (Q2) are the positive-negative-positive diode.

12. bandgap reference circuit as claimed in claim 1, this second bandgap reference unit comprises:

One second operational amplifier (114), it comprises a positive input terminal, a negative input end and an output;

One the 8th transistor (M1 '), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to this positive input terminal via 1 the 11 resistance (R1a '), and a grid is connected to this output;

One the 9th transistor (M2 '), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to this negative input end via 1 the 12 resistance (R2a '), and a grid is connected to this output;

1 the 13 resistance (R1 ' b) be connected between this first voltage and this positive input terminal;

1 the 14 resistance (R2 ' b) be connected between this first voltage and this negative input end;

One the 3rd diode (Q1 '), it comprises a collector electrode, a base stage, its two be connected to this first voltage, and an emitter-base bandgap grading is connected to the drain electrode of the 8th transistor (M1 ') via one the 6th resistance (R3 ');

One the 4th diode (Q2 '), it comprises a collector electrode, a base stage, its two be connected to this first voltage, and an emitter-base bandgap grading is connected to the drain electrode of this 9th transistor (M2 '); And

The tenth transistor (M3 '), its comprise one its comprise one source pole and be connected to this second voltage, a grid is connected to this output, and a drain electrode is connected to this Section Point (n2).

13. bandgap reference circuit as claimed in claim 12, this second voltage is earth terminal, this first voltage is higher than earth terminal, this the first transistor (M4) and this transistor seconds (M5) are PNP transistor, the 8th transistor (M1 '), the 9th transistor (M2 ') and the tenth transistor (M3 ') be NPN transistor, and the 3rd diode (Q1 ') and the 4th diode (Q2 ') be NPN type diode.

14. a bandgap reference circuit, it comprises:

One CMOS P P-channel circuit is in order to provide one first reference voltage in a first node (n1);

One CMOS N P-channel circuit is in order to provide one second reference voltage in a Section Point (n2); And

One subtracter, it comprises:

One the first transistor (M4), it comprises one source pole and is connected to one first voltage, a drain electrode and a grid, its two be connected to this Section Point (n2);

One transistor seconds (M5), it comprises one source pole and is connected to this first voltage, and a drain electrode is connected to one the 3rd node (n3), and a grid is connected to the grid of this first transistor (M4);

One the 3rd transistor (M6), it comprises one source pole and is connected to one second voltage, a drain electrode and a grid, its two be connected to this first node (n1);

One the 4th transistor (M7), it comprises one source pole and is connected to this second voltage, and a drain electrode is connected to the 3rd node (n3), and a grid is connected to the grid of the 3rd transistor (M6); And

One output resistance (RREF) is connected between the 3rd node (n3) and this second voltage.

15. bandgap reference circuit as claimed in claim 14, this the first transistor (M4) and this transistor seconds (M5) are PNP transistor, the 3rd transistor (M6) and the 4th transistor (M7) are NPN transistor, this second voltage is earth terminal, and this first voltage is higher than earth terminal.

16. bandgap reference circuit as claimed in claim 15, wherein this CMOS P P-channel circuit and this CMOS N P-channel circuit produce an output reference voltage that is lower than 1 volt respectively and also are input into this first node (n1) and this Section Point (n2) respectively.

17. bandgap reference circuit as claimed in claim 14, wherein when second voltage was earth terminal, this first voltage was approximately 0.9 volt, so that the output reference voltage of one the 3rd node is between 550 to 570 millivolts.

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