CN1670802B - Display device and electronic appliance - Google Patents

Display device and electronic appliance Download PDF

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Publication number
CN1670802B
CN1670802B CN2005100560061A CN200510056006A CN1670802B CN 1670802 B CN1670802 B CN 1670802B CN 2005100560061 A CN2005100560061 A CN 2005100560061A CN 200510056006 A CN200510056006 A CN 200510056006A CN 1670802 B CN1670802 B CN 1670802B
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China
Prior art keywords
transistor
circuit
light
grid
emitting component
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Expired - Fee Related
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CN2005100560061A
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Chinese (zh)
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CN1670802A (en
Inventor
山崎舜平
棚田好文
纳光明
安西彩
小山润
木村肇
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266Details of drivers for scan electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3291Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0439Pixel structures
    • G09G2300/0465Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0254Control of polarity reversal in general, other than for liquid crystal displays
    • G09G2310/0256Control of polarity reversal in general, other than for liquid crystal displays with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/029Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/041Temperature compensation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/861Repairing

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A low power consumption display device and an electronic appliances are provided. The display device of the invention comprises a pixel region including a plurality of pixels, a source driver, a first gate driver, and a second gate driver. Each of the plurality of pixels includes a light emitting element, a first transistor for controlling a video signal input to the pixel, a second transistor for controlling emission/non-emission of the light emitting element.

Description

Display device and electronic equipment
Technical field
The present invention relates to a kind of display device, its driving method and electronic equipment such as televisor that comprises self-emission device.In addition, the present invention relates to a kind of component substrate, be formed on the insulating surface at element on the component substrate.In addition, the present invention relates to include separately the Source drive and the gate driver of a plurality of elements.
Background technology
The application is based on the Japanese patent application No.2004-080739 and the 2004-134759 that submit in Jap.P. office respectively on March 19th, 2004 and on April 28th, 2004, and the full content of these applications is hereby incorporated by reference.
In recent years, developed the display device that comprises by the represented light-emitting component of EL (electroluminescence) element, and utilized its advantage, expected that it has application widely such as the light weight of high image quality, wide visual angle, thin profile, autoluminescence type.Light-emitting component has its brightness and the proportional character of current value wherein.For display gray scale accurately, a kind of display device that adopts constant-current driving is arranged, make steady current flow through light-emitting component (referring to patent documentation 1).
[patent documentation 1] Japanese Patent Laid Open Publication No.2003-323159.
Have the electronic equipment of Presentation Function such as information terminal and portable phone and used widely, but because these electronic equipments use batteries, reducing power consumption is key point.Yet when adopting constant-current driving as the display device disclosed in the patent documentation 1, the driving transistors of connecting with light-emitting component must operate at the zone of saturation.Therefore, need high driving voltage, and high driving voltage hinders the power consumption reduction.
Summary of the invention
In view of the above, the invention provides a kind of low-power consumption display device and driving method thereof.
Display device according to one aspect of the invention comprises the pixel region that comprises a plurality of pixels, Source drive, first grid driver and second driver.In a plurality of pixels each includes light-emitting component, is used to control the first transistor of the vision signal of input pixel, be used to control light-emitting component luminous/non-luminous transistor seconds, and preferably include the capacitor that is used for stored video signal.
The grid of the first transistor links to each other with second gate driver with first grid driver by grid line.One of them links to each other the source electrode of the first transistor and drain electrode with Source drive by the source line.The source electrode of the first transistor with the drain electrode in another one be connected with the grid of transistor seconds.One of them links to each other the source electrode of transistor seconds and drain electrode with the pixel electrode of light-emitting component.The source electrode of transistor seconds with the drain electrode in another one be connected with power supply.
In said structure, two transistors only are set in each pixel, thereby can obtain high aperture ratio.Obtain high aperture than the time, reduce with the brightness of the increase light-emitting component of light-emitting area.Therefore, can reduce driving voltage of light-emitting, thereby reduce power consumption.
Display device of the present invention adopts constant voltage driving, and it imposes on light-emitting component with constant voltage.According to constant voltage driving, driving transistors need not to be operated in the zone of saturation, and does not need to increase driving voltage.Therefore, compare, can reduce power consumption with constant-current driving.
Capacitor comprises that the semiconductor layer with the first transistor and transistor seconds is provided at the semiconductor layer in one deck, be provided at the conductive layer in one deck with the grid of the first transistor and transistor seconds, and be provided in insulation course between semiconductor layer and the conductive layer.Replacedly, capacitor comprises that the grid with the first transistor and transistor seconds is provided at first conductive layer in one deck, with be provided at second conductive layer in one deck with the conductive layer (source/drain electrode wiring) that drain electrode links to each other with the source electrode of the first transistor and transistor seconds, and be provided in insulation course between first conductive layer and second conductive layer.
According to the present invention with said structure, capacitor is provided at below source/drain electrode wiring, thereby can effectively utilize the area of a pixel.Therefore, the layout of capacitor can not reduce the aperture ratio.
The thickness of the conductive layer (source/drain electrode wiring) that is connected with drain electrode with the source electrode of the first transistor and transistor seconds is 500 to 1300nm.In addition, first insulation course is provided at the first transistor with second insulation course that contacts with first insulation course and above the transistor seconds, and first electrode of light-emitting component is provided at above second insulation course.
The edge isolation parietal layer (insulation course) of first electrode of covering luminous element is provided.The bank layer (bank layer) (insulation course is also referred to as bank layer in this explanation) that is positioned at above the capacitor is 10 to 25 μ m at the width of column direction.Replacedly, provide the bank layer (insulation course) of first electrode edge of covering luminous element, and this bank layer (insulation course) printing opacity.
First electrode of light-emitting component and one of them reflected light of second electrode, another printing opacity.Replacedly, first electrode of light-emitting component and the equal printing opacity of second electrode.
Display device of the present invention comprises power control circuit, is used to change the electromotive force of first power supply and second source, thereby reverse biased can be imposed on light-emitting component.
Display device of the present invention comprises and can also comprise power control circuit according to the observation circuit of environment temperature work, is used for changing the electrical source voltage that is provided to pixel region based on the output of observation circuit.
The Source drive that comprises in the light-emitting device of the present invention comprises impulse output circuit, latch, selection circuit, first holding circuit that is connected with the input node of impulse output circuit, is provided at second holding circuit between impulse output circuit and the latch and is provided at the 3rd holding circuit of selecting between circuit and the pixel region.
First grid driver that is comprised in the display device of the present invention and each in second gate driver include impulse output circuit, select circuit, first holding circuit that is connected with the input node of impulse output circuit and are provided at second holding circuit of selecting between circuit and the pixel region.
Holding circuit comprises the one or more elements that are selected from resistor, capacitor and rectifier.Rectifier is a kind of grid and drain electrode transistor connected to one another, perhaps diode.Impulse output circuit is equivalent to a plurality of flop-over circuits (flip-flop circuit) or decoder circuit.
The material of the material of the green emission that light-emitting component can obtain by the material of the red emission that obtains from triple excited states, from the singlet excited state or the blue emission that obtains from the singlet excited state forms.Replacedly, the material of the material of the green emission that obtains by the material of the red emission that obtains from triple excited states, from triple excited states of light-emitting component or the blue emission that obtains from the singlet excited state forms.When using from luminescent material that the 3rd excited state obtains, it shows high-luminous-efficiency, thereby can realize low-power consumption.
In the pixel region that display device of the present invention comprised, provide many power leads that are connected with first power supply along column direction, and share every power lead by neighbor.
The invention provides a kind of component substrate, this component substrate is under such state, has wherein finished the forming process until the pixel electrode of light-emitting component in having the display device of said structure.More specifically, component substrate is equivalent to such state, and promptly transistor is formed on the insulating surface with the pixel electrode that is connected with transistor, but electroluminescence layer and counter electrode also do not form.
Display device of the present invention is operated in such a way.One frame period comprised a plurality of period of sub-frame SF1, SF2 ..., SFn (n is a natural number).Each period of sub-frame comprises a plurality of write cycle time Ta1, Ta2 ..., Tan one of them and a plurality of light period Ts1, Ts2 ..., Tsn one of them.In a plurality of write cycle times each includes a plurality of grid selection cycles.Each of a plurality of grid selection cycles includes a plurality of sub-grid selection cycles.For example, the length of a plurality of light periods satisfies: Ts1: Ts2: ...: Tsn=2 (n-1): 2 (n-2): ...: 2 °.The order of a plurality of light periods can be at random.
Replacedly, the one or more cycles that are selected from a plurality of period of sub-frame can be divided into a plurality of cycles, in this case, one or more each and one or more each of being cut apart in the period of sub-frame that do not cut apart in the period of sub-frame include a plurality of write cycle time Ta1, Ta2, ..., one and a plurality of light period Ts1 among the Tam (m is a natural number), Ts2, ..., among the Tsm one.In a plurality of write cycle times each includes a plurality of grid selection cycles, and in a plurality of grid selection cycle each comprises a plurality of sub-grid selection cycles.
Replacedly, the one or more cycles that are selected from period of sub-frame can be divided into a plurality of cycles, in this case, one or more each and one or more each of being cut apart in the period of sub-frame that do not cut apart in the period of sub-frame include a plurality of write cycle time Ta1, Ta2, ..., one and a plurality of light period Ts1 among the Tam (m is a natural number), Ts2, ..., among the Tsm one.In a plurality of write cycle times each includes a plurality of grid selection cycles, and each grid selection cycle comprises a plurality of sub-grid selection cycles.The order of a plurality of light periods is at random.
In the one-period that is selected from a plurality of sub-grid selection cycles, one of them selects a grid line by first grid driver and second gate driver, and be selected from another cycle of a plurality of sub-grid selection cycles, select a grid line by in the first grid driver and second gate driver another.Light-emitting component is luminous or not luminous according to the vision signal of the grid of input transistor seconds.
Can be used for transistor of the present invention and be not limited to a certain type.It can be to use the thin film transistor (TFT) (TFT) with the non-single crystal semiconductor film of amorphous silicon or polysilicon representative, the MOS transistor of using Semiconductor substrate or SOI substrate to form, junction transistor, bipolar transistor, use the organic semi-conductor transistor, carbon nano-tube etc.In addition, form transistorized substrate above and be not limited to a certain type, it can be single crystalline substrate, SOI substrate or glass substrate.
In the present invention, " connection " comprise " electrical connection ".Therefore, in structure of the present invention, except predetermined connection, also provide other elements that can be electrically connected (for example, other elements or switch).In addition, being arranged at capacitor in the pixel can wait with transistorized gate capacitance and replace.In this case, can omit capacitor.
In addition, switch can be any switch, as electric switch and mechanical switch.It can be transistor, diode or the logical circuit that comprises them.Therefore, when using transistor as switch, transistor only plays switch, thus the polarity of limit transistor (conduction) not.But, when the needs cut-off current is very little, need to adopt the transistor of the sort of polarity with less cut-off current.Transistor with LDD zone is a kind of transistor with little cut-off current.When transistor its source electromotive force when working as switch more approaches low potential side power supply (VSS, Vgnd, 0V etc.) time, need to adopt the N-channel transistor, and when its source electromotive force more approaches high potential side power supply (VDD etc.) when transistor is worked, need to adopt the P-channel transistor.This is that this helps the operation of switch because can increase the absolute value of gate source voltage.Note, can utilize the CMOS transistor by using N-raceway groove and P-channel transistor simultaneously.
Compare with the situation of utilizing constant-current driving, can reduce driving voltage of light-emitting, thereby reduce power consumption according to the present invention who utilizes constant voltage driving.
Description of drawings
Figure 1A and 1B represent the pixel that comprised in the display device of the present invention and the figure of cross-sectional structure thereof respectively.
Fig. 2 is the figure of the mask design of the pixel that comprised in the display device of the present invention of expression.
Fig. 3 is the figure of the mask design of the pixel that comprised in the display device of the present invention of expression.
Fig. 4 is the figure of the structure of expression display device of the present invention.
Fig. 5 is the figure of the structure of the Source drive that comprised in the display device of the present invention of expression.
Fig. 6 is the figure of the structure of the Source drive that comprised in the display device of the present invention of expression.
Fig. 7 is the figure of the structure of the Source drive that comprised in the display device of the present invention of expression.
Fig. 8 is the figure of the structure of the gate driver that comprised in the display device of the present invention of expression.
Fig. 9 is the figure of the structure of the gate driver that comprised in the display device of the present invention of expression.
Figure 10 is the figure of expression temperature compensation function of the present invention.
Figure 11 A and 11B are the charts of the operation of expression display device of the present invention.
Figure 12 A to 12D is the chart of express time gray scale approach.
Figure 13 is the chart of express time gray scale approach.
Figure 14 A and 14B represent the mask design of pixel included in the display device of the present invention and the figure of structure thereof.
Figure 15 A and 15B be respectively expression according to the present invention the panel of a kind of pattern of display device and the figure of cross-sectional structure thereof.
Figure 16 A and 16B are the figure of expression cross-sectional structure of the panel of a kind of pattern of display device according to the present invention.
Figure 17 A to 17F represents that each all has the view of the electronic equipment of display device of the present invention.
Figure 18 is the figure of the structure of expression holding circuit.
Figure 19 A and 19B are the figure of the pixel that comprised in the display device of the present invention of expression, and Figure 19 C is the figure of its cross-sectional structure of expression.
Figure 20 is the figure of expression compensating circuit of the present invention.
Figure 21 A and 21B are the figure of the temperature characteristics of expression light-emitting component.
Figure 22 is the figure of expression compensating circuit of the present invention.
Figure 23 is the figure of expression compensating circuit of the present invention.
Figure 24 is the figure of expression compensating circuit of the present invention.
Figure 25 is a kind of exemplary source driver of the present invention that can be applicable to.
Figure 26 is a kind of exemplary source driver of the present invention that can be applicable to.
Figure 27 is a kind of exemplary source driver of the present invention that can be applicable to.
Figure 28 is the figure of the structure of the gate driver that comprised in the display device of the present invention of expression.
Figure 29 is the figure of the structure of the gate driver that comprised in the display device of the present invention of expression.
Figure 30 is the synoptic diagram that expression has the display device of the present invention of delay circuit.
Figure 31 is a kind of exemplary delay circuit of the present invention that can be applicable to.
Figure 32 is a kind of exemplary delay circuit of the present invention that can be applicable to.
Figure 33 is a kind of exemplary delay circuit of the present invention that can be applicable to.
Figure 34 is the sequential chart that can be applicable to delay circuit of the present invention.
Figure 35 is the sequential chart that can be applicable to delay circuit of the present invention.
Figure 36 is the figure of the structure of expression display device of the present invention.
Embodiment
Although fully describe the present invention by by way of example and embodiment with reference to the accompanying drawings, but be appreciated that various changes and improvements it will be apparent to those skilled in the art that.Therefore, unless these changes and improvements have departed from scope of the present invention, be included in the scope of the present invention otherwise should be interpreted as these changes and improvements.Note almost in institute's drawings attached, all using identical Reference numeral to represent identical part in the described below structure of the present invention.
[embodiment 1]
The structure of display device is according to one preferred embodiment of the present invention described below with reference to Figure 1A to 3.Display device of the present invention comprises a plurality of pixels 10, (x is a natural number to each pixel at source line Sx, and (y is a natural number, and satisfies 1≤y≤n) intersect each other and insulator comprises a plurality of elements (referring to Figure 1A) in the zone between them to satisfy 1≤x≤m) and grid line Gy.Pixel 10 comprises light-emitting component 13, capacitor 16 and two transistors.One of them is switching transistor 11 (hereinafter being also referred to as TFT 11) for two transistors, is used to control the vision signal of input pixel 10; Another is driving transistors 12 (hereinafter being also referred to as TFT 12), be used to control light-emitting component 13 luminous/not luminous. TFT 11 and 12 is field effect transistor, and it has grid, source electrode and three terminals of drain electrode.
The grid of TFT 11 links to each other with grid line Gy, and its source electrode and drain electrode one of them link to each other with source line Sx, and another grid with TFT 12 links to each other.The source electrode of TFT 12 and drain electrode one of them (x is a natural number, and satisfied 1≤x≤m) be connected with first power supply 17, and another one wherein links to each other with the pixel electrode of light-emitting component 13 by power lead Vx.The counter electrode of light-emitting component 13 links to each other with second source 18.Capacitor 16 is arranged between the grid and source electrode of TFT 12.Not restricted T FT 11 and 12 electric conductivity can adopt any in N-channel TFT and the P-channel TFT.Figure 1A represents that TFT 11 is the N-channel TFT, and TFT 12 is the situation of P-channel TFT.The electromotive force of first power supply 17 and second source 18 is unrestricted.But, only require they are set at different electromotive forces, thereby apply forward bias or reverse biased to light-emitting component 13.
In having the display device of the present invention of said structure, only be provided with two transistors in the pixel 10.Therefore, transistorized quantity set in the pixel 10 can be reduced, and the quantity of required wiring must be reduced like this.Thereby, can realize high aperture ratio, high resolving power and high yield.When realize high aperture than the time, along with the increase of light-emitting area, the brightness of light-emitting component reduces.That is, can reduce current density.Therefore, driving voltage can be reduced so that reduce power consumption.In addition, low driving voltage will improve reliability.
The semiconductor that constitutes TFT 11 and 12 can be any in amorphous semiconductor (amorphous silicon), crystallite semiconductor, poly semiconductor (polysilicon) and the organic semiconductor.Crystallite semiconductor can use silane gas (SiH 4) and fluorine gas (F 2) or use silane gas and hydrogen to form.Replacedly, it can form film by using above-mentioned gas, and obtains with Later Zhou Dynasty, one of the Five Dynasties's laser radiation.The grid that utilizes conductive material to form each TFT 11 and 12 makes it have one or more layers.For example, adopt the rhythmo structure of tungsten (W) and tungsten nitride (WN), the rhythmo structure of molybdenum (Mo), aluminium (Al) and molybdenum (Mo), the perhaps rhythmo structure of molybdenum (Mo) and molybdenum nitride (MoN).Utilize conductive material to constitute the conductive layer (source/drain electrode wiring) that is connected with the extrinsic region (source electrode and drain electrode) that comprises among the TFT 11 and 12 by one or more layers.For example, can adopt the lamination of titanium (Ti), aluminium-silicon (Al-Si) and titanium (Ti), the lamination of molybdenum (Mo), aluminium-silicon (Al-Si) and molybdenum (Mo), the perhaps lamination of molybdenum nitride (MoN), aluminium-silicon (Al-Si) and molybdenum nitride (MoN).
Fig. 2 represents to have the arrangement plan of the pixel 10 of said structure.Express in this arrangement plan TFT11 and 12, capacitor 16, with the corresponding conductive layer 19 of pixel electrode of light-emitting component 13.Figure 1B represents the cross-sectional structure of arrangement plan among Fig. 2 that A-B-C along the line makes.TFT 11 and 12, light-emitting component 13 and capacitor 16 are formed on the have insulating surface substrate 20 of (as glass or quartz).
Light-emitting component 13 is corresponding to the lamination of conductive layer 19 (pixel electrode), electroluminescence layer 33 and conductive layer 34 (counter electrode).When conductive layer 19 and 34 equal printing opacities, light-emitting component 13 is at conductive layer 19 and conductive layer 34 these both directions emission light.That is, light-emitting component 13 is to both sides emission light.On the other hand, when conductive layer 19 and 34 one of them printing opacity and during another shading, light-emitting component 13 is only at conductive layer 19 or conductive layer 34 directions emission light.That is, light-emitting component 13 is luminous to top side or bottom side.Figure 1B represents the cross-sectional structure of light-emitting component 13 to the luminous situation in bottom side.
Capacitor 16 is arranged between the grid and source electrode of TFT 12, and the gate source voltage of storage TFT 12.Capacitor 16 by and TFT 11 and 12 in the semiconductor layer that comprises be provided at the semiconductor layer in one deck 21, and the grid of TFT 11 and 12 be provided at conductive layer 22a in one deck and 22b (hereinafter being referred to as conductive layer 22) and be provided at semiconductor layer 21 and conductive layer 22 between insulation course form electric capacity.Equally, capacitor 16 by and the grid of TFT 11 and 12 be provided at the conductive layer in one deck 22, and the conductive layer 24 to 27 that is connected to the source electrode of TFT 11 and 12 or drain electrode be provided at the conductive layer in one deck 23 and be provided at conductive layer 22 and conductive layer 23 between insulation course form electric capacity.According to this structure, capacitor 16 can have enough big so that can store the capacitance of the gate source voltage of TFT 12.In addition, capacitor 16 is provided at below the conductive layer that constitutes power lead, so the configuration of capacitor 16 can not reduce the aperture ratio.
Corresponding with the source/drain electrode wiring of TFT 11 and the 12 respectively conductive layer 24 to 27 and the thickness of conductive layer 23 are 500 to 2000nm, and more preferably 500 to 1300nm is thick.Conductive layer 23 to 27 constitutes source line Sx and power lead Vx.Therefore, by the conductive layer 23 to 27 that forms above-mentioned thickness, can suppress the influence of voltage landing.Note, when forming thick conductive layer 23 to 27, can make the cloth line resistance less.But, when forming very thick conductive layer 23 to 27, be difficult to accurately carry out the composition process, perhaps the surface will have bigger unevenness.That is, consider that cloth line resistance, composition process are easy to carry out and the unevenness on surface, need be in above-mentioned scope with the THICKNESS CONTROL of conductive layer 23 to 27.
In addition, provide the insulation course 28 and 29 that covers TFT 11 and 12 (hereinafter general designation is made first insulation course 30), be provided in second insulation course 31 above first insulation course 30, and be formed at the conductive layer 19 corresponding above second insulation course 31 with pixel electrode.Providing of second insulation course 31 increased the regional surplus of conductive layer 19 formation, and this has realized high aperture ratio.When adopting top emission structure, this structure is very effective.When obtain high aperture than the time, along with the increase driving voltage of light-emitting area reduces, this helps to reduce power consumption.
Notice that first insulation course 30 and second insulation course 31 are to use inorganic material (as silicon dioxide and silicon nitride), organic material (as polyimide and acrylic acid) etc. to form.Can use same material or different materials to form first insulation course 30 and second insulation course 31.In addition, can adopt silicone compositions as in these insulation courses 30 and 31 one or two.Siloxane have Si-O-Si key skeleton structure and contain comprise hydrogen at least organic group (for example, alkyl or aromatic hydrocarbon) as substituting group.Can also use fluorin radical as substituting group.In addition, can use organic group and the fluorin radical that comprises hydrogen.
Between light-emitting component 13, provide bank layer 32 (being also referred to as border, isolation or insulation course).The width 35 of bank layer 32 is enough wide so that can cover the wiring that is provided on the bottom above the capacitor 16.Preferably width 35 is 7.5 to 27.5 μ m, perhaps 10 to 25 μ m (referring to Fig. 3) more preferably.Thus, by forming narrow bank layer 32, can obtain high aperture ratio.When obtain high aperture than the time, along with the increase of light-emitting area can reduce driving voltage, this helps to reduce power consumption.
Attention shown in configuration in, the aperture of pixel is than being about 50%.Pixel 10 is represented with width 38 in the length of column direction (vertically), and pixel 10 is represented with width 37 in the length of line direction (laterally).Bank layer 32 can be formed by inorganic material or organic material.But, owing to electroluminescence layer is provided so that contact with bank layer 32, so thereby bank layer 32 need be formed the radius-of-curvature with continuous variable can not produce pin hole in electroluminescence layer.
In addition, bank layer 32 shadings.According to this structure, the border of neighbor 10 is more clear, thereby can demonstrate high-definition picture.Bank layer 32 comprises pigment or carbon nano-tube.Owing to added pigment or carbon, bank layer 32 is colored so that shading.
Display device of the present invention is included in pixel region 40, first grid driver 41, second gate driver 42 and the Source drive 43 (referring to Fig. 4) that wherein a plurality of above-mentioned pixels 10 are arranged with matrix form.The first grid driver 41 and second gate driver 42 can be arranged on the opposite side of pixel region 40 as shown in FIG., perhaps are arranged on the side of pixel region 40.
Source drive 43 comprises impulse output circuit 44, latch 45 and selects circuit 46.Latch 45 comprises first latch 47 and second latch 48.Select circuit 46 to comprise transistor 49 (hereinafter being called TFT 49) and analog switch 50.TFT 49 and analog switch 50 are arranged in each row corresponding with source line Sx.Phase inverter 51 produces the designature of WE (write/erase) signal, and needn't provide phase inverter 51 when providing the WE signal from the outside.The grid of TFT 49 links to each other with selecting signal wire 52, and one of them is connected its source electrode and drain electrode with source line Sx, and another links to each other with power supply 53.Analog switch 50 is provided between second latch 48 and the source line Sx.That is, the input node of analog switch 50 is connected with second latch 48, and its output node is connected with source line Sx.In two Control Node of analog switch 50 one is connected with selecting signal wire 52, and another is connected with selection signal wire 52 by phase inverter 51.The electromotive force of power supply 53 has the level that the TFT 12 that comprised in pixel of making 10 ends, and it is L (low) level when TFT 12 is the N-channel TFT, and when TFT 12 be H (height) level during for the P-channel TFT.
First grid driver 41 comprises impulse output circuit 54 and selects circuit 55.Second gate driver 42 comprises impulse output circuit 56 and selects circuit 57.Select circuit 55 to link to each other with selecting signal wire 52 with 57.Notice that the selection circuit 57 that comprises in second gate driver 42 is connected with selecting signal wire 52 by phase inverter 58.That is, inverting each other by the WE signal of selecting signal wire 52 input selection circuits 55 and 57.
Each that select circuit 55 and 57 includes three-state buffer.The input node of three-state buffer is connected with impulse output circuit 54 or impulse output circuit 56, and its Control Node is connected with selecting signal wire 52.The output node of three-state buffer is connected with grid line Gy.When the signal from 52 transmission of selection signal wire has the H level, three-state buffer work, and when the signal from 52 transmission of selection signal wire had the L level, three-state buffer was in quick condition.
The impulse output circuit 56 that comprises in the impulse output circuit 54 that comprises in the impulse output circuit 44 that comprises in the Source drive 43, the first grid driver 41 and second gate driver 42 is equivalent to have the shift register of a plurality of flop-over circuits, perhaps decoder circuit.When each the employing decoder circuit in impulse output circuit 44,54 and 56, can select source line Sx or grid line Gy randomly.In the time can selecting source line Sx or grid line Gy randomly, can suppress to adopt the false contouring that the time occurs during gray scale approach.
Notice that the structure of Source drive 43 is not limited to top described, and level shifter and impact damper can also be provided in addition.Notice that also the structure of the first grid driver 41 and second gate driver 42 is not limited to top described, and level shifter and impact damper can also be provided in addition.In addition, although do not illustrate among the figure, each in Source drive 43, first grid driver 41 and second gate driver 42 includes holding circuit.The structure of the driver that comprises holding circuit is described in the embodiment 2 below.
In addition, display device of the present invention comprises power control circuit 63.Power control circuit 63 comprises controller 62 and is used for power circuit 61 to light-emitting component 13 transmission powers.Power circuit 61 links to each other with the pixel electrode of light-emitting component 13 with power lead Vx by TFT 12.In addition, power circuit 61 links to each other by the counter electrode of power lead with light-emitting component 13.
Thereby carry electric currents so that the emission light time is arranged to have electric potential difference with first power supply 17 and second source 18 when apply forward bias to light-emitting component 13 to light-emitting component 13, thereby make the electromotive force of first power supply 17 be higher than the electromotive force of second source 18.On the other hand,, first power supply 17 and second source 18 are arranged to have electric potential difference, thereby make the electromotive force of first power supply 17 be lower than the electromotive force of second source 18 when when light-emitting component 13 applies reverse biased.By slave controller 62 prearranged signals is flowed to power circuit 61 and carry out this electromotive force setting.
According to the present invention, use power control circuit 63 to apply reverse biased to light-emitting component 13, demote with the passing of time thereby can suppress light-emitting component 13, thereby improve reliability.Light-emitting component 13 may have initial imperfection, promptly because the pin hole that the small teat branch of the adhesion of foreign matter, male or female produces or the unevenness of electroluminescence layer cause its anode and negative electrode to be short-circuited.This initial imperfection will disturb according to signal produce luminous/not luminous, and because almost all electric current all flows to the short circuit part all element do not launch light, perhaps specific pixel is luminous or not luminous, and the problem of preferable image display will take place to carry out.But,, can apply reverse biased, thereby electric current only flows to the short circuit part of anode and negative electrode partly, thereby in the short circuit part, produce heat to light-emitting component according to structure of the present invention.As a result, by oxidation or carbonization and short circuit is partly isolated.Therefore, even if there is initial imperfection, thereby also can carry out preferable image display by eliminating this defective.Note, be preferably in the isolation that this initial imperfection is carried out in delivery before.In addition, be not only initial imperfection, but also can produce another kind of defective, promptly anode and negative electrode are short-circuited as time goes by.This defective is called progressive defects.But,, apply reverse biased to light-emitting component at regular intervals, therefore can eliminate this progressive defects that may exist, and carry out preferable image display according to the present invention.Note, be not specifically limited the time that applies reverse biased to light-emitting component 13.
Display device of the present invention also comprises observation circuit 64 and control circuit 65.Observation circuit 64 comes work according to environment temperature.Control circuit 65 comprises constant current source and impact damper.Shown in structure in, observation circuit 64 comprise the monitoring light-emitting component 66 (hereinafter being also referred to as light-emitting component 66).
Control circuit 65 is carried the signal that is used to change electrical source voltage according to the output of observation circuit 64 to power control circuit 63.Power control circuit 63 is according to the signal of carrying from control circuit 65, and change will flow to the electrical source voltage of pixel region 40.According to the present invention, can suppress to change the fluctuation of caused current value, thereby improve reliability by environment temperature with said structure.Note, in embodiment 3, describe the concrete structure of observation circuit 64 and control circuit 65 below.
According to the display device of the present invention of carrying out constant voltage driving, the brightness of light-emitting component is 500cd/m 2, and the pixel aperture ratio is that 50% o'clock power consumption is 1W or still less (950mW).On the other hand, according to the display device of carrying out constant-current driving, the brightness of light-emitting component is 500cd/m 2, and the aperture ratio is that 25% o'clock power consumption is 2W (2040mW).That is,, can reduce power consumption by adopting constant voltage driving.By adopting constant voltage driving, can suppress power consumption for 1W or still less, more preferably be 0.7W or still less.Notice that above-mentioned power consumption number only is a pixel region, does not comprise the power consumption of driving circuit section.In addition, during employing time gray scale approach, both all show 70% demonstration duty ratio.
In addition, in the two, the quantity of pixel is 240 * 3 * 320 in the pixel region in the display device of carrying out constant voltage driving of measuring power consumption as mentioned above and the display device of carrying out constant-current driving.
Note as described abovely, transistor of the present invention can be any kind, and can be formed on any substrate.Therefore, the entire circuit shown in Fig. 4 can be formed on the substrate of any kind of, as glass substrate, plastic, single crystalline substrate and SOI substrate.Replacedly, a part of circuit among Fig. 4 can be formed on a certain substrate, and its another part can be formed on another substrate.That is, do not require that the entire circuit among Fig. 4 is formed on the same substrate.For example, can adopt a kind of like this structure among Fig. 4, wherein pixel region 40 and first grid driver 41 are formed on the glass substrate with TFT, and Source drive 43 (or its part) is formed on the single crystalline substrate, thereby by COG (be fixed in chip on glass) adhesive technology I C chip is connected on the glass substrate.Replacedly, the IC chip can pass through TAB (carrier band is bonding automatically) or be connected with glass substrate by the use printed circuit board (PCB).
[embodiment 2]
It is the situation of P-channel TFT that said structure is suitable for TFT 12.In the present embodiment, describe TFT 12 with reference to Figure 19 A to 19C and be the situation of N-channel TFT.Pixel 10 comprises light-emitting component 13, capacitor 16 and TFT 11 and 12 (referring to Figure 19 A).When light-emitting component 13 has the forward stepped construction (when pixel electrode is an anode, and counter electrode is when being negative electrode), and the direction of current according to light-emitting component 13 applies forward bias to light-emitting component 13, and then first power supply 17 is equivalent to the high potential power supply, and second source 18 is equivalent to the low potential power supply.On the other hand, when reverse biased was applied to light-emitting component 13, first power supply 17 was the low potential power supply, and second source 18 is the high potential power supply.The gate source voltage of capacitor 16 storage TFT 12.According to said structure, the source electrode of TFT 12 is connected with the pixel electrode of light-emitting component 13, and therefore, capacitor 16 is arranged between the grid of the pixel electrode of light-emitting component 13 and TFT 12.
On the other hand, when light-emitting component 13 has the reverse stack structure (when pixel electrode is a negative electrode, and counter electrode is when being anode), and the direction of current according to light-emitting component 13 is applied to light-emitting component 13 with forward bias, then first power supply 17 is equivalent to the low potential power supply, and second source 18 is equivalent to the high potential power supply.On the other hand, when reverse biased was applied to light-emitting component 13, first power supply 17 was the high potential power supply, and second source 18 is the low potential power supply.In addition, the source electrode of TFT12 is connected with power lead Vx, and therefore, capacitor 16 is arranged between the grid of power lead Vx and TFT12.
The cross-sectional structure of display device shown in Figure 19 C presentation graphs 19A.In this display device, TFT 11 and 12, light-emitting component 13 and capacitor 16 are formed on the have insulating surface substrate of (glass and quartz).Be not specifically limited the conduction of TFT 11, and when TFT 11 was the N-channel TFT, TFT 11 and 12 had identical conduction.Therefore, need not to form respectively TFT, this has improved output.
In having the display device of said structure, only be provided with two transistors in the pixel 10.Therefore, can obtain high aperture ratio, high resolving power and high yield.When obtain high aperture than the time, driving voltage descends, this helps to reduce power consumption.
[embodiment 3]
The structure of the Source drive 43 that is comprised in the display device of the present invention is described now with reference to Fig. 5 to 7.Source drive 43 comprises impulse output circuit 44, NAND71, first latch 47, second latch 48 and selects circuit 46 (first latch 47, second latch 48 and selection circuit 46 general designations are made SLAT in the accompanying drawings) (referring to Fig. 5).Impulse output circuit 44 has the structure that a plurality of element circuits (SSR) 70 cascades connect.Clock signal (SCK), clock back-signalling (SCKB) and initial pulse (SSP) are supplied with impulse output circuit 44.Data-signal (DataR, DataG and DataB) is supplied with first latch 47.The rp pulse (SLATB) of latch pulse (SLAT) and latch pulse is supplied with second latch 48.The inversion signal (SWEB) of write/erase signal (SWE or write/erase signal hereinafter are also referred to as the WE signal) and WE signal is supplied with selection circuit 46.
The element circuit 70 that is comprised in the impulse output circuit 44 comprises a plurality of transistors and logical circuit (referring to Fig. 6).The input node (P1) that is supplied to the element circuit 70 of clock signal or clock back-signalling is equipped with transistor 72 as holding circuit.In addition, the input node that is transfused to first latch 47 of data-signal is equipped with transistor 76 to 78 respectively as holding circuit (referring to Fig. 7).In addition, although do not illustrate among Fig. 5, select the subordinate of circuit 46 to have level shifter 73 and impact damper 74, and the subordinate of impact damper 74 have holding circuit 75.Holding circuit 75 every source lines comprise four transistors 79 to 82.Note,, set the electrical source voltage 83 to 85 that flows to impact damper 74 according to the color that will launch from the pixel that is connected with source line Sx.
Source drive 43 comprises first holding circuit (being equivalent to the transistor 72 in the accompanying drawing) that is connected with the input node of impulse output circuit 44; second holding circuit that is connected with the input node of first latch 47 (being equivalent to the transistor 76 to 78 in the accompanying drawing), and be provided at the 3rd holding circuit (being equivalent to the transistor 79 to 82 in the accompanying drawing) in the subordinate of selecting circuit 46.According to this structure, can suppress the degradation or the damage of the element that causes by static.
The structure of first grid driver 41 is described referring now to Fig. 8 and 9.Second gate driver 42 has similar structure with first grid driver 41, therefore, will omit description to it at this.First grid driver 41 comprises impulse output circuit 54, level shifter (GLS) 86 and selects circuit 55 (referring to Fig. 8).The similar of the impulse output circuit 44 that is comprised in the structure of impulse output circuit 54 and the Source drive 43, and it has the structure that a kind of a plurality of element circuit (GSR) 70 cascades connect, and its input node has holding circuit.
Select circuit 55 to comprise three-state buffer 87 and holding circuit 88 (referring to Fig. 9).When first grid driver 41 and second gate driver 42 one of them during to grid line Gy charge or discharge, three-state buffer 87 is used to prevent that the output of other drivers from disturbing this operation.Therefore, except three-state buffer, selecting circuit 55 can also be analog switch, timing phase inverter etc., as long as it has above-mentioned functions.Holding circuit 88 comprises element group 89 and 90.
First grid driver 41 comprises second holding circuit 88 on first holding circuit that is connected with the input node of impulse output circuit 54 and the subordinate that is provided at holding circuit 55.According to this structure, can suppress the degradation or the damage of the element that causes by static.More specifically, the clock signal or the data-signal that are input to the input node may have noise, and this noise applies high pressure or low pressure to element instantaneously.But, according to the present invention with holding circuit, but degradation takes place or damages in straining element.
Note, not only use resistor and transistor, but also use the one or more elements that are selected from resistor, capacitor and rectifier to constitute holding circuit.Rectifier is a kind of its grid and drain electrode transistor connected to one another, or diode.
The operation of holding circuit will be described now.Herein, the operation to the holding circuit 88 that comprises in the first grid driver 41 is described.At first, because the influence of noise etc. is carried the higher signal of voltage ratio VDD from the output node of three-state buffer 87.Then, because the relation of its gate source voltage, element group 89 is ended, element group 90 conductings simultaneously.Next, the electric charge that is stored in the three-state buffer 87 is released to the power lead that is used to transmit VDD, thereby the electromotive force of grid line Gx becomes VDD or VDD+ α.On the other hand, if carry the low signal of voltage ratio VSS from the output node of three-state buffer 87, then because the relation of its gate source voltage, 89 conductings of element group, element group 90 is ended simultaneously.At this moment, the electromotive force of grid line Gx becomes Vss or VSS-α.Thus, even if owing to reasons such as noises, the voltage of carrying from the output node of three-state buffer 87 becomes instantaneously and is higher than VDD or is lower than VSS, and the voltage that flows to grid line Gx can not become yet and be higher than VDD or be lower than VSS.Therefore, can suppress inefficacy, degradation or the damage of the element that causes by noise, static etc.
Display device of the present invention comprises and being provided in as the junctional membrane of FPC (flexible print circuit) and the holding circuit 101 (referring to Figure 18) between first grid driver 41, second gate driver 42 or the Source drive 43.For Source drive 43, carry signal from the outside by junctional membrane, and holding circuit 101 is provided between the wiring and junctional membrane that is used for transmission signals such as SCK, SSP, DataR, DataG, DataB, SLAT and SWE.For first grid driver 41, carry signal from the outside by junctional membrane, and holding circuit 101 is provided at and is used to transmit between these wiring lines and the junctional membrane such as GCK, G1SP, PWC and WE.Shown in the structure, holding circuit 101 comprises transistor 95 and 96 (each transistorized grid is connected with drain electrode), resistor 97 and 98 and capacitor 99 and 100.This embodiment can combine with other embodiments of the present invention.
[embodiment 4]
Can realize temperature compensation function of the present invention (referring to Figure 10) according to observation circuit 64, control circuit 65 and the power control circuit 63 of environment temperature work by using.Observation circuit 64 comprises the light-emitting component 66 in the accompanying drawing.One of them electrode of light-emitting component 66 is connected with the power supply of fixed potential (being ground connection in the accompanying drawings), and another electrode is connected with control circuit 65.Control circuit 65 comprises constant current source 91 and amplifier 92.Power control circuit 63 comprises power circuit 61 and controller 62.Note, wish that power circuit 61 for variable power supply, can change the electrical source voltage that will carry thus.
The mechanism of using light-emitting component 66 to check environment temperature will be described now.By constant current source 91 delivered constant electric current between the comparative electrode of light-emitting component 66.That is, the current value of light-emitting component 66 is always constant.When environment temperature changed under this condition, light-emitting component 66 resistance values own also changed.When the resistance value of light-emitting component 66 changes,, thereby produce electric potential difference between the comparative electrode of light-emitting component 66 because no matter when the current value of light-emitting component 66 all is constant.By checking the electric potential difference that between the comparative electrode of light-emitting component 66, produces by temperature change, can check the change of environment temperature.More specifically, the electrode potential that is in fixed potential of light-emitting component 66 remains unchanged, and therefore, checks that the electromotive force of the comparative electrode that links to each other with constant current source 91 changes.Give amplifier 92 with the signal conveys that comprises the data of this electromotive force change of relevant light-emitting component, and be exaggerated device 92 amplifications, export power control circuit 63 to.Power control circuit 63 is according to the output of observation circuit 64, and change will flow to the electrical source voltage of pixel region 40 by amplifier 92.Therefore, can be with temperature change offset supply electromotive force.That is, can suppress the fluctuation of the current value that causes by temperature change.
Note, provide a plurality of light-emitting components 66 in the accompanying drawing, but the present invention is not limited thereto.The quantity of the light-emitting component 66 that provides in the observation circuit 64 is provided.In addition, even adopt light-emitting component 66, transistor also can be connected in series with light-emitting component 66.In this case, the transistor that is connected in series with light-emitting component 66 is switched on as required.In addition, adopt light-emitting component 66, but, the invention is not restricted to this, can use other known temperature sensors as observation circuit 64.In the situation of using the known temperature sensor, it can be provided on the same substrate with pixel region 40, perhaps utilizes IC to link to each other from the outside.Temperature compensation function of the present invention need not user control, even therefore after distributing to the final user, also compensates serially.Therefore, can realize the long-life of product.This embodiment can freely combine realization with other embodiments of the present invention.
[embodiment 5]
The operation of display device of the present invention is described with reference to Fig. 4,11A and 11B.The operation (referring to Fig. 4 and Figure 11 A) of Source drive at first, is described.With clock signal (SCK), clock inversion signal (SCKB) and initial pulse (SSP) input pulse output circuit 44.According to the sequential of these signals, to first latch, 47 output sampling pulses.First first latch 47 that is transfused to data to last row is according to the input timing stored video signal of sampling pulse.When the input and latch pulse, the vision signal that is stored in first latch 47 is sent to second latch 48 immediately together.
Now, the operation of selecting circuit 46 in each cycle will be described, suppose from the cycle of selecting signal wire 52 to transmit L level WE signals be T1, and from the cycle of selecting signal wire 52 transmission H level WE signals be T2.Period T 1 and T2 all are equivalent to the half period of horizontal scanning period, and period T 1 is called the first sub-grid selection cycle, and period T 2 is called the second sub-grid selection cycle.
In period T 1 (the first sub-grid selection cycle), be the L level from the WE signal of selecting signal wire 52 to transmit, and TFT 49 conductings, and analog switch 50 ends.Thereby a plurality of signal wire S1 to Sn are electrically connected with power supply 53 by the TFT 49 that is provided in every row.That is, a plurality of signal wire S1 to Sn have same potential with power supply 53.At this moment, TFT 11 conductings that comprised in the pixel 10, the electromotive force of power supply 53 sends the grid of TFT 12 to by TFT 11.Next, TFT 12 ends, and the comparative electrode of light-emitting component 13 has same potential.That is, between the comparative electrode of light-emitting component 13, do not have electric current to flow, so it does not launch light.Thus, the operation that irrespectively electromotive force of power supply 53 is sent to the grid of TFT 12 with the vision signal that inputs to signal wire is called erase operation, this operation with TFT 11 by so that the comparative electrode of light-emitting component 13 has same potential.
In period T 2 (the second sub-grid selection cycle), be the H level from the WE signal of selecting signal wire 52 to transmit, and TFT 49 end, and analog switch 50 conductings.Thereby the delegation's vision signal that is stored in second latch 48 is sent to a plurality of signal wire S1 to Sn immediately together.At this moment, TFT 11 conductings that comprised in the pixel 10, vision signal sends the grid of TFT 12 to by TFT 11.Next, according to the vision signal of being imported, TFT 12 conductings or end, thus make the comparative electrode of light-emitting component 13 have different electromotive forces or same potential.More specifically, when TFT 12 conductings, the comparative electrode of light-emitting component 13 has different electromotive forces, thereby electric current is flowed in the light-emitting component 13.That is light-emitting component 13 emission light.Notice that the electric current that flow in the light-emitting component 13 has identical numerical value with the source-drain electrodes electric current of TFT 12.On the other hand, when TFT 12 ended, the comparative electrode of light-emitting component 13 had same potential, thereby did not have electric current to flow in the light-emitting component 13.That is, light-emitting component 13 is not launched light.Thus, thus TFT 12 is called write operation according to the vision signal conducting or by the operation that the comparative electrode that makes light-emitting component 13 has different electromotive forces or a same potential.
Now, will the operation of the first grid driver 41 and second gate driver 42 be described.To impulse output circuit 54 input G1CK, G1CKB and G1SP.According to the sequential of these signals, pulse exports in succession selects circuit 55.To impulse output circuit 56 input G2CK, G2CKB and G2SP.According to the sequential of these signals, pulse exports in succession selects circuit 57.Figure 11 B represents to flow to the i that selects circuit 55 and 57, j, and k and p are capable, and (i, j, k and p are natural number, and satisfy 1≤i, the electromotive force of the pulse of each row among the j, k and p≤n).
Now, similar with the description of the operation of relevant Source drive 43, operation to the selection circuit 57 that comprised in the selection circuit 55 that comprised in the first grid driver 41 in each cycle and second gate driver 42 is described, suppose from the cycle of selecting signal wire 52 to transmit L level WE signals be T1, from the cycle of selecting signal wire 52 to transmit H level WE signals be T2.Note, in the sequential chart of Figure 11 B, represent that with Gy41 (y is a natural number, and satisfies the electromotive force of 1≤y≤n), and represents from the electromotive force of the grid line of second gate driver, 42 received signals with Gy42 for grid line Gy from first grid driver 41 received signals.Gy41 represents identical wiring with Gy42.
In period T 1 (the first sub-grid selection cycle), be the L level from the WE signal of selecting signal wire 52 to transmit.Next, the WE signal of the selection circuit 55 input L level that comprised in first grid driver 41 selects circuit 55 to be in quick condition thereby make.On the other hand, selection circuit 57 inputs that comprised in second driver 42 and the H level signal of WE signal inversion select circuit 57 to be in mode of operation thereby make.That is, select circuit 57 that H level signal (row selection signal) is transferred to the grid line Gi of i in capable, thereby make grid line Gi have the electromotive force identical with the H level signal.Just, select the grid line Gi of i in capable by second gate driver 42.As a result, TFT 11 conductings that comprised in the pixel 10.Then, the electromotive force of the power supply 53 that is comprised in the Source drive 43 is transmitted to the grid of TFT 12, thereby TFT 12 is ended, and two electrodes of light-emitting component 13 have mutually the same electromotive force.That is, carry out erase operation in this cycle, wherein light-emitting component 13 is not launched light.
In period T 2 (the second sub-grid selection cycle), be the H level from the WE signal of selecting signal wire 52 to transmit.Next, the WE signal of the selection circuit 55 input H level that comprised in first grid driver 41 selects circuit 55 to be in mode of operation thereby make.Just, select circuit 55 that the H level signal is transferred to the grid line Gi of i in capable, thereby make grid line Gi have the electromotive force identical with the H level signal.That is, select the grid line Gi of i in capable by first grid driver 41.As a result, TFT 11 conductings that comprised in the pixel 10.Then, second latch 48 that vision signal comprises from Source drive 43 sends the grid of TFT 12 to, thereby makes TFT 12 conductings or end, and two electrodes of light-emitting component 13 have different electromotive forces or same potential.Just, carry out write operation in this cycle, wherein light-emitting component 13 is launched light or is not launched light.On the other hand, the selection circuit 57 input L level signals that in second gate driver 42, comprise, thus make it be in quick condition.
Thus, in period T 1 (the first sub-grid selection cycle), select grid line Gy, and in period T 2 (the second sub-grid selection cycle), select grid line Gy by first grid driver 41 by second gate driver 42.That is, the first grid driver 41 and second gate driver 42 are controlled grid line in a kind of mode of complementation.In addition, carry out erase operation at the first sub-grid selection cycle and the second sub-grid selection cycle in one of them, and in another cycle, carry out write operation.
Notice that in the cycle of the grid line Gi in capable by first grid driver 41 selection i, second gate driver 42 is not in mode of operation (selecting circuit 57 to be in quick condition), perhaps row selection signal is sent to the grid line in the row except that i is capable.Similarly, when the grid line Gi in i is capable received row selection signal from second gate driver 42, first grid driver 41 was in quick condition, perhaps row selection signal is sent to the grid line in the row except that i is capable.
The present invention according to carrying out aforesaid operations can make light-emitting component 13 end by force, even therefore the quantity of gray level increases, also can improve duty ratio.In addition, although light-emitting component 13 is ended, do not need to be provided for the TFT of the electric charge of releasing capacitor 16.Thereby, can obtain high aperture ratio.When obtain high aperture than the time, along with the increase of light-emitting area, the brightness of light-emitting component reduces, this helps power consumption to reduce.That is, can reduce driving voltage, so that reduce power consumption.
Note, the invention is not restricted to above-mentioned grid selection cycle mode in two.The grid selection cycle can be divided into the three or more cycles.Present embodiment can freely combine enforcement with above-mentioned embodiment.
Also note, in preceding half grid selection cycle (the first sub-grid selection cycle), erase signal is inputed to pixel, and in the half grid selection cycle in back (the second sub-grid selection cycle), vision signal is inputed to pixel, but, the invention is not restricted to this.Can also in preceding half grid selection cycle (the first sub-grid selection cycle), vision signal be inputed to pixel, and in the half grid selection cycle in back (the second sub-grid selection cycle), erase signal be inputed to pixel.
Replacedly, can also be in preceding half grid selection cycle (the first sub-grid selection cycle), vision signal to be inputed to pixel, in the half grid selection cycle in back (the second sub-grid selection cycle), another vision signal is inputed to pixel.Can in each cycle, import the signal corresponding with different subframes.As a result, can provide period of sub-frame and need not erase cycle, thereby dispose light period continuously.Owing to do not need to provide erase cycle in this case, therefore can increase duty ratio.
[embodiment 6]
Represent that with reference to ordinate (sequential chart (Figure 12 B and 12D) of 1≤i≤m) is described the operation of display device of the present invention to grid line Gi in capable of the sequential chart (Figure 12 A and 12C) of sweep trace, horizontal ordinate express time and i below.In the time gray scale approach, a frame period comprises a plurality of period of sub-frame SF1, SF2 ..., SFn (n is a natural number).In a plurality of period of sub-frame each includes a plurality of write cycle of the Ta1 that carries out write operation or erase operation, Ta2 ..., one and a plurality of light period Ts1 among the Tan, Ts2 ..., among the Tsn one.Each of a plurality of write cycles includes a plurality of grid selection cycles.In a plurality of grid selection cycles each comprises a plurality of sub-grid selection cycles.Specifically do not limit the divided quantity of each grid selection cycle, but, it is preferably 2 to 8, perhaps more preferably 2 to 4.With light period Ts1: Ts2: ...: the length setting of Tsn is for for example satisfying 2 (n-1): 2 (n-2): ...: 2 1: 2 0That is, with light period Ts1, Ts2 ..., Tsn is set at for each has different length.
To be described in the sequential chart (referring to Figure 12 A and 12B) that is used to show 3 bit gradation levels (8 gray levels) under the situation that AC drive cycle FRB (frame reverse biased) is not provided below.In this case, be divided into three period of sub-frame SF1 to SF3 a frame period.Each period of sub-frame SF1 to SF3 comprises among among the Ta1 to Ta3 write cycle and the light period Ts1 to Ts3.Comprise a plurality of grid selection cycles each write cycle.In a plurality of grid selection cycles each comprises a plurality of sub-grid selection cycles.At this, each grid selection cycle comprises two sub-grid selection cycles: the first sub-grid selection cycle is used to carry out erase operation, and the second sub-grid selection cycle is used to carry out write operation.
Notice that erase operation is to make the not radiative operation of light-emitting component, and in period of sub-frame, only just carry out where necessary.
Sequential chart when description being provided AC drive cycle RFB below (referring to Figure 12 C and 12D).AC drive cycle FRB comprises TaRB write cycle that wherein only carries out erase operation, apply the cycle with reverse biased, apply in the cycle in reverse biased reverse by the potential level that will flow to light-emitting component, thereby side by side reverse biased is imposed on whole light-emitting components.Notice that unnecessary each frame period all provides AC drive cycle FRB, can every several frame periods provide AC drive cycle FRB.In addition, not needing provides AC drive cycle FRB independently from period of sub-frame SF1 to SF3, can provide in the light period Ts1 to Ts3 of a certain period of sub-frame.
In addition, the order of period of sub-frame be not limited to period of sub-frame recited above from high-order position to the low-order bit series arrangement, it can random alignment.In addition, for each frame period, the order of period of sub-frame can be at random.In addition, the one or more cycles that are selected from period of sub-frame can be divided into a plurality of cycles.In this case, in in one or more divided period of sub-frame each and the one or more not divided period of sub-frame each includes a plurality of write cycle of Ta1, Ta2, ..., one and a plurality of light period Ts1 among the Tam (m is a natural number), Ts2 ..., among the Tsm one.
Now, the sequential chart that the period of sub-frame of high-order position is divided into a plurality of cycles will be described, and the order of period of sub-frame is at random (referring to Figure 13).When this sequential chart represents that period of sub-frame SF1 is divided into three (representing with SF1-1 to SF1-3), period of sub-frame SF2 and is divided into two (representing with SF2-1 and SF2-2) and period of sub-frame SF3 and is divided into two (representing with SF3-1 and SF3-2), show the situation of 6 bit gradation levels.It also represents display timing generator, the display timing generator of last column pixel, the scanning sequence of erase gate driver and the scanning sequence that writes gate driver of the first row pixel.Note, shown in the demonstration duty ratio of sequential chart be 51%.This embodiment can freely combine enforcement with above-mentioned embodiment.
[embodiment 7]
The pattern of display device of the present invention when describing power lead Vx and shared by neighbor now with reference to Figure 14 A and 14B.Notice that this display device comprises a plurality of pixels 10, as mentioned above, each pixel comprises light-emitting component 13, capacitor 16 and TFT 11 and 12.When power lead Vx was shared by neighbor, the arrangement of neighbor was horizontally rotated.When power lead Vx was shared by neighbor, necessary wiring quantity can reduce, and this causes high aperture ratio.When obtain high aperture than the time, along with the increase of light-emitting area, the brightness of light-emitting component reduces, this helps power consumption to reduce.That is, driving voltage can be reduced so that reduce power consumption.
In the situation that adopts said structure, wish to adopt the light-emitting component that demonstrates monochromatic light or white light.Provide optical filter or color conversion layer on the side by launching, can carry out colour and show at light.When sharing power lead in this way, compare with selectively that electroluminescence layer is painted situation, when adopting the structure that obtains monochromatic light or white light, electrical source voltage is easy to compensation to be reduced.This embodiment can freely combine enforcement with above-mentioned embodiment.
[embodiment 8]
Display device of the present invention can be equipped with polaroid, wave plate or circular polarizing disk, so that enhancing contrast ratio.Each light-emitting component that is comprised in the display device of the present invention all has pair of electrodes, and is inserted in the electroluminescence layer between them.In carrying out the colored situation that shows, need in each pixel, form electroluminescence layer with different emission spectrum, form usually in this case respectively and red (R), green (G) and indigo plant (B) corresponding electroluminescence layer.In this case, by be provided for seeing through the optical filter (dyed layer) of the light in the luminescent spectrum in a side, can improve excitation and prevent direct reflection (dazzle) from light-emitting component emission bright dipping.In addition, when this optical filter is provided, can omit the conventional circular polarizing disk that needs, this can remedy the loss of the light of launching from electroluminescence layer.The change of the tone of seeing in the time of in addition, can reducing to tilt viewing display area.In addition, electroluminescence layer can have a kind of structure that demonstrates monochromatic light or white light.When adopting white light emitting material,, can carry out colour and show by on the radiative side of light-emitting component, being provided for seeing through the optical filter of the light in the specific emission spectrum.
Electroluminescence layer obtains photoemissive material (below be called the singlet excitation material) by exciting by singlet, is perhaps excited by three-state to obtain photoemissive material (below be called ternary excitation material) and form.For example, at the light-emitting component that is used for red emission, green emission and blue emission, the light-emitting component that is used for red emission (its brightness half life period (brightness decay is to the time of its initial value half level) is shorter relatively) is formed by ternary excitation material, and other light-emitting components are formed by the singlet excitation material.Ternary excitation material has high-luminous-efficiency, even if its advantage is also to need lower power consumption in order to obtain same brightness.Replacedly, the light-emitting component that is used for red emission and green emission can be formed by ternary excitation light-emitting material, and the light-emitting component that is used for blue emission can be formed by the singlet excitation material.Use ternary excitation material form the human eye height visual be used for the light-emitting component of green emission the time, even can realize lower power consumption.As an example of ternary excitation material, there is a kind of material that uses metal complex as alloy, it comprises the platinum of thinking the 3rd transition element metal complex as central atom, and with the metal complex as central atom such as iridium.
Light-emitting component can have the forward stepped construction, and wherein anode, electroluminescence layer and negative electrode are with this sequential cascade; Perhaps can have the reverse stack structure, wherein negative electrode, electroluminescence layer and anode are with this sequential cascade.The electrode of wishing light-emitting component is formed by ITO (tin indium oxide) or ITSO (mixing silicon ITO), IZO or GZO.This embodiment can be implemented with above-mentioned embodiment independent assortment.
[embodiment 9]
Panel with describing as a kind of form of light-emitting device of the present invention wherein is equipped with pixel region 40, first grid driver 41, second gate driver 42 and Source drive 43.On substrate 405, form the pixel region 40 that comprises a plurality of pixels, first grid driver 41, second gate driver 42, Source drive 43 and junctional membrane 407, wherein each pixel has light-emitting component 13 (referring to Figure 15 A).Junctional membrane 407 links to each other with external circuit (IC chip).
Figure 15 B is the cross-sectional view of the panel of A-A ' along the line among Figure 15 A, expresses the TFT 12 and the light-emitting component 13 that are provided in the pixel region 40, and is provided in the cmos circuit 410 in the Source drive 43.Around pixel region 40, first grid driver 41, second gate driver 42 and Source drive 43, provide sealant 408, and come sealed light emitting element 13 with relative substrate 406 with sealant 408.Carry out this sealing technology,, and use cladding material (glass, pottery, plastics, metal etc.) to seal this place so that protection light-emitting component 13 is not subjected to the influence of moisture.Replacedly, can adopt additive method to utilize thermoset resin, UV-cured resin, perhaps use film (as metal oxide film and nitride film) to seal with high barrier.The element that is formed on the substrate 405 preferably has excellent properties the crystalline state semiconductor (polysilicon) of (as mobility) forms by comparing with amorphous semiconductor, and it can be integrated on the identical surface by monolithic.According to panel with said structure, can reduce the quantity of the exterior I C that connected, so just can reduce size, weight reduction and make profile thinner.
Note, in said structure, the pixel electrode printing opacity of light-emitting component 13, and the counter electrode shading of light-emitting component 13.Thereby light-emitting component 13 is to bottom side emission light.Replacedly, except that said structure, can adopt another kind of structure, the wherein pixel electrode shading of light-emitting component 13, and the counter electrode printing opacity of light-emitting component 13 (referring to Figure 16 A).In this case, light-emitting component 13 is towards top side emission light.
In addition, except that said structure, can adopt another kind of structure, wherein the pixel electrode of light-emitting component 13 and counter electrode printing opacity (referring to Figure 16 B) all.In this case, light-emitting component 13 is towards both sides emission light.
Display device of the present invention can adopt any in bottom emission, top-emission or the two-way emitting structural.Under the situation that adopts bottom emission or two-way emitting structural, the conductive layer (source/drain electrode wiring) that is connected with the extrinsic region that is comprised among the TFT 12 is constituting by aluminium (Al) and antiradar reflectivity material such as molybdenum (Mo) preferably.Particularly, preferably adopt the rhythmo structure of molybdenum (Mo), aluminium-silicon (Al-Si) and molybdenum (Mo), the rhythmo structure of molybdenum nitride (MoN), aluminium-silicon (Al-Si) and molybdenum nitride (MoN) etc.Thereby, can prevent that the light that light-emitting component is launched from reflecting on source/drain electrode wiring.Therefore, light can be extracted the outside.
Notice that pixel region 40 is made of TFT, the channel part of TFT is formed by the amorphous semiconductor (amorphous silicon) that is formed on the insulating surface, and first grid driver 41, second gate driver 42 and Source drive 43 are formed by the IC chip.The IC chip bonds on the substrate 405 by COG, perhaps is attached to the junctional membrane 407 that is used to connect substrate 405.Be easy on big substrate, form amorphous semiconductor by CVD, do not need crystallisation step.Therefore, can provide cheap panel.In addition, when by with the ink-jet being the droplet charging method of representative when forming conductive layer, even can provide more cheap panel.This embodiment can be implemented with above-mentioned embodiment independent assortment.
[embodiment 10]
The display device that comprises the pixel region with light-emitting component can be applied in the electronic equipment, as televisor (TV or television receiver), digital camera, digital camera, pocket telephone (mobile phone), portable data assistance (for example PDA), portable game machine, monitor, computing machine, playback set (for example automobile stereophonic sound system) and be equipped with the image-reproducing means (as home game machine) of recording medium.Figure 17 A to 17F represents the object lesson of this equipment.
The portable data assistance of the use display device of the present invention shown in Figure 17 A comprises main body 9201, display part 9202 etc., can realize low-power consumption by the present invention.The digital camera of the use display device of the present invention shown in Figure 17 B comprises display part 9701 and 9702 etc., can realize low-power consumption by the present invention.The portable data assistance of the use display device of the present invention shown in Figure 17 C comprises main body 9101, display part 9102 etc., can realize low-power consumption by the present invention.The portable television of the use display device of the present invention shown in Figure 179 comprises main body 9301, display part 9302 etc., can realize low-power consumption by the present invention.The portable computer of the use display device of the present invention shown in Figure 17 E comprises main body 9401, display part 9402 etc., can realize low-power consumption by the present invention.The televisor of the use display device of the present invention shown in Figure 17 F comprises main body 9501, display part 9502 etc., can realize low-power consumption by the present invention.In the electronic equipment that lists,, can guarantee that those use the electronic equipment of battery to have the longer working time, so just can save the battery charge time in the above by reducing amount of power consumption.
[embodiment 1]
Figure 20 represents to be used for an object lesson of the circuit of the compensation temperature characteristic and the characteristics of luminescence.It comprises display board 2020 and power supply 2000.Power supply 2000 is equivalent to the control circuit 65 of the display device shown in Fig. 4 of embodiment 1.Display board comprises pixel portion 2021, monitoring element 2027 and first supply terminals 2026.Pixel portion 2021 comprises switching TFT 2022, holding capacitor 2023, drive TFT 2024 and light-emitting component 2025.So that when light-emitting component 2025 is linked to each other with second source terminals 2028, light-emitting component 2025 is luminous when drive TFT 2024 conductings.
The I-E characteristic of light-emitting component 2025 becomes with temperature.When applying constant voltage, at high temperature obtain high brightness, obtain low-light level at low temperatures.For this is compensated, steady current flows to monitoring element 2027 from constant current source 2011, and the voltage that is wherein produced imposes on second source terminals 2028 by transistor 2013.When monitoring element 2027 and light-emitting component 2025 were made of same material, this temperature characterisitic no longer existed, thereby keeps constant with respect to temperature brightness.
Power supply 2000 is a kind of switching regulator, and it comprises first comparer 2001, second comparer 2002, pierce circuit 2004, smmothing capacitor 2005, diode 2006, switching transistor 2008, inductor 2009, reference power source 2003,2007 and 2014 and attenuator 2010.Reference power source 2007 is a kind of power supplys with high current capacity, as battery.
The structure of switching regulator is not limited to top described, can adopt other structures.In addition, the switching transistor that Figure 20 represents is the NPN bipolar transistor, but, the invention is not restricted to this.
In second comparer 2002, the output signal of the output signal of pierce circuit 2004, reference power source 2003 and first comparer 2001 compares mutually, and the output signal of second comparer 2002 is with switching transistor 2008 conduction and cut-off.When switching transistor 2008 conductings, electric current flows in the inductor 2009, thereby magnetic energy is stored in the inductor 2009.When switching transistor 2008 ended, magnetic energy was converted into voltage, thereby made smmothing capacitor 2005 by diode 2006 chargings.The dc voltage that produces in the smmothing capacitor changes with the conduction and cut-off state of switching transistor 2008.
The dc voltage of smmothing capacitor 2005 is attenuated in attenuator 2010, imports first comparer 2001 then.First comparer 2001 compares the voltage of reference power source 2014 and attenuator 2010, and its output is transfused to second comparer 2002.Thus, carry out feedback operation, and in smmothing capacitor 2005, produce essential voltage.Herein, constant current source 2011, amplifier 2012 and monitoring element 2027 directly are connected, and but, can insert other elements between them, as resistor and switch.
[embodiment 2]
In the embodiment shown in Figure 20, the voltage of smmothing capacitor 2005 has temperature independent steady state value, and but, light-emitting component has temperature characterisitic.Usually, the voltage of occurs at low temperatures optical element is higher, and at high temperature the voltage of light-emitting component is lower.Figure 21 A represents this phenomenon.At high temperature, exist than big difference between light-emitting component voltage and the smmothing capacitor voltage (representing with switching regulator in Figure 21 A and 21B), this causes power wastage.If as shown in Figure 21 B, at high temperature, switching regulator voltage reduces with light-emitting component voltage, then can reduce the power consumption of waste.
Figure 22 is an embodiment in order to address this problem of invention.With monitoring element voltage input switch formula voltage stabilizer, thereby make switching regulator voltage and light-emitting component voltage cooperating.
Figure 22 represents to be used for an object lesson of the circuit of the compensation temperature characteristic and the characteristics of luminescence.It comprises display board 2220 and power supply 2200.Power supply 2200 is equivalent to the control circuit 65 of the display device shown in Fig. 4 of embodiment 1.Display board comprises pixel portion 2221, monitoring element 2227 and first supply terminals 2226.Pixel portion 2221 comprises switching TFT 2222, holding capacitor 2223, drive TFT 2224 and light-emitting component 2225.When being connected with second source terminals 2228 when drive TFT 2224 conductings so that with light-emitting component 2225, light-emitting component 2225 emission light.
The I-E characteristic of light-emitting component 2225 becomes with temperature.When applying constant voltage, at high temperature obtain high brightness, obtain low-light level at low temperatures.For this is compensated, to monitoring element 2227 delivered constant electric currents, and the voltage that will wherein produce imposes on second source terminals 2228 by amplifier 2212 and transistor 2213 from constant current source 2211.When monitoring element 2227 and light-emitting component 2225 are formed by same material, eliminated temperature characterisitic, thereby kept constant luminance with respect to temperature.
Power supply 2200 is switching regulator, and it comprises first comparer 2201, second comparer 2202, pierce circuit 2204, smmothing capacitor 2205, diode 2206, switching transistor 2208, inductor 2209, reference power source 2203 and 2207 and attenuator 2210.Reference power source 2207 is the power supplys with high current capacity, as battery.
The structure of switching regulator is not limited to the above, can adopt other structures.In addition, the switching transistor that Figure 22 represents is the NPN bipolar transistor, but, the invention is not restricted to this.
In second comparer 2202, the output signal of the output signal of pierce circuit 2204, reference power source 2203 and first comparer 2201 compares mutually, and the output signal of second comparer 2202 is with switching transistor 2208 conduction and cut-off.When switching transistor 2208 conductings, electric current flows into inductor 2209, thereby magnetic energy stores in the inductor 2209.When switching transistor 2208 ended, magnetic energy was converted into voltage, thereby made smmothing capacitor 2205 by diode 2206 chargings.The dc voltage that produces in the smmothing capacitor becomes with the conduction and cut-off state of switching transistor 2208.
The voltage of monitoring element 2227 is by amplifier 2214 and attenuator 2215 inputs first comparer 2201.The dc voltage of smmothing capacitor 2205 is attenuated in attenuator 2210, imports first comparer 2201 then.First comparer 2201 compares the voltage of attenuator 2215 and the voltage of attenuator 2210, and its output is input to second comparer 2202.Thus, carry out feedback operation, and produce necessary voltage in the smmothing capacitor 2205.Herein, constant current source 2211, amplifier 2212 with 2214 and monitoring element 2227 directly be connected, but, can insert other elements between them, as resistor and switch.
[embodiment 3]
The output of switching regulator directly is connected with the second source terminals of display board among the embodiment of Figure 23.The voltage input switch formula voltage stabilizer of monitoring element, thus make the voltage of switching regulator and the voltage cooperating of light-emitting component.
Figure 23 represents to be used for an object lesson of the circuit of compensation temperature characteristic and light characteristic.It comprises display board 2320 and power supply 2300.Power supply 2300 is equivalent to the control circuit 65 of the display device shown in Fig. 4 of embodiment 1.Display board comprises pixel portion 2321, monitoring element 2327 and first supply terminals 2326.Pixel portion 2321 comprises switching TFT 2322, holding capacitor 2323, drive TFT 2324 and light-emitting component 2325.So that when connecting light-emitting component 2325 with second source terminals 2328, light-emitting component 2325 is luminous when drive TFT 2324 conductings.
The I-E characteristic of light-emitting component 2325 becomes with temperature.In applying the situation of constant voltage, high temperature obtains high brightness down, and low temperature obtains low-light level down.For this is compensated, to monitoring element 2327 delivered constant electric currents, and the switching regulator voltage that will wherein produce imposes on second source terminals 2328 from constant current source 2311.When monitoring element 2327 and light-emitting component 2325 are formed by identical materials, eliminated temperature characterisitic, thereby kept constant with respect to temperature brightness.Compensating circuit among this embodiment has lower stability, and but, its advantage is to reduce amplifier and transistorized quantity.
Power supply 2300 is a switching regulator, and it comprises first comparer 2301, second comparer 2302, pierce circuit 2304, smmothing capacitor 2305, diode 2306, switching transistor 2308, inductor 2309, reference power source 2303 and 2307 and attenuator 2310.Reference power source 2307 is the power supplys with high current capacity, as battery.In second comparer 2302, the output signal of the output signal of pierce circuit 2304, reference power source 2303 and first comparer 2301 compares mutually, and the output signal of second comparer 2302 is with switching transistor 2308 conduction and cut-off.When switching transistor 2308 conductings, electric current flows in the inductor 2309, thereby magnetic energy stores in the inductor 2309.When switching transistor 2308 ended, magnetic energy was converted into voltage, thereby made smmothing capacitor 2305 by diode 2306 chargings.The dc voltage that produces in the smmothing capacitor becomes along with the conduction and cut-off state of switching transistor 2308.
The voltage of monitoring element 2327 is by amplifier 2314 and attenuator 2315 inputs first comparer 2301.In attenuator 2310, the dc voltage of smmothing capacitor 2305 is decayed, and imports first comparer 2301 then.First comparer 2301 compares the voltage of attenuator 2315 and the voltage of attenuator 2310, and its output is transfused to second comparer 2302.Thus, carry out feedback operation, and in smmothing capacitor 2305, produce necessary voltage.Herein, constant current source 2311, amplifier 2314 and monitoring element 2327 directly are connected, and but, can insert other elements between them, as resistor and switch.
[embodiment 4]
Figure 24 represents wherein to provide the embodiment of a plurality of monitoring elements.The voltage of a plurality of monitoring elements is transfused to switching regulator, thereby the voltage of switching regulator is worked with the voltage of light-emitting component.
Figure 24 is an object lesson that is used for the circuit of compensation temperature characteristic and light characteristic.It comprises display board 2420 and power supply 2400.Power supply 2400 is equivalent to the control circuit 65 of display device shown in Fig. 4 of embodiment 1.Display board comprises pixel portion 2421, monitoring element 2427, monitoring element 2429 and first supply terminals 2426.Pixel portion 2421 comprises switching TFT 2422, holding capacitor 2423, drive TFT 2424 and light-emitting component 2425.When drive TFT 2424 conductings so that when connecting light-emitting component 2425 with second source terminals 2428, light-emitting component 2425 emission light.
The I-E characteristic of light-emitting component 2425 becomes with temperature.In applying the situation of constant voltage, high temperature obtains high brightness down, and low temperature obtains low-light level down.For this is compensated, from constant current source 2411 and constant current source 2427 steady current is flowed to monitoring element 2427 and monitoring element 2429 respectively, and the voltage that will wherein be produced imposes on second source terminals 2428 by amplifier 2412 and transistor 2413.When monitoring element 2427, monitoring element 2429 and light-emitting component 2425 are formed by same material, eliminated temperature characterisitic, thereby can keep brightness constancy with respect to temperature.When two monitoring elements be arranged on the both sides of pixel portion and after average by adder circuit 2416 with amplifier 2412 when 2414 link to each other, can monitor more accurately.In addition, according to the present invention, can further increase the quantity of monitoring element.When the quantity of monitoring element increases, can reduce the difference between monitoring element and the light-emitting component.
Power supply 2400 is a kind of switching regulator, and it comprises first comparer 2401, second comparer 2402, pierce circuit 2404, smmothing capacitor 2405, diode 2406, switching transistor 2408, inductor 2409, reference power source 2403 and 2407 and attenuator 2410.Reference power source 2407 is a kind of power supplys with high current capacity, as battery.In second comparer 2402, the output signal of the output signal of pierce circuit 2404, reference power source 2403 and first comparer 2401 compares mutually, and the output signal of second comparer 2402 makes switching transistor 2408 conduction and cut-off.When switching transistor 2408 conductings, electric current flows in the inductor 2409, thereby magnetic energy stores in the inductor 2409.When switching transistor 2408 ended, magnetic energy was converted into voltage, thereby by 2405 chargings of 2406 pairs of smmothing capacitors of diode.The dc voltage that is produced in the smmothing capacitor becomes with the conduction and cut-off state of switching transistor 2408.
The voltage of monitoring element 2427 and monitoring element 2429 is by adder circuit 2416, amplifier 2414 and attenuator 2415 inputs first comparer 2401.The dc voltage of smmothing capacitor 2405 is attenuated in attenuator 2410, imports first comparer 2401 then.First comparer 2401 compares the voltage of attenuator 2415 and the voltage of attenuator 2410, and its output is transfused to second comparer 2402.
Thus, carry out feedback operation, and in smmothing capacitor 2405, produce essential voltage.Herein, constant current source 2411, constant current source 2417, amplifier 2412, monitoring element 2427 and monitoring element 2429 directly are connected, and but, can insert other elements between them, as resistor and switch.
[embodiment 5]
In embodiment 1 to 4, first supply terminals and the second source terminals of display board are fixed, and but, can insert the switch that is used for regularly switching the voltage that imposes on these terminals, thus alternately driven light-emitting element and monitoring element.
In embodiment 1 to 4, described temperature compensation, but, can also utilize the similar degradation of monitoring element and light-emitting component, the degradation of light-emitting component has been compensated.
[embodiment 6]
The invention is not restricted to the row order shown in Fig. 4 and drive the Source drive 43 of operation, and can be applicable to the Source drive that dot sequency drives operation.Therefore, with reference to Figure 25 a kind of exemplary source driver that the dot sequency that is applicable to display device of the present invention drives operation is described in the present embodiment.Note, represent the part identical with Source drive 43 among Fig. 4 with identical Reference numeral.
Source drive 2501 among Figure 25 comprises impulse output circuit 44, switches set 2503 and selects circuit 46.Switches set comprises the switch 2502 corresponding with every row pixel.Select circuit 46 also to comprise phase inverter 51, analog switch 50 and the TFT 49 corresponding with every row pixel.The terminal of TFT 49 links to each other with power supply 53.Impulse output circuit 44 can be for example shift register.
To the method for operating of Source drive 2501 be described briefly.
When Source drive 2501 is carried out write operation, the WE signal of transport of H level, and make analog switch 50 conductings.At this moment, the TFT 49 that is used to transmit erase signal is cut off.Sequentially select to be written into the switch that lists 2502 of DATA signal by impulse output circuit 44, thereby the DATA signal is write pixel.
When Source drive 2501 is carried out erase operation, carry the WE signal of L level, analog switch 50 ends, and erasing TFT 49 conductings.A terminal of erasing TFT 49 links to each other with power supply 53, thereby the electromotive force of power supply 53 can be set in the electromotive force of signal wire, therefore, can set the gate potential of the TFT that is used to drive pixel.That is, be used to drive between the grid of TFT of pixel and the source electrode and no longer have electric potential difference, therefore can discharge the electric charge that is accumulated in the holding capacitor that is used for storing gate source voltage.The TFT that is used for driving pixel is corresponding with the TFT 12 of Fig. 4, and signal wire is corresponding with S1 to Sm, and holding capacitor is corresponding with capacitor 16.The source electromotive force of TFT 12 is the electromotive force of power lead Vx.That is, the electromotive force of hope power supply 53 is set to equate with the electromotive force of power lead Vx.Thus, can wipe the signal that writes by Source drive.
[embodiment 7]
The another kind of structure of the selection circuit 46 that is comprised in the Source drive 43 is described with reference to Figure 26 in the present embodiment.In the structure of present embodiment, used analog switch 50 in the selection circuit 46 of the Source drive 43 shown in use timing phase inverter 2603 replacement Fig. 4.Note, with identical Reference numeral represent with Fig. 4 in identical part in the Source drive 43.
Source drive 2601 shown in the present embodiment comprises impulse output circuit 44, first latch 47, second latch 48 and selects circuit 2602.Select circuit 2602 to comprise phase inverter 51, timing phase inverter 2603 and TFT 49.The terminal of TFT 49 links to each other with power supply 53.
The concise and to the point method of operating of selecting circuit 2602 of describing.
When Source drive 2601 is carried out write operation, the WE signal of transport of H level, thus the signal of incoming timing phase inverter 2603 can be output.At this moment, the TFT49 that is used to transmit erase signal is cut off.Thus, the signal from second latch 48 can be write pixel.
When Source drive is carried out erase operation, carry the WE signal of L level, thereby the signal of incoming timing phase inverter 2603 is not output.In addition, TFT 49 conductings.Thus, signal wire S1 to Sm can be set in the electromotive force of power supply 53, and can wipe the signal that writes in the pixel.
Notice that the selection circuit 2602 shown in the present embodiment can be applied to Source drive shown in Figure 25 among the embodiment 6 2501.
[embodiment 8]
When carrying data-signal, the utilogic door is represented each circuit.In the present embodiment, with reference to Figure 27 an example selecting circuit 46 in the Source drive of representing with logic gates 43 is described wherein.Note, with identical Reference numeral represent with Fig. 4 in the identical part of part in the Source drive 43.
Source drive 2701 comprises impulse output circuit 44, first latch 47, second latch 48 and selects circuit 2702.Select circuit 2702 to comprise NOR (or non-) door 2704 and phase inverter 2705.Notice that a terminal input of the NOR door 2704 in every column select circuit 2702 is through the anti-phase WE signal of phase inverter 2703.When Source drive is carried out write operation, the WE signal of transport of H level.Then, this signal is anti-phase via phase inverter 2703, thereby the signal of L level is transfused to one of them input end of NOR door 2704 in every row.To the signal of its another input end input from second latch 48 of every row.When from second latch, 48 transport of H level signals, the NOR door is output as the L level, and after this this signal is anti-phase by phase inverter 2705, thereby exports the H level signal to the source line.Therefore, be the H level by the gate potential of TFT 12 in the selected pixel of grid line, thereby make TFT 12 conductings.When from second latch, 48 conveying L level signals, NOR door 2704 is output as the H level, and after this this signal is anti-phase by phase inverter 2705, thereby exports the L level signal to the source line.Therefore, the gate potential of the TFT 12 in the pixel of being selected by grid line is the L level, thereby TFT 12 is ended.These electromotive forces accumulate in capacitor 16.Thus, signal can be write in the pixel.
In erase operation, carry the WE signal of L level.Then, this signal is anti-phase by phase inverter 2703, thereby the H level signal is transfused to one of them input end of NOR door 2704 in every row.Then, no matter from the signal (that is, the input signal of another input end of NOR door) of second latch 48 how, the output of NOR door all is the L level, and after this, this signal is anti-phase via phase inverter 2705, thereby exports the H level signal to the source line.Gate potential by TFT 12 in the selected pixel of grid line is the H level, thereby makes capacitor 16 discharges, and TFT 12 is ended.Thus, can wipe the signal that writes in the pixel.
Notice that the selection circuit 2702 shown in the present embodiment can be applied to the Source drive 2501 shown in Figure 25 of embodiment 6.
[embodiment 9]
In the present embodiment, describe such example with reference to Figure 28, wherein the three-state buffer 87 of the selection circuit 55 that is comprised in the first grid driver 41 shown in Fig. 4 has different structures with holding circuit 88.When the three-state buffer 87 shown in Fig. 9 was used to prevent that one of them makes grid line Gy charge or discharge when first grid driver 41 and second gate driver 42, operation was subjected to the interference of the output of other drivers.Therefore, as long as three-state buffer 87 has above-mentioned functions, just can be the enable circuits (enable circuit) 2801 of use analog switch 2803 as shown in Figure 28.Holding circuit 2802 comprises rectifier 2805 and 2806.
Enable circuits 2801 comprises analog switch 2803 and phase inverter 2804.By the P2 signal with analog switch 2803 conduction and cut-off, thereby the P1 signal is sent to grid line.That is to say, when preventing that one of them makes grid line Gy charge or discharge when first grid driver 41 and second gate driver 42, operation is subjected to the interference of output of another driver, and wherein the P2 signal of the enable circuits 2801 of each is inverting each other to require the input first grid driver 41 and second gate driver 42.
First grid driver 41 comprises first holding circuit (being equivalent to the resistor 72 among the figure) that is connected with the input node of impulse output circuit 54 and is provided at second holding circuit 2802 of the subordinate of selecting circuit 46.According to this structure, can suppress the degradation or the damage of the element that causes by static.More specifically, the clock signal or the data-signal that are input to the input node might have noise, and this can produce instantaneous high voltage or the low-voltage that imposes on element.But, according to the present invention with holding circuit, but degradation takes place or damages in straining element.
Notice that holding circuit not only uses resistor and transistor to constitute, but also is made of the one or more elements that are selected from resistor, capacitor and rectifier.Rectifier is a kind of grid and source electrode transistor connected to one another, or diode.In the present embodiment, rectifier 2805 and 2806 is applied to holding circuit 2802, but, can adopt the one or more elements that are selected from resistor, capacitor and rectifier.Notice that rectifier can be PN junction diode, PIN junction diode, Shottoky diode and the like except that the transistor that connects into diode.
The operation of holding circuit will be described now.The operation of the holding circuit 2802 that is comprised in the first grid driver 41 is described herein.
At first, when because the influence of noise etc., during from the higher signal of the output node delivery ratio vdd voltage of enable circuits 2801, apply forward bias to rectifier 2806, and the electric charge that is stored in the enable circuits 2801 is released to power lead, be used to transmit VDD, thereby make the electromotive force of grid line Gx become VDD or VDD+a.
On the other hand, when from the lower signal of the output node delivery ratio VSS voltage of enable circuits 2801, forward bias is imposed on rectifier 2805, thereby make the electromotive force of grid line Gx become VSS or VSS-a.
Thus, even when because the influence of noise etc., the voltage of carrying from the output node of enable circuits 2801 is instantaneous to become when being higher than VDD or being lower than VSS, and the voltage that flows to grid line Gx can not become yet and be higher than VDD or be lower than VSS.Therefore, can suppress inefficacy, degradation or the damage of the element that caused by noise, static etc.
[embodiment 10]
In the present embodiment, describe such example with reference to Figure 28, wherein the three-state buffer 87 of the selection circuit 55 that is comprised in the first grid driver 41 shown in Fig. 4 has different structures with holding circuit 88.When the three-state buffer 87 shown in Fig. 9 was used to prevent that one of them makes grid line Gy charge or discharge when first grid driver 41 and second gate driver 42, operation was subjected to the interference of the output of another driver.Therefore, as long as three-state buffer 87 has above-mentioned functions, just can be the enable circuits 2901 of use timing phase inverter 2902 as shown in Figure 29.Holding circuit 2802 comprises rectifier 2805 and 2806.Notice that this structure adopts regularly that phase inverter replaces the analog switch that is comprised in enable circuits 2801, and its method of operating owing to embodiment 9 in enable circuits 2801 and holding circuit 2802 similar being omitted shown in Figure 28.
[embodiment 11]
In the present embodiment, the selection signal wire 52 shown in Fig. 4 etc. is described.The WE signal is by selecting signal wire 52 input gate driver or Source drives.At this moment, must consider the actual input time of signal input pixel.
In other words, must consider that grid line selects the time be cancelled and be sent to the vision signal of pixel or the time that erase signal changes from the source line.For example, if before selected grid line is cancelled, vision signal or erase signal change, and then the signal of Gai Bianing is transfused to pixel.Therefore, it is essential will importing that the vision signal of pixel or erase signal remain unchanged till selected grid line is cancelled.After selected grid line was cancelled, vision signal or erase signal can change.
Then, as shown in Figure 30, before WE signal input sources driver 43, can provide delay circuit 3000.The WE signal can directly be imported gate driver.As a result, when the WE signal change, WE signal input sources driver has a delay that is produced by this delay circuit.Therefore, compare the time delay that vision signal or erase signal can be changed with the time that selected grid line is cancelled.As a result, accurate signal can be imported pixel.Notice that Figure 30 is a synoptic diagram, wherein represents with identical Reference numeral with part identical shown in Fig. 4.
Figure 31 represents an example of delay circuit.Basically, input signal can be exported after being delayed.Figure 31 is for adopting an example of flop-over circuit.Flop-over circuit 3101 shown in Figure 31 comprises regularly phase inverter 3102, timing phase inverter 3103 and phase inverter 3104, its so-called delay flop-over circuit (DFF).Constitute DFF timing phase inverter 3102 and 3103 and the input of clock signal synchronously operate.Therefore, when the one-level with DFF was made as delay circuit, signal had been delayed the half period of the clock signal that flows to DFF.
Figure 34 is a sequential chart.Obviously, compare with the input signal (WE) of DFF 3101, the output signal of DFF3101 (WE ') has been delayed the half period of clock signal.
Herein, the clock signal of the DFF 3103 of input delay circuit can be any signal.But, if in the middle of the signal of importing for other purposes, have available signal, then can effectively utilize this signal and be used for clock signal.Therefore, wish to adopt the clock signal of input source driver.
In the situation of Figure 31, signal has been delayed the half period of the clock signal of input DFF 3103.If desired signal delay is got more words, then can as shown in Figure 32 a plurality of DFF 3101 be connected in series.By the progression of control DFF 3101, can determine time delay arbitrarily.In Figure 32, three grades of DFF are connected in series.Therefore, the sequential chart from Figure 35 is compared with the input signal of DFF (WE signal) obviously as can be seen, and the output signal of DFF (WE " signal) is delayed three times of length of the half period of clock signal.
Notice that the structure of DFF is adopted in Figure 31 and 32 expressions, but, the invention is not restricted to this.Can use any other circuit with the structure that is applicable to shift register.
Replacedly, can not utilize and synchronization of clock signals, but utilize by the time delay that continuous propagation produced, with signal delay from the signal of a plurality of circuit.Figure 33 represents a kind of structure of this situation.Herein, by connecting multistage phase inverter 3301 with signal delay.When needed, can provide NAND (Sheffer stroke gate) 3302, with the signal before and after the receive delay, so that the pulse width of compressed signal.Inversion signal in phase inverter 3303 once more by anti-phase.
[embodiment 12]
Display device shown in Fig. 4 has a kind of like this structure, and wherein the first grid driver 41 and second gate driver 42 are arranged on the opposite side of pixel region 40.On the other hand, Figure 36 represent a kind of with have display device like the class of operation of the display device of structure among Fig. 4, but have the structure that one of them gate driver is arranged on a side.Notice that the part identical with the display device shown in Fig. 4 represented with identical Reference numeral.
Source drive 43 comprises impulse output circuit 44, latch 45 and selects circuit 46.Latch 45 comprises first latch 47 and second latch 48.Select circuit 46 to comprise TFT 49 and analog switch 50.TFT 49 and analog switch 50 are provided in each row corresponding with source line Sx.Phase inverter 51 produces the inversion signal of WE (write/erase) signal, and when carrying the inversion signal of WE signal by the outside, needn't provide phase inverter 51.
The grid of TFT 49 is connected with selecting signal wire 52, and one of them is connected its source electrode and drain electrode with source line Sx, and another is connected with power supply 53.Analog switch 50 is provided between second latch 48 and the source line Sx.That is, the input node of analog switch 50 links to each other with second latch 48, and its output node is connected with source line Sx.In two Control Node of analog switch 50 one is connected with selecting signal wire 52, and another is connected with selection signal wire 52 by phase inverter 51.The electromotive force of power supply 53 has the level that the TFT 12 that comprised in pixel of making 10 ends.When TFT 12 is the N-channel TFT, the electromotive force of power supply 53 is made as the L level, and on the other hand, when TFT 12 is the P-channel TFT, the electromotive force of power supply 53 is made as the H level.
Gate driver 3601 comprises first impulse output circuit 3603, second impulse output circuit 3602 and selects circuit 3604.Select circuit 3604 to comprise NAND door 3606 and 3607, phase inverter 3608,3609 and 3611 and the NOR door 3610 corresponding with each row.Select signal wire 52 to be divided into branch road, one of them branch (selecting signal wire 52a) is connected with a terminal of NAND door 3606.Another terminal of NAND door 3606 is connected with first impulse output circuit 3603.Another branch of the selection signal wire 52 of branch (selecting signal wire 52b) is connected with a terminal of NAND door 3607.Another terminal of NAND door 3607 is connected with second impulse output circuit 3602.The output terminal of NAND door 3606 is connected with the input end of phase inverter 3608, and the output terminal of NAND door 3607 is connected with the input end of phase inverter 3609.Phase inverter 3608 is connected with the input end of NOR door 3610 respectively with 3609 output terminal, and the output terminal of NOR door 3610 is connected with the input end of phase inverter 3611.That is, from the signal of selecting signal wire 52a input selection circuit 3604 with inverting each other from the signal of selecting signal wire 52b input selection circuit 3604.
The method of operating of the gate driver of present embodiment is described now.
When the input end of NAND door 3606 and NAND door 3607 was the H level, the H level signal was transfused to grid line Gx.
When signal is write pixel, the WE signal of input H level.Next, the H level signal is from selecting a terminal of signal wire 52a input NAND door 3606.Therefore, the H level signal of first impulse output circuit 3603 output that is connected from another terminal with NAND door 3606 grid line extremely capable, corresponding to the selected pixel column that is used for write signal.That is, the transistor 11 that is used for write signal in this row pixel is switched on.When the WE of transport of H level signal, select the analog switch conducting in the circuit 46, thereby the signal from second latch 48 is output to signal wire Sx.Therefore, electric charge accumulates at the capacitor 16 of the gate potential of the TFT 12 that is used for the storing driver pixel, thereby signal can be write pixel.
Be used for wiping in the erase operation of pixel institute write signal, carrying the WE signal of L level.Then, the H level signal is from selecting the terminal of signal wire 52b by phase inverter 3605 input NAND doors 3607.Therefore, the H level signal of second impulse output circuit 3602 output that is connected from another terminal with NAND door 3607 grid line extremely capable, corresponding to the selected pixel column that is used for erase signal.That is, the transistor 11 that is used for erase signal in this row pixel is switched on.When carrying the WE signal of L level, select TFT 49 conductings in the circuit 46, be the electromotive force of signal wire Sx thereby make the electromotive force of power supply 53.Therefore, accumulate in the electric charge of the capacitor 16 of the gate potential that is used for storing driver pixel TFT 12 and obtain discharging, thereby the signal that writes in the pixel can be wiped.
First impulse output circuit 3603 that the impulse output circuit 44 that is comprised in the Source drive 43, gate driver 3601 are comprised and second impulse output circuit 3602 are equivalent to have the shift register of a plurality of flop-over circuits, perhaps decoder circuit.When in impulse output circuit 44,3602 and 3603 each all adopts decoder circuit, can select source line Sx or grid line Gy at random.In the time can selecting source line Sx or grid line Gy randomly, can suppress to adopt the false contouring that the time produces during gray scale approach.
Notice that the structure of Source drive 43 is not limited to the above, and level shifter and impact damper can additionally be provided.In addition, the structure of gate driver 3601 is not limited to the above, and level shifter and impact damper can also additionally be provided.In addition, although do not illustrate among the figure, each in Source drive 43 and the first grid driver 3601 all comprises holding circuit.The structure that comprises the driver of holding circuit can be a kind of structure described in the embodiment 3.
Notice that the delay circuit shown in Figure 31 to 33 in the embodiment 11 can be applicable to the display device shown in Figure 36 of present embodiment.
In addition, display device of the present invention comprises power control circuit 63.Power control circuit 63 comprises power circuit 61 and the controller 62 that is used for to light-emitting component 13 transmission powers.Power circuit 61 links to each other with the pixel electrode of light-emitting component 13 with power lead Vx by TFT 12.In addition, power circuit 61 links to each other by the counter electrode of power lead with light-emitting component 13.
When forward bias imposes on light-emitting component 13, thereby carry electric currents so that the emission light time is arranged to have electric potential difference with first power supply 17 with second source 18, thereby make the electromotive force of first power supply 17 be higher than the electromotive force of second source 18 to light-emitting component 13.On the other hand, when reverse biased imposes on light-emitting component 13, first power supply 17 and second source 18 are arranged to have electric potential difference, thereby make the electromotive force of first power supply 17 be lower than the electromotive force of second source 18.By slave controller 62 prearranged signal is flowed to power circuit 61, carry out this electromotive force setting.
According to the present invention, use power control circuit 63 that reverse biased is imposed on light-emitting component 13, demote with the passing of time thereby can suppress light-emitting component 13, so that improve reliability.Light-emitting component 13 can have the initial imperfection that causes its anode and negative electrode short circuit owing to the unevenness of the pin hole of the small outstanding generation of the covering of foreign matter, male or female or electroluminescence layer.This initial imperfection disturb according to signal produce luminous/not luminous, and produce because almost all electric current all flows to short circuit and partly causes whole elements not launch light, perhaps specific pixel is luminous or not luminous, thereby can not carry out the problem of preferable image display.But,, reverse biased can be imposed on light-emitting component, thereby make electric current only flow to the short circuit part of anode and negative electrode partly, cause in the short circuit part and produce heat according to structure of the present invention.As a result, can isolate the short circuit part by oxidation or carbonization.Therefore, even when initial imperfection takes place, still can carry out preferable image display by eliminating defective.Note, preferably before delivery, isolate this initial imperfection.In addition, be not only initial imperfection, and also other defect can take place at anode and the negative electrode place of being short-circuited as time goes by.This defective is called progressive defects.But,, can apply reverse biased to light-emitting component termly, therefore, can eliminate this progressive defects that may exist to carry out preferable image display according to the present invention.Note, be not particularly limited the time that applies reverse biased to light-emitting component 13.
Display device of the present invention also comprises observation circuit 64 and control circuit 65.Observation circuit 64 is operated according to environment temperature.Control circuit 65 comprises constant current source and impact damper.Shown in the structure, observation circuit 64 comprises monitoring light-emitting component 66.
Control circuit 65 is carried the signal that is used to change electrical source voltage according to the output of observation circuit 64 to power control circuit 63.Power control circuit 63 is based on the signal of carrying from control circuit 65, and change will flow to the electrical source voltage of pixel region 40.According to the present invention, can suppress to change the fluctuation of caused current value, thereby improve reliability by environment temperature with said structure.Note the structure described in each the had embodiment 3 in observation circuit 64 and the control circuit 65.
According to the display device of execution constant voltage driving of the present invention, the pixel aperture ratio is 50% o'clock, and the brightness of light-emitting component is 500cd/m 2, and power consumption is 1W or lower (950mW).On the other hand, according to the display device of carrying out constant-current driving, the pixel aperture ratio is 25% o'clock, and the brightness of light-emitting component is 500cd/m 2, and power consumption is 2W (2040mW).That is,, can reduce power consumption by adopting constant voltage driving.By adopting constant voltage driving, power consumption can be suppressed perhaps be preferably 0.7W or lower for 1W or lower.Notice that above-mentioned power consumption number only is a pixel region, does not comprise the power consumption of driving circuit section.In addition, for the time gray scale approach that is adopted, both all show 70% demonstration duty ratio.
In addition, in the two, the quantity of pixel is 240 * 3 * 320 in the pixel region in the display device of the execution constant voltage driving that power consumption is measured as described above and the display device of carrying out constant-current driving.

Claims (26)

1. display device comprises:
The pixel region that comprises a plurality of pixels;
Source drive;
First grid driver; With
Second gate driver,
In wherein a plurality of pixels each includes light-emitting component, is used to control the first transistor of the vision signal of importing pixel, is used to control luminous/non-luminous transistor seconds of light-emitting component and the capacitor that is used for stored video signal,
Wherein the grid of the first transistor is selected circuit to be connected with first grid driver to pass through the second selection circuit and can be connected with second gate driver by first in operation, and
Wherein first select circuit to comprise first three-state buffer, and the second selection circuit comprises second three-state buffer, each in first three-state buffer and second three-state buffer is configured to be in quick condition.
2. display device according to claim 1 wherein has 500 to 1300nm thickness with the source electrode of the first transistor and transistor seconds and one of them conductive layer that links to each other of drain electrode.
3. display device according to claim 1 also comprises:
Be provided at first insulation course on the first transistor and the transistor seconds; With
Be in second insulation course on first insulation course,
Wherein first electrode of light-emitting component is provided on second insulation course.
4. display device according to claim 1 also comprises the insulation course at edge of first electrode of covering luminous element,
The described insulation course that wherein is positioned on the capacitor is 10 to 25 μ m at the width of column direction.
5. display device according to claim 1 also comprises the insulation course at edge of first electrode of covering luminous element,
Wherein this insulation course is a light shield layer.
6. display device according to claim 1, wherein first electrode of light-emitting component and one of them reflected light of second electrode, and another printing opacity.
7. display device according to claim 1, wherein first electrode of light-emitting component and second electrode both printing opacities.
8. display device according to claim 1 wherein provides power control circuit, is used to change the electromotive force of first power supply and second source, thereby can apply reverse biased to light-emitting component.
9. display device according to claim 1, wherein this light-emitting component comprise the material of the red emission that obtains from ternary excited state, the material of the material of the green emission that obtains from the singlet excited state or the blue emission that obtains from the singlet excited state.
10. display device according to claim 1, wherein the material of the material of the green emission that obtains by the material of the red emission that obtains from ternary excited state, from ternary excited state of this light-emitting component or the blue emission that obtains from the singlet excited state constitutes.
11. display device according to claim 1, wherein a plurality of power leads that are connected with first power supply are provided as row, and share every power lead by neighbor.
12. display device according to claim 1 wherein provides holding circuit between Source drive and junctional membrane, and this holding circuit is the one or more elements that are selected from resistor, capacitor and the rectifier.
13. display device according to claim 1 wherein provides observation circuit and control circuit, control circuit changes the electrical source voltage that flows to pixel region based on the output of observation circuit, and wherein control circuit is a switching regulator.
14. display device according to claim 1,
Wherein the source electrode of the first transistor and the drain electrode one of them link to each other with Source drive by the source line;
Wherein the source electrode of the first transistor with the drain electrode in another link to each other with the grid of transistor seconds;
Wherein the source electrode of transistor seconds and the drain electrode one of them link to each other with the pixel electrode of light-emitting component; And
Wherein the source electrode of transistor seconds with the drain electrode in another link to each other with power supply.
15. a display device comprises:
The pixel region that comprises a plurality of pixels;
Source drive;
First grid driver; With
Second gate driver,
In wherein a plurality of pixels each includes light-emitting component, is used to control the first transistor of the vision signal of importing pixel, is used to control luminous/non-luminous transistor seconds of light-emitting component and the capacitor that is used for stored video signal;
Wherein the grid of the first transistor is selected circuit to be connected with first grid driver to pass through the second selection circuit and can be connected with second gate driver by first in operation;
Wherein this capacitor comprises: and first semiconductor layer of the first transistor and transistor seconds be provided at second semiconductor layer in one deck, and the grid of the first transistor and transistor seconds be provided at the conductive layer in one deck and be provided at insulation course between second semiconductor layer and the conductive layer; And
Wherein first select circuit to comprise first three-state buffer, and the second selection circuit comprises second three-state buffer, each in first three-state buffer and second three-state buffer is configured to be in quick condition.
16. display device according to claim 15,
Wherein the source electrode of the first transistor and the drain electrode one of them link to each other with Source drive by the source line;
Wherein the source electrode of the first transistor with the drain electrode in another link to each other with the grid of transistor seconds;
Wherein the source electrode of transistor seconds and the drain electrode one of them link to each other with the pixel electrode of light-emitting component; And
Wherein the source electrode of transistor seconds with the drain electrode in another link to each other with power supply.
17. a display device comprises:
The pixel region that comprises a plurality of pixels;
Source drive;
First grid driver; With
Second gate driver,
In wherein a plurality of pixels each includes light-emitting component, is used to control the first transistor of the vision signal of importing pixel, is used to control luminous/non-luminous transistor seconds of light-emitting component and the capacitor that is used for stored video signal;
Wherein the grid of the first transistor is selected circuit to be connected with first grid driver to pass through the second selection circuit and can be connected with second gate driver by first in operation;
Wherein this capacitor comprises: with the grid of the first transistor and transistor seconds be provided at first conductive layer in one deck, with the conductive layer that is connected with the source electrode of the first transistor and transistor seconds and drain electrode be provided at second conductive layer in one deck and be provided at first conductive layer and second conductive layer between insulation course; And
Wherein first select circuit to comprise first three-state buffer, and the second selection circuit comprises second three-state buffer, each in first three-state buffer and second three-state buffer is configured to be in quick condition.
18. display device according to claim 17,
Wherein the source electrode of the first transistor and the drain electrode one of them link to each other with Source drive by the source line;
Wherein the source electrode of the first transistor with the drain electrode in another link to each other with the grid of transistor seconds;
Wherein the source electrode of transistor seconds and the drain electrode one of them link to each other with the pixel electrode of light-emitting component; And
Wherein the source electrode of transistor seconds with the drain electrode in another link to each other with power supply.
19. a display device comprises:
The pixel region that comprises a plurality of pixels;
Source drive;
First grid driver; With
Second gate driver,
In wherein a plurality of pixels each includes light-emitting component, is used to control the first transistor of the vision signal of importing pixel and the luminous/non-luminous transistor seconds that is used to control light-emitting component;
Wherein the grid of the first transistor is selected circuit to be connected with first grid driver to pass through the second selection circuit and can be connected with second gate driver by first in operation;
Wherein Source drive comprises impulse output circuit, latch, selection circuit, first holding circuit that is connected with the input node of impulse output circuit, is provided at second holding circuit between impulse output circuit and the latch and is provided at the 3rd holding circuit of selecting between circuit and the pixel region;
Wherein each in first to the 3rd holding circuit all is the one or more elements that are selected from resistor, capacitor and the rectifier; And
Wherein first select circuit to comprise first three-state buffer, and the second selection circuit comprises second three-state buffer, each in first three-state buffer and second three-state buffer is configured to be in quick condition.
20. display device according to claim 19, wherein this impulse output circuit is corresponding to a plurality of flop-over circuits or decoder circuit.
21. display device according to claim 19,
Wherein the source electrode of the first transistor and the drain electrode one of them link to each other with Source drive by the source line;
Wherein the source electrode of the first transistor with the drain electrode in another link to each other with the grid of transistor seconds;
Wherein the source electrode of transistor seconds and the drain electrode one of them link to each other with the pixel electrode of light-emitting component; And
Wherein the source electrode of transistor seconds with the drain electrode in another link to each other with power supply.
22. electronic equipment with display device according to claim 1.
23. a luminous display unit comprises:
Source drive;
First grid driver;
Second gate driver;
Pixel;
Be used for carrying to described pixel the source line of signal from described Source drive; And
In operation, select circuit to be connected to pass through the grid line that the second selection circuit can be electrically connected with second gate driver with first grid actuator electrical by first,
Described pixel comprises:
The first transistor, wherein the grid of the first transistor is connected with described second gate driver with described first grid driver by grid line in operation, and the source electrode of the first transistor or drain in one be electrically connected with the source line;
Transistor seconds, wherein the grid of transistor seconds is electrically connected with the source line by the first transistor;
Wherein during first selection cycle of the first transistor, described Source drive is carried vision signal to described pixel, selects the first transistor by first grid driver in first selection cycle; And during second selection cycle, described Source drive is carried erase signal to described pixel, selects the first transistor by second gate driver in second selection cycle,
Wherein first select circuit to comprise first three-state buffer, and the second selection circuit comprises second three-state buffer, each in first three-state buffer and second three-state buffer is configured to be in quick condition.
24. first selection cycle wherein in a subframe, takes place in display device according to claim 23 after second selection cycle.
25. second selection cycle wherein in a subframe, takes place in display device according to claim 23 after first selection cycle.
26. display device according to claim 23, wherein said pixel is between the first grid driver and second gate driver.
CN2005100560061A 2004-03-19 2005-03-21 Display device and electronic appliance Expired - Fee Related CN1670802B (en)

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