CN1669223A - Pll电路的∑△调制器 - Google Patents
Pll电路的∑△调制器 Download PDFInfo
- Publication number
- CN1669223A CN1669223A CNA028295587A CN02829558A CN1669223A CN 1669223 A CN1669223 A CN 1669223A CN A028295587 A CNA028295587 A CN A028295587A CN 02829558 A CN02829558 A CN 02829558A CN 1669223 A CN1669223 A CN 1669223A
- Authority
- CN
- China
- Prior art keywords
- signal
- adder
- delta modulator
- modulation
- spill over
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005574 cross-species transmission Effects 0.000 claims description 69
- 238000010295 mobile communication Methods 0.000 claims description 8
- 238000004891 communication Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 claims 2
- 230000007423 decrease Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 16
- 230000008676 import Effects 0.000 description 4
- 238000001228 spectrum Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 241000271946 Bitis gabonica Species 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000003292 diminished effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000001915 proofreading effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3006—Compensating for, or preventing of, undesired influence of physical parameters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
- H03M7/3024—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
- H03M7/3026—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
- H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
- H03M7/304—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
Description
Claims (18)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2002/013701 WO2004062107A1 (ja) | 2002-12-26 | 2002-12-26 | Pll回路のσδ変調器 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1669223A true CN1669223A (zh) | 2005-09-14 |
CN100521542C CN100521542C (zh) | 2009-07-29 |
Family
ID=32697318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB028295587A Expired - Fee Related CN100521542C (zh) | 2002-12-26 | 2002-12-26 | Pll电路的∑△调制器 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7388438B2 (zh) |
JP (1) | JP3792706B2 (zh) |
CN (1) | CN100521542C (zh) |
WO (1) | WO2004062107A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103001631A (zh) * | 2011-09-16 | 2013-03-27 | 英飞凌科技奥地利有限公司 | 小数n锁相环路 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE60314020T2 (de) * | 2003-11-28 | 2007-09-13 | Fujitsu Ltd., Kawasaki | Sd-modulator einer pll-schaltung |
KR100666479B1 (ko) * | 2004-08-30 | 2007-01-09 | 삼성전자주식회사 | 시그마 델타 변조기를 공유하는 수신 및 송신 채널 분수분주 위상 고정 루프를 포함한 주파수 합성기 및 그 동작방법 |
KR100684053B1 (ko) * | 2005-02-14 | 2007-02-16 | 삼성전자주식회사 | 시그마 델타 변조 장치, 이를 이용한 주파수 합성기 및 분수 분주 주파수 합성 방법 |
US8594770B2 (en) * | 2006-06-29 | 2013-11-26 | Accuvein, Inc. | Multispectral detection and presentation of an object's characteristics |
JP6882094B2 (ja) * | 2017-06-23 | 2021-06-02 | 日本無線株式会社 | Pll回路 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5305362A (en) * | 1992-12-10 | 1994-04-19 | Hewlett-Packard Company | Spur reduction for multiple modulator based synthesis |
JP3536073B2 (ja) | 1995-05-24 | 2004-06-07 | アジレント・テクノロジーズ・インク | 分周器 |
US5986512A (en) | 1997-12-12 | 1999-11-16 | Telefonaktiebolaget L M Ericsson (Publ) | Σ-Δ modulator-controlled phase-locked-loop circuit |
JP2003023351A (ja) * | 2001-07-09 | 2003-01-24 | Nec Corp | 非整数分周器、およびフラクショナルn周波数シンセサイザ |
JP4155406B2 (ja) * | 2004-04-01 | 2008-09-24 | ソニー・エリクソン・モバイルコミュニケーションズ株式会社 | デルタシグマ変調型分数分周pll周波数シンセサイザ、及び、無線通信装置 |
-
2002
- 2002-12-26 WO PCT/JP2002/013701 patent/WO2004062107A1/ja active Application Filing
- 2002-12-26 CN CNB028295587A patent/CN100521542C/zh not_active Expired - Fee Related
- 2002-12-26 JP JP2004564432A patent/JP3792706B2/ja not_active Expired - Fee Related
-
2005
- 2005-01-26 US US11/042,136 patent/US7388438B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103001631A (zh) * | 2011-09-16 | 2013-03-27 | 英飞凌科技奥地利有限公司 | 小数n锁相环路 |
CN103001631B (zh) * | 2011-09-16 | 2017-04-12 | 英飞凌科技奥地利有限公司 | 小数n锁相环路 |
Also Published As
Publication number | Publication date |
---|---|
US7388438B2 (en) | 2008-06-17 |
JPWO2004062107A1 (ja) | 2006-05-18 |
WO2004062107A1 (ja) | 2004-07-22 |
JP3792706B2 (ja) | 2006-07-05 |
US20050153662A1 (en) | 2005-07-14 |
CN100521542C (zh) | 2009-07-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081017 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081017 Address after: Tokyo, Japan, Japan Applicant after: Fujitsu Microelectronics Ltd. Address before: Kawasaki, Kanagawa, Japan Applicant before: Fujitsu Ltd. |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTOR CO., LTD. Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
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CP03 | Change of name, title or address |
Address after: Kanagawa Patentee after: Fujitsu Semiconductor Co., Ltd. Address before: Tokyo, Japan Patentee before: Fujitsu Microelectronics Ltd. |
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ASS | Succession or assignment of patent right |
Owner name: SPANSION LLC N. D. GES D. STAATES Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20140107 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20140107 Address after: American California Patentee after: Spansion LLC N. D. Ges D. Staates Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160701 Address after: American California Patentee after: Cypress Semiconductor Corp. Address before: California Patentee before: Spansion LLC N. D. Ges D. Staates |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090729 Termination date: 20191226 |
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CF01 | Termination of patent right due to non-payment of annual fee |