CN1652314A - 引线框架、半导体芯片封装、及该封装的制造方法 - Google Patents
引线框架、半导体芯片封装、及该封装的制造方法 Download PDFInfo
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Abstract
本发明涉及引线框架、半导体芯片封装和制造该半导体芯片封装的方法。其中半导体芯片封装具有:引线框架,其具有沿该引线框架的四边形成的多条引线、以及自该四边中的每一边的边缘延伸的连接条,其中该连接条的底表面是凹陷的;半导体芯片,其粘接在该连接条的凹陷表面上;连接器,其将该半导体芯片的上表面上形成的多个芯片焊盘与该多条引线电连接;以及密封剂,其将该半导体芯片的该上表面、该连接器和该连接器的键合部分封闭。
Description
本申请要求2004年2月4日向韩国知识产权局提交的第10-2004-0007295号韩国专利申请的优先权,其公开的内容在此参考引用。
技术领域
本发明涉及引线框架、半导体芯片封装和制造该半导体芯片封装的方法。更具体地,本发明涉及引线框架;半导体芯片封装,其采用该引线框架,并具有裸露引线框架封装(ELP)结构,其中该半导体芯片封装的厚度因该引线框架的使用而降低;以及制造该封装的方法。
背景技术
在制造半导体封装时,可使用四边引线扁平封装(QFP)和焊球阵列(BGA)封装技术来将半导体芯片与外部环境电子电气连接。
在QFP的制造中可使用引线框架。引线框架不仅可以用于通过将半导体芯片与外部电路电连接来向外部电路提供由半导体芯片执行的功能,还可以物理地支撑半导体芯片。
引线框架可以包括其上可安装半导体芯片的管芯焊盘、可被引线键合到半导体芯片的芯片焊盘上的引线、以及可支撑管芯焊盘和引线的框架。
QFP通常可具有裸露引线框架封装(ELP)结构。引线框架的一部分可暴露在封装体的外面。具体地,在具有ELP的QFP中,管芯焊盘和引线的下部可在封装体的底表面上暴露。
传统半导体芯片封装可参照图10和11说明。
图10示出传统半导体芯片封装的俯视图,图11示出沿图10的线XI-XI′截取的剖视图。
如图10和11所示,根据传统半导体芯片封装的半导体芯片封装可以包括引线框架、半导体芯片50、键合线60和可在模塑工艺中使用的密封剂70。引线框架可以包括:多个引线10,其可以沿引线框架的四边形成;管芯焊盘20,其可以形成在引线框架的中央;以及连接条30,其可以自四边中的每一边的边缘延伸且可以连接在管芯焊盘20上。
半导体芯片50的上表面可以是有源表面,其上可以形成多个芯片焊盘51,且可以是无源表面的下表面可粘接在管芯焊盘20的上部。
键合线60可以将多个芯片焊盘51与多个引线10电连接。
密封剂70可以形成来封闭半导体芯片50和键合线60。键合线60的键合部分可以用模具通过模制方法制成。另外,键合部分可以由绝缘材料制成。多个引线10的下表面(引线可以被70完全封闭,如图11所示)和管芯焊盘20的下表面可以不被密封剂70封闭,且可以暴露在封装外面。
半导体芯片50可以安装在管芯焊盘20上。因为半导体芯片50可以位于管芯焊盘20的上部,所以将半导体芯片50与引线10连接的键合线60的长度至少会与半导体芯片50的厚度相等。于是,诸如高连接电阻的电特性会降低。
为了解决上述问题,连接条30和管芯焊盘20可以向下弯曲(称为下置(down-set)),且半导体芯片50可以粘接在下置管芯焊盘20的上部,从而键合线60的长度可减小或最小化。
然而,封装的以上结构在调节封装的厚度方面具有限制。
于是,通常半导体芯片会被构造为具有更小的厚度,以使半导体芯片封装的厚度降低或最小化。
然而,随着半导体芯片减薄,在晶片处理工艺中晶片会易于折断。结果,不能使用切割晶片的锯开装置。
此外,在完成封装的制造之后,弱化的半导体芯片会倾向于被甚至小冲击所损坏。
发明内容
本发明的示例性实施例提供了一种半导体芯片封装,其具有减小或最小化的厚度,但不降低半导体芯片的厚度。
本发明的示例性实施例提供一种无管芯焊盘的引线框架和一种采用该引线框架的半导体芯片封装。
本发明的示例性实施例提供一种制造半导体芯片封装的方法。
根据本发明的一示例性实施例,根据本发明的一种半导体芯片封装包括:引线框架,其具有沿引线框架的四边形成的多条引线、以及自四边中的每一边的边缘延伸的连接条,其中连接条的底表面是凹陷的;半导体芯片,其粘接在连接条的凹陷表面上;连接器,其将半导体芯片的上表面上形成的多个芯片焊盘与该多条引线电连接;以及密封剂,其将半导体芯片的上表面、连接器和连接器的键合部分封闭。
在一示例性实施例中,连接条向上弯曲以具有上置结构(up-set structure)。
在一示例性实施例中,半导体芯片封装具有约0.3至0.4mm范围内的总高度。
根据本发明的另一示例性实施例,提供一种引线框架,其包括:多条引线,其在引线框架的四边上形成;以及连接条,其自四边中的每一边的边缘延伸且具有凹陷的底表面。
在示例性实施例中,连接条向上弯曲,从而具有上置结构。
在示例性实施例中,引线框架具有约0.18至0.22mm的厚度。
根据本发明的另一示例性实施例,提供一种制造半导体芯片封装的方法,其包括:提供引线框架,该引线框架包括多条引线和其底表面凹陷的多条连接条;将半导体芯片粘接到连接条的凹陷表面上,从而半导体芯片的有源表面面向上方;通过连接器将半导体芯片的有源表面上形成的多个芯片焊盘与该多条引线电连接;以及封闭半导体芯片的上表面、引线框架的上部、连接器和连接器的键合部分,从而露出该多条引线的下表面和该半导体芯片的下表面。
在提供引线框架后,在一示例性实施例中,该方法还包括使用模具使连接条上置,从而连接条向上弯曲。
附图说明
通过参照附图对本发明示例性实施例的说明,本发明将变得更清楚,其中:
图1是俯视图,示出根据本发明一示例性实施例的引线框架;
图2示出沿图1的线II-II′截取的剖视图;
图3是剖视图,示出根据本发明另一示例性实施例的引线框架;
图4是俯视图,示出根据本发明一示例性实施例的半导体芯片封装;
图5A和5B示出沿图4的线V-V′截取的剖视图;
图6A和6B是剖视图,示出根据本发明一示例性实施例的半导体芯片封装;
图7A是俯视图,示出根据本发明一示例性实施例的半导体芯片封装形成顺序中的第一工序,图7B示出沿图7A的线VII-VII′截取的剖视图;
图8示出图7B的工序之后的工序中制造的半导体芯片封装的剖视图;
图9A示出图8的工序之后的工序中制造的半导体芯片封装的俯视图,图9B示出沿图9A的线IX-IX′截取的剖视图;
图10是示出传统半导体芯片封装的俯视图;以及
图11示出沿图10的线XI-XI′截取的剖视图。
具体实施方式
通过参照以下对示例性实施例的详细说明和附图,本发明的优点和特征、以及实现本发明的方法将更易于理解。但是,本发明可以以多种不同的形式实施,且不应当被认为限于此处提及的示例性实施例。更确切地,提供这些示例性实施例,使得本公开详尽而完整,且将本发明的思想充分传达给本领域技术人员,且本发明将仅由所附权利要求限定。在整个说明书中,相同的附图标记表示相同的元件。
参照图1和2说明根据本发明一示例性实施例的引线框架的结构。
图1是俯视图,示出根据本发明一示例性实施例的引线框架,图2示出沿图1的线II-II′截取的剖视图。
如图1和2所示,根据本发明示例性实施例的引线框架可通过金属板的蚀刻加工和/或压力加工形成。引线框架可包括:多条引线100,其可沿引线框架的四条边形成;以及连接条200,其可自四条边中的每一条边的边缘延伸。
连接条200可通过选择性蚀刻工艺形成,其可以是半蚀刻(half etching)。
例如,当引线框架的厚度是0.2mm时,每个连接条200的底表面可凹进约0.1mm。
此外,连接条200可以向上弯曲,即具有凹陷部分的连接条200可以按上置布置的方式从中心部分向周围边缘部分延伸,使得连接条200的周围边缘部分的厚度可小于连接条200的中心部分的厚度。
此构造可提供一空间,使得半导体芯片能粘接在连接条200的下表面上。
因为连接条可以在其底表面上凹陷且可具有上置结构,所以可以确保半导体芯片能粘接到连接条200的下表面上的空间,而不必提供管芯焊盘。结果,半导体芯片封装的总尺寸可减小。
接着,参考图3说明根据本发明另一示例性实施例的引线框架的结构。
图3是剖视图,示出根据本发明另一示例性实施例的引线框架。
如图3所示,根据本发明的本示例性实施例的引线框架可以通过金属板的蚀刻加工和/或压力加工以与前述示例性实施例相似的方式形成。引线框架可以包括:多条引线,其可沿引线框架的四边形成;以及连接条200,其可自四边中每一边的边缘延伸。
凹陷区域可利用半蚀刻和/或类似的工艺形成在连接条200的下表面上,以确保粘接半导体芯片的空间。
因此,除连接条200不需要上置外,根据本发明的本示例性实施例的引线框架的结构可与根据本发明的前述示例性实施例的引线框架的结构相似。
参照图4、5A和5B详细说明根据本发明第一示例性实施例的半导体芯片封装的结构。
图4是俯视图,示出根据本发明一示例性实施例的半导体芯片封装;图5A和5B示出沿图4的线V-V′截取的剖视图。
如图4、5A和5B所示,根据本发明一示例性实施例的半导体芯片封装可包括引线框架、半导体芯片500、键合线600和密封剂700。引线框架可包括可沿引线框架的四边形成的多条引线100。连接条200还可自四边中每一边的边缘延伸。密封剂700可用于模塑工艺。
引线框的连接条200可通过选择性蚀刻工艺形成,该蚀刻工艺可以是半蚀刻。例如,如果引线框架的厚度是0.2mm,则连接条200的底表面可以凹进约0.1mm。
半导体芯片500可粘接在连接条200的下部蚀刻表面上。连接条200的从连接条200的中部至端部的部分(半导体芯片500可粘接在其上)可向上弯曲,即上置,从而确保封装中用于半导体芯片500的空间。
半导体芯片500的其上可粘接连接条200的上表面可以是有源表面,在该有源表面上可形成多个芯片焊盘510。连接条200可以粘接在半导体芯片500的有源表面的边缘部分上,在该部分未形成芯片焊盘510。
在一示例性实施例中,芯片焊盘510可具有边缘形式的焊盘结构,其中芯片焊盘510可沿半导体芯片500的四条边形成。芯片焊盘510也可以具有一种边缘形式的焊盘结构,其中芯片焊盘510可在半导体芯片500的两条边上形成。此外,芯片焊盘510可具有中心形式的焊盘结构,其中芯片焊盘510可形成在半导体芯片500的中心部分。
绝缘粘接剂可用于将半导体芯片500粘接在连接条200上。液相、b级或膜型粘接剂可用作该绝缘粘接剂。b级粘接剂可为液态和固态之间的中间态。
键合线600可将多个芯片焊盘510与多条引线100电连接。在一示例性实施例中,键合线600可由Au、Au-Al合金、Au-Pd合金等制成。
球形接点(ball bond)可形成在键合线600上,其可键合到半导体芯片500的芯片焊盘510和引线100二者上。此外,球形接点可形成在键合线600上,其可键合到芯片焊盘510和引线100中的一个上;针脚接点(stitch bond)可形成在键合线600上,其键合到芯片焊盘510和引线100中的另一个上,其上可不形成球形接点。具有针脚形状的针脚接点可通过压制键合线600的键合表面等形成。具有球形的球形接点可形成在键合线600的键合表面。密封剂700可由诸如环氧树脂模塑料(epoxy molding compound)(EMC)的绝缘材料制成。采用利用模具的模塑法,密封剂700可封闭半导体芯片500的上表面和侧表面(不包括下表面)、除多条引线100的下表面外的引线框架的所有部分、键合线600、以及键合线600的键合部分。
在此情形下,半导体芯片500的上表面、键合线600、以及键合线600的键合部分需用绝缘材料封闭。
引线框架可由铜和/或铜合金制成。在一示例性实施例中,引线框架的诸如引线100的下表面的部分(其不被封闭)可覆盖以难以氧化和/或具有高电导率的材料,例如Sn-Pb合金、Pd-Au合金和Ag-Au合金。
此外,引线100的暴露的下表面可用于将外部基板与封装电连接。半导体芯片500的下表面可以露出,从而半导体芯片500中产生的热可有效消散。
如图5B所示,散热效果可通过例如在半导体芯片500的下表面上额外包括散热装置900来提高。具有上述构造的半导体芯片封装可具有0.3-0.4mm的厚度。
在根据本发明的一示例性实施例的半导体芯片封装中,因为半导体芯片可容纳在无管芯焊盘的引线框架中且半导体芯片的下表面暴露,所以封装的厚度可降低和/或可获得散热效果。
根据本发明另一示例性实施例的半导体芯片封装的结构将参照图6A和6B得以说明。
图6A和6B是剖视图,示出根据本发明另一示例性实施例的半导体芯片封装。
如图6A和6B所示,根据本发明另一示例性实施例的半导体芯片封装可包括含多条引线和连接条200的引线框架、半导体芯片500、键合线600和/或密封剂700。
半导体芯片500可粘接在引线框架的连接条200的下表面上。凹陷区域可通过半蚀刻形成在连接条200的下表面上,从而在封装中为粘接半导体芯片500提供空间。
如图6B所示,散热效果可通过例如在半导体芯片500的下表面上额外包括散热装置900来提高。
除了连接条不必上置外,根据本发明另一示例性实施例的半导体芯片封装的构造可与半导体芯片封装的前述示例性实施例相似。因此,根据本发明的本示例性实施例的半导体芯片封装可具有与根据前述示例性实施例的半导体芯片封装相似的效果和/或优点。
现在将参照图7A至9B和图4、5A和5B说明根据本发明一示例性实施例的半导体芯片封装的制造方法。
图7A是俯视图,示出用于形成根据本发明一示例性实施例的半导体芯片封装的示例性工艺,图7B是沿图7A的线VII-VII′截取的剖视图。
如图7A和7B所示,首先可形成引线框架。引线框架可包括:多条引线100,其可沿引线框架的四边形成;以及连接条200,其可自四边中的每一边的边缘延伸,且可通过金属板的蚀刻加工或压力加工形成。
连接条200可通过选择性蚀刻工艺半蚀刻,从而具有与引线框架厚度的约一半相当的厚度。籍此,凹陷区域可形成在连接条200的下表面。
图8示出由图7B所示工序之后进行的工序制造的半导体芯片封装的剖视图。
如图8所示,连接条的自连接条200的中部至端部的部分可向上弯曲,即上置。通过用例如模具(die)的工具向上压连接条200的下表面,可形成连接条200的上置部分。
图9A示出经历了图8所示的工序之后的工序后的半导体芯片封装的俯视图,图9B示出沿图9A的线IX-IX′截取的剖视图。
如图9A和9B所示,半导体芯片500可用绝缘粘接剂粘接在上置连接条的下表面上。
半导体芯片500的其上可粘接连接条200的上表面可为有源表面,在该有源表面上可形成多个芯片焊盘510。连接条200可粘接在有源表面的其上不形成芯片焊盘510的边缘部分上。液相、b级或膜型粘接剂可用作绝缘粘接剂。例如,b级粘接剂可以是液态和固态之间的中间态粘接剂。
接着,可用键合线600来进行引线键合工艺,从而将可形成在半导体芯片500的上表面上的芯片焊盘510与引线100电连接。在一示例性实施例中,用于将多个芯片焊盘510与多条引线100电连接的键合线600可由Au、Au-Al合金、Au-Pd合金和/或类似物制成。
此外,球形接点可形成在键合线600上,半导体芯片500的芯片焊盘510和引线100二者可粘附在其上。球形接点可形成在键合线600上,其可键合到芯片焊盘510和引线100中的一个上;针脚接点可形成在键合线600上,其可键合到其上未形成球形接点的另一个上。
再参见图4、5A和5B,采用利用模具的模塑法,密封剂700可封闭半导体芯片500的上表面和侧表面(不包括下表面)、除多条引线100的下表面外的引线框架的所有部分、键合线600、以及键合线600的键合部分。密封剂700可由诸如EMC的绝缘材料制成。
引线框架可由铜或铜合金形成。在一示例性实施例中,引线框架的不被环氧模塑树脂(EMC)封闭的部分在形成引线框架的同时可覆盖以更难以氧化和/或具有高导电率的材料,例如Sn-Pb合金、Pd-Au合金和/或Ag-Au合金。
在一优选实施例中,引线框架可以具有约0.18至0.22mm的厚度。
在一优选实施例中,每个连接条的凹陷部分被蚀刻成具有小于引线框架的厚度的一半的厚度。
如上所述,虽然在根据本发明的示例性实施例的半导体芯片封装的制造方法中仅示出了一个封装,但通常可以按批量的方式同时加工多个封装,例如以带形形式制造,且可以通过之后进行的单个化工艺(singulationprocess)将其分割成单独的封装。
单个化方法可通过采用模具冲制和/或锯片等的分割工艺来进行。
虽然已经参照附图通过其示例性实施例具体显示和说明了本发明,但是本领域技术人员理解,在不脱离如所附权利要求所限定的本发明的实质和范围的情况下,可对其作形式和细节上的各种改变。例如,虽然本发明的示例性实施例示出了四条边,每条边均包括引线和连接条,但是引线和连接条可设置在比所有四条边更少的边上。
如上所述,根据本发明的示例性实施例,因为半导体芯片可粘接在底表面凹陷的连接条的下表面上,不需要单独的管芯焊盘,所以半导体芯片封装的厚度可降低或最小化。此外,用于容纳半导体芯片的空间可通过一个或更多个上置连接条来提供。半导体芯片的下表面可极大地暴露,从而半导体芯片的散热可得到改善。
Claims (25)
1.一种半导体芯片封装,包括:
引线框架,其具有沿该引线框架的四边形成的多条引线、以及自该四边中的每一边的边缘延伸的连接条,其中该连接条的底表面是凹陷的;
半导体芯片,其粘接在该连接条的凹陷表面上;
连接器,其将该半导体芯片的上表面上形成的多个芯片焊盘与该多条引线电连接;以及
密封剂,其将该半导体芯片的该上表面、该连接器和该连接器的键合部分封闭。
2.如权利要求1的半导体芯片封装,其中该多条引线的下表面暴露在该封装外面。
3.如权利要求1的半导体芯片封装,其中该半导体芯片的该下表面暴露在该封装外面。
4.如权利要求2的半导体芯片封装,其中该连接条向上弯曲从而具有上置结构。
5.如权利要求1的半导体芯片封装,其中该连接器是键合线。
6.如权利要求1的半导体芯片封装,其中该密封剂是环氧模塑树脂(EMC)。
7.如权利要求1的半导体芯片封装,其中该引线框架的未被封闭的部分覆盖有自Sn-Pb合金、Pd-Au合金和Ag-Au合金构成的组中选出的导电抗氧化材料。
8.如权利要求1的半导体芯片封装,还包括粘附在该半导体芯片的该暴露的下表面上的散热装置。
9.如权利要求1的半导体芯片封装,其中该封装的总高度在约0.3至约0.4mm的范围内。
10.一种引线框架,包括:
多条引线,其形成在该引线框架的四边;以及
连接条,其自该四边中的每一边的边缘延伸且具有凹陷的底表面。
11.如权利要求10的引线框架,其中该连接条向上弯曲,从而具有上置结构。
12.如权利要求11的引线框架,其中该引线框架具有约0.18至约0.22mm的厚度。
13.如权利要求12的引线框架,其中每个连接条的该凹陷部分被蚀刻成具有小于该引线框架的厚度的一半的厚度。
14.一种制造半导体芯片封装的方法,包括:
提供引线框架,该引线框架具有多条引线和连接条,其中所述连接条的底表面是凹陷的;
将半导体芯片粘接到该连接条的该凹陷表面上,从而该半导体芯片的有源表面面向上方;
将该半导体芯片的该有源表面上形成的多个芯片焊盘与该多条引线电连接;
封闭该半导体芯片的上表面、该引线框架的上表面、该连接器和该连接器的键合部分,从而暴露该多条引线的下表面和该半导体芯片的下表面。
15.如权利要求14的方法,还包括:在提供该引线框架后,用模具使该连接条上置,从而该连接条向上弯曲。
16.如权利要求14的方法,还以自Sn-Pb合金、Pd-Au合金和Ag-Au合金构成的组中选出的导电抗氧化材料覆盖该引线框架的未被封闭的部分。
17.如权利要求14的方法,其中该封装的总高度在约0.3至约0.4mm的范围内。
18.如权利要求14的方法,其中该多条引线和该半导体芯片的该下表面暴露在该封装外面。
19.如权利要求18的方法,还包括粘附在该半导体芯片的该暴露的下表面上的散热装置。
20.如权利要求14的方法,其中该引线框架具有约0.18至约0.22mm的厚度。
21.如权利要求20的方法,其中每个连接条的该凹陷部分被蚀刻成具有小于该引线框架的厚度的一半的厚度。
22.如权利要求14的方法,其中该连接器是键合线。
23.如权利要求1的半导体芯片封装,其中在该四边中的每一边,该引线框架延伸超出该引线。
24.如权利要求10的引线框架,其中在该四边中的每一边,该引线框架延伸超出该引线。
25.如权利要求14的方法,其中该引线框架延伸超出该引线。
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JP (1) | JP5100967B2 (zh) |
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CN102593336A (zh) * | 2011-01-17 | 2012-07-18 | 三星Led株式会社 | 发光器件封装件及其制造方法 |
CN102593336B (zh) * | 2011-01-17 | 2016-06-22 | 三星电子株式会社 | 发光器件封装件及其制造方法 |
CN103000591A (zh) * | 2011-09-08 | 2013-03-27 | 台湾积体电路制造股份有限公司 | 芯片封装件的环结构 |
CN103000591B (zh) * | 2011-09-08 | 2016-04-20 | 台湾积体电路制造股份有限公司 | 芯片封装件的环结构 |
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JP5100967B2 (ja) | 2012-12-19 |
US7436049B2 (en) | 2008-10-14 |
JP2005223331A (ja) | 2005-08-18 |
CN100541748C (zh) | 2009-09-16 |
US20050167791A1 (en) | 2005-08-04 |
KR100621555B1 (ko) | 2006-09-14 |
DE102005006730A1 (de) | 2005-08-25 |
KR20050079145A (ko) | 2005-08-09 |
DE102005006730B4 (de) | 2007-02-22 |
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