CN1652119A - Method for implementing multi-chip verification by socket interface - Google Patents

Method for implementing multi-chip verification by socket interface Download PDF

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Publication number
CN1652119A
CN1652119A CN 200510020498 CN200510020498A CN1652119A CN 1652119 A CN1652119 A CN 1652119A CN 200510020498 CN200510020498 CN 200510020498 CN 200510020498 A CN200510020498 A CN 200510020498A CN 1652119 A CN1652119 A CN 1652119A
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CN
China
Prior art keywords
chip
socket interface
server end
socket
client
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 200510020498
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Chinese (zh)
Inventor
孙杰
陈卓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NANSHAN ZHIQIAO MICRO ELECTRONICS CO Ltd SICHUAN
Original Assignee
NANSHAN ZHIQIAO MICRO ELECTRONICS CO Ltd SICHUAN
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NANSHAN ZHIQIAO MICRO ELECTRONICS CO Ltd SICHUAN filed Critical NANSHAN ZHIQIAO MICRO ELECTRONICS CO Ltd SICHUAN
Priority to CN 200510020498 priority Critical patent/CN1652119A/en
Publication of CN1652119A publication Critical patent/CN1652119A/en
Pending legal-status Critical Current

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Abstract

The present invention discloses a new method for verifying several chips. Said method is characterized by that firstly, between two chips having need of making communication a server terminal can be defined, and another is customer terminal chip, then the socket interface can be used to create the communication between artificial environments of two or more than two chips so as to implement data mutual transmission between several chips. Besides, said invention also provides several advantages of said method.

Description

A kind of method of utilizing the socket interface to realize multi-chip verification
Technical field
The present invention relates to a kind of new multi-chip verification method, the method can be used for a chip when work the time needs other chips to closely cooperate, and when perhaps same chip need carry out a plurality of chip-stacked use, verifies.
Background technology
In the performance history of chip, usually need to consider the matching problem of a plurality of chips.Such as delivering to chip B, handle the back through B and exporting to chip A from the output of chip A.In this process, require the function of chip A and B all to want correct.
Solved this class problem in the past dual mode arranged usually:
One, a chip adopts real design, and another one then adopts behavioral scaling model.The shortcoming of the method is, behavior model not necessarily fully consistent with chip, and possible vicious place, the behavior of the chip that can summarize of people is limited in addition; Need all set up model to each chip, workload is big.
Two, all chips all adopt real design.Avoid the shortcoming of a method like this, but it self also has its shortcoming: two chips are actually and have regarded two designs as a design in a simulated environment, and this design scale becomes greatly at double, and the simulation velocity of environment also can reduce at double.Build new circumstance complication, new environment is neither the environment of chip A, environment that neither chip B, but the environment of A+B, building of new environment is complicated more a lot of than the freestanding environment of A and B, and the code of new environment do not have reusability, does multi-chip verification and then needs to rebulid environment if change the connected mode of A and B or will add chip C; The configuration complexity of chip, each chip all will correctly dispose and could work, and a plurality of chips are in an environment, and the layoutprocedure of chip will complicate
Summary of the invention
The present invention aims to provide the method that a kind of socket of utilization interface is realized multi-chip verification, adopt the emulation technology of this multicore sheet, simplify the complicacy of original multicore sheet emulation technology greatly, make between the chip in the chip nest plate performance history to cooperate to go up wrong risk to occur and reduce greatly, also can make the function etc. of piling up of chip obtain the real simulation result.
For solving the problems of the technologies described above, the present invention adopts following technical scheme:
A) according to the emulation needs, between per two chips that need communication, determine the server end chip that chip is the emulation of multicore sheet, another one then is the client chip;
B) utilize the socket interface between the simulated environment of the chip that needs communication, to set up communication;
C) give the server end of socket interface after the data of certain output of server end chip are received as required in the simulated environment of this chip;
D) the socket interface of server end utilizes the socket communication of having set up data to be delivered to the client of socket interface;
E) client of Socket will be issued the client chip from the data that server end is received, and/or the server end of Socket will be issued the server end chip from the data that client is received.
Beneficial effect of the present invention shows:
The Socket interface is that two needs carry out carrying out the interface mode of communication between the program of communication, the communication of this interface mode between can across a network realization program.
The present invention utilizes the Socket interface, well solved the defective of existing two kinds of proof schemes, need not rebulid new environment, but well utilize the single-chip simulated environment of original chip separately, realized the emulation of multicore sheet, the configuration of chip is also very simple, the reusability of code is also very high, in addition owing to adopted the socket interface, so can realize the distributed emulation of across a network, reasonably use the computer resource on the network to carry out simulation calculation simultaneously, thereby simulation velocity is suitable with the single-chip simulation velocity.
Adopt the present invention to simplify the complicacy of original multicore sheet emulation technology greatly, make to cooperate between the chip in the chip nest plate performance history to go up wrong risk to occur and reduce greatly, also can make the function etc. of piling up of chip obtain the real simulation result.
Description of drawings
Fig. 1 is FB(flow block) of the present invention (is example with two chips)
Embodiment
It is example explanation the present invention program's block diagram that Fig. 1 has provided with two chips, but is not limited thereto, and also can use the present invention program under the checking situation of multicore sheet.
The present invention will be described in detail below in conjunction with Fig. 1.
A) determine that a chip is the server end chip of multicore sheet emulation, i.e. chip A, all the other then are client chip, i.e. chip B;
B) utilize the socket interface between the simulated environment of two or more chips, to set up communication;
C) give the server end of socket interface after the data of certain output of server end chip are received as required in the simulated environment of this chip;
D) the socket interface of server end utilizes the socket communication of having set up data to be delivered to the client of socket interface;
E) client of Socket will be issued the client chip from the data that server end is received
F) same, because the Socket interface is the bi-directional full-duplex interface; The data of chip B can send to chip B.
Adopt the present invention need not build new simulated environment, reused the single-chip simulated environment of original chip to greatest extent; Only need be on the simulated environment basis of original single-chip, the server end or the client that add the socket interface get final product; The new simulated environment of each chip (simulated environment of band socket interface) compiling is separately passed through; Each simulated environment that participates in the emulation of multicore sheet is moved simultaneously;
Each chip disposes (configuration is simple, gets final product with the configuration code under original single-chip environment) separately; The simulated program of each chip can move on different computing machines, connects the communication that just can realize the socket interface by network, can certainly move on same computing machine;
Owing to be the parallel runnings at the same time of a plurality of programs, so rational Distribution Calculation machine resource makes that total simulation time can the proportional increase because of the increase of chip number.
Chip portfolio is flexible, and such as the multicore sheet emulation that will realize chip A and C, the environment of A is constant, and still the chip emulation environment with A and B is the same.Only the single-chip simulated environment of C need be added the socket interface-client gets final product.

Claims (1)

1, a kind of method of utilizing the socket interface to realize multi-chip verification is characterized in that:
A) according to the emulation needs, between per two chips that need communication, determine the server end chip that chip is the emulation of multicore sheet, another one then is the client chip;
B) utilize the socket interface between the simulated environment of the chip that needs communication, to set up communication;
C) give the server end of socket interface after the data of certain output of server end chip are received as required in the simulated environment of this chip;
D) the socket interface of server end utilizes the socket communication of having set up data to be delivered to the client of socket interface;
E) client of Socket will be issued the client chip from the data that server end is received, and/or the server end of Socket will be issued the server end chip from the data that client is received.
CN 200510020498 2005-03-11 2005-03-11 Method for implementing multi-chip verification by socket interface Pending CN1652119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200510020498 CN1652119A (en) 2005-03-11 2005-03-11 Method for implementing multi-chip verification by socket interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200510020498 CN1652119A (en) 2005-03-11 2005-03-11 Method for implementing multi-chip verification by socket interface

Publications (1)

Publication Number Publication Date
CN1652119A true CN1652119A (en) 2005-08-10

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200510020498 Pending CN1652119A (en) 2005-03-11 2005-03-11 Method for implementing multi-chip verification by socket interface

Country Status (1)

Country Link
CN (1) CN1652119A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105162661A (en) * 2015-09-21 2015-12-16 盛科网络(苏州)有限公司 Software verification system and software verification method of multichip system
CN115086214A (en) * 2022-06-13 2022-09-20 新华三半导体技术有限公司 Nest plate detection system and method, electronic equipment and storage medium

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105162661A (en) * 2015-09-21 2015-12-16 盛科网络(苏州)有限公司 Software verification system and software verification method of multichip system
CN115086214A (en) * 2022-06-13 2022-09-20 新华三半导体技术有限公司 Nest plate detection system and method, electronic equipment and storage medium
CN115086214B (en) * 2022-06-13 2024-01-19 新华三半导体技术有限公司 System and method for detecting set, electronic equipment and storage medium

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