CN1622048A - Method and apparatus for displaying computer system debugging result - Google Patents
Method and apparatus for displaying computer system debugging result Download PDFInfo
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- CN1622048A CN1622048A CN 200310119922 CN200310119922A CN1622048A CN 1622048 A CN1622048 A CN 1622048A CN 200310119922 CN200310119922 CN 200310119922 CN 200310119922 A CN200310119922 A CN 200310119922A CN 1622048 A CN1622048 A CN 1622048A
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Abstract
The present invention relates to one kind of computer system debugging result displaying method and device. The computer system detects via the system control bus the existence of the debugging result displaying circuit in the computer system, and the computer system also includes one selector set between the system control bus and the output. By means of the method and device of the present invention, the computer system can decide whether to output debugging code during power-on test of peripheral equipment, and this can reduce the starting time delay.
Description
Technical field
The present invention is particularly to not comprise end arranged side by side (Parallel Port) in computer system about a kind of method and device that shows the debugging computer system result, is not easy to the computer of fault detect.
Background technology
Computer be provided with ROM-BIOS (basic input-output system, BIOS).BIOS comprises the SETUP program of basic storing and setting, voluntarily according to demand, sets different data for the user, makes the computer operate as normal, or carries out specific function.Briefly, CMOS SETUP can among the built-in CMOS SRAM, when power-off, then continue supply CMOSSRAM required electric power by the lithium battery on the motherboard with every data storing on motherboard.
One of BIOS very important function be the start selftest (power-on self-testing, POST).After computer power opened, the CPU of computer can control BIOS and carry out the POST function.The content that detects generally includes: the capacity check of storer, comprising legacy memory (Base Memory), extension storer (ExtendedMemory), extended storage (Expanded Memory) and other storer (as Shadow RAM) or the like; Replacement (Reset) detects; Keyboard detection; Interrupting (Interrupt) detects; Sequential (RTC) detects; Detection that display detects and BIOS carries out CMOS own or the like.
When each element that detects has fault to take place, the work of BIOS can stop, the servicing unit of motherboard setting just disengages the error code (Error Code) of a correspondence or sends error messages (Error Signals) this moment, informs the type that problem takes place to extraneous (user).The setting that each tame manufacturer of the type of error code and servicing unit has nothing in common with each other.Usually BIOS itself just has control and sends the gurgle function of sound of mistake, with the length of serge sound, ring numerical table and show type of error.
Wherein, (the relatively complicated sound of more type of error needs is set because the type of error that tantara can effectively be represented is limited, yet too Fu Za sound setting can make the user be difficult for distinguishing), therefore, some manufacturers provide Debug Card (Debug Card), cooperate the display system mistake of the display lamp of being installed (being generally LED).
The position of Debug Card is provided with the content setting that generally depends on BIOS.Common method is, allows BIOS that error detecting code is sent to 378 ends, that is is sent in order to connect the end arranged side by side (parallel port) of printer, then Debug Card is inserted on the end arranged side by side (parallel port).When mistake takes place, just can show corresponding to the cresset of error detecting code.The method that also has is that Debug Card is plugged in the slot of the industrial standard system architecture (ISA) of motherboard or peripheral element interconnection (PCI).Because computer has moved towards compact trend now, so in order to reduce volume and to reduce cost, cause the slot of end arranged side by side (parallel port), industrial standard system architecture (ISA) and peripheral element interconnection (PCI), will not see again in the computer, especially notebook computer.So having other method to be suggested addresses this problem, system sees through the pin position of appointment on computer motherboard, System Management Bus (SMBus) control wafer is connected with Debug Card, when test, the test data that CPU (central processing unit) (CPU) is sent out, in the mode of sequence, test data is sent on the Debug Card that is connected with System Management Bus (SMBus) control wafer, to show the debug result.Wherein, System Management Bus (SMBus) is made up of data (Data) and two lines of clock (Clock).Debug Card is connected in end arranged side by side (parallelport) or sequence end (serial port) respectively has its relative merits, sequence end (serial port) is held the less hardware space of (parallel port) demand more side by side; Transmitting under certain data volume situation, sequence end (serial port) is held the long time of (parallel port) demand more side by side.
Summary of the invention
In view of this, the present invention proposes a kind of method and device that shows the debugging computer system result, the advantage that has sequence end (serial port) concurrently and hold (parallel port) side by side.Method of the present invention is, when debug display circuit (can be Debug Card) when existing, by System Management Bus, in the mode of sequence, test data is sent to the debug display circuit, changes this debug result by this debug display circuit; When the debug display circuit does not exist, test data is not sent to the debug display circuit, to reduce the time delay of computer system boot-strap.
In order to reach above-mentioned purpose, the computer system that the present invention proposes comprises: the main frame body at least; Control wafer; System Management Bus; Output terminal; And, output terminal control wafer group.It is characterized in that: also comprise a selecting arrangement, be arranged between System Management Bus and this output terminal; Behind this launch computer, there is a debug display circuit to couple arbitrary this output terminal of this computer system if detect, be first value then with an activation signal sets; In the initialized process of this computer system, if this enable signal is first value, this selecting arrangement is connected to this output terminal with System Management Bus, makes the debug signal of this computer system be exported to this output terminal, is converted to this debug result by this debug display circuit.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
Description of drawings
Fig. 1 is the configuration diagram of the computer system of the embodiment of the invention.
The selector switch device architecture synoptic diagram of Fig. 2 embodiment of the invention.
Fig. 3 is the process flow diagram of the inventive method.
Embodiment
Embodiment one, and the configuration diagram as Fig. 1 shows computer system 1 of the present invention (for example be notebook computer, but be not limited to this) comprises at least: main frame body (comprise CPU (central processing unit) 11, peripheral device 10, reach control wafer 12 etc.); Output terminal control wafer group 16; Output terminal 18 (for example being USB); Selecting arrangement 22; First switchgear 24; Second switch device 26; And, debug display circuit 20.Wherein, computer system 1 of the present invention is that: CPU (central processing unit) 11 is seen through enable signal line S2, with control selecting arrangement 22, first switchgear 24, and the action of second switch device 26; Control wafer 12 sees through System Management Bus S1 and sends the debug signal to output terminal 18 and debug display circuit 20.Wherein, enable signal line S2 can be general objects input and output (GPIO, General purpose inputouput) signal line.
After computer system 1 start, detect debug display circuit 20 earlier and whether be present in the computer system 1, in this embodiment, have a debug display circuit 20 to couple the output terminal 18 of this computer system 1, then an activation signal S2 is set at first value.Enable signal S2 is set at first value, and then selecting arrangement 22 makes 24 conductings of first switchgear System Management Bus S1 see through this output terminal 18 and is connected to debug display circuit 20; Computer system 1 can detect its peripheral device, by System Management Bus S1, in the mode of sequence, test data is sent to debug display circuit 20, changes this debug result by this debug display circuit 20.
Embodiment two, and the configuration diagram as Fig. 1 has shown computer system 1 of the present invention (for example be notebook computer, but be not limited to this) comprises at least: main frame body (comprise CPU (central processing unit) 11, peripheral device 10, reach control wafer 12 etc.); Output terminal control wafer group 16; Output terminal 18 (for example being USB); Selecting arrangement 22; First switchgear 24; And, second switch device 26.Wherein, computer system 1 of the present invention is that: CPU (central processing unit) 11 is seen through enable signal line S2, with the action of control selecting arrangement 22, first switchgear 24 and second switch device 26.Wherein, enable signal line S2 can be general objects input and output (GPIO, General purpose input ouput) signal line.
Whether after computer system 1 start, detect debug display circuit 20 earlier and be present in the computer system 1, in this embodiment, do not have a debug display circuit 20 to couple the output terminal 18 of this computer system 1, be second value with an activation signal sets then.Enable signal S2 is set at second value, and then selecting arrangement 22 makes output terminal control wafer group 16 be connected to this output terminal 18 26 conductings of second switch device; Computer system 1 can detect its peripheral device, but not by System Management Bus S21, test data is sent to output terminal 18.
Among the above embodiment that carries, output terminal 18 can be the VGA display interface.
Fig. 2 is selector switch device embodiment of the present invention, comprising: reverser 211, reverser 212, metal-oxide-semiconductor (MOS) 221, metal-oxide-semiconductor (MOS) 222, metal-oxide-semiconductor (MOS) 223 and metal-oxide-semiconductor (MOS) 224.Wherein, reverser 211 and reverser 212 are selecting arrangement, and metal-oxide-semiconductor (MOS) 221 and metal-oxide-semiconductor (MOS) 222 are first switchgear, and metal-oxide-semiconductor (MOS) 223 and metal-oxide-semiconductor (MOS) 224 are the second switch device.When enable signal S2 is set at first value, 222 conductings of metal-oxide-semiconductor (MOS) 221 and metal-oxide-semiconductor (MOS) make among the embodiment that wins System Management Bus S1 see through this output terminal 18 and are connected to debug display circuit 20.When enable signal is set at second value, 224 conductings of metal-oxide-semiconductor (MOS) 223 and metal-oxide-semiconductor (MOS) make that output terminal control wafer group 16 is connected to this output terminal 18 among second embodiment.
Fig. 3 is the process flow diagram of the inventive method.Behind step 310 computer system boot-strap, switch to the debug display circuit in step 320, wherein commutation circuit is that BIOS utilizes general objects input and output (GPIO) signal line that circuit is done switching, after circuit switches to the debug display circuit, whether detect the debug display circuit in step 330 exists, if the debug display circuit exists, then BIOS is in BIOS Data Area or CMOS, flag (flag) value is made as 1, and circuit remained on the debug display circuit loop, if the debug display circuit does not exist, then flag value is made as 0, and in step 340 the circuit switching is fed back out terminal circuit.Step 350 is POST a making peripheral device just, if flag value is 1, then shows and removes error code in step 360, and be 0 as if flag value, then do not show and remove error code in step 370; Then judge in step 380 whether computer system finishes initialization,, then finish initialization action,, then get back to step 350 and continue the initialization peripheral device if do not finish initialization in step 390 if finish initialization.
See through demonstration debugging computer system result's of the present invention method and device, in computer system boot-strap test peripheral device program, detect the debug display circuit earlier and whether be present in the computer system, can determine whether when start, to export and remove error code, to reduce the time delay of start.
Though the present invention describes with reference to current specific embodiment, but those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, under the situation that does not break away from spirit of the present invention, also can make the variation and the modification of various equivalences, therefore, as long as variation, the modification to the foregoing description all will drop in the scope of claims of the present invention in connotation scope of the present invention.
Claims (11)
1. method that shows the debugging computer system result comprises:
This computer system has a debug display circuit to couple a both set output terminal of this computer system if detect after starting, and is first value with an activation signal sets then;
This computer system sees through the driving of this enable signal in initialized process, make the debug signal of this computer system export this both set output terminal to, changes this debug result by this debug display circuit.
2. demonstration debugging computer system result's as claimed in claim 1 method, it is characterized in that, one selecting arrangement is provided, be located between the System Management Bus and this output terminal of this computer, when this enable signal is set at this first value, this selecting arrangement is coupled to this both set output terminal with this management bus, makes this debug signal export this output terminal to.
3. demonstration debugging computer system result's as claimed in claim 2 method is characterized in that, this enable signal is a flag value.
4. demonstration debugging computer system result's as claimed in claim 2 method is characterized in that, this output terminal is the universal serial bus end.
5. demonstration debugging computer system result's as claimed in claim 2 method is characterized in that, this output terminal is the VGA signal output part.
6. demonstration debugging computer system result's as claimed in claim 1 method is characterized in that, if detect this debug display circuit is not arranged, and then this enable signal is set at second value, does not export this debug signal to this both set output terminal, does not also show this debug result.
7. a computer system device can see through output terminal the debug result of system is exported demonstration when testing, and comprises at least: the main frame body; One control wafer; System Management Bus; One output terminal; And, output terminal control wafer group;
It is characterized in that: also comprise a selecting arrangement, be arranged between System Management Bus and this output terminal;
Behind this launch computer, there is a debug display circuit to couple arbitrary this output terminal of this computer system if detect, be first value then with an activation signal sets; In the initialized process of this computer system, if this enable signal is first value, this selecting arrangement is connected to this output terminal with System Management Bus, makes the debug signal of this computer system be exported to this output terminal, is converted to this debug result by this debug display circuit.
8. computer system device as claimed in claim 7 is characterized in that, this enable signal is a flag value.
9. computer system device as claimed in claim 7 is characterized in that, this output terminal is the universal serial bus end.
10. computer system device as claimed in claim 7 is characterized in that, this output terminal is the VGA signal output part.
11. computer system device as claimed in claim 7 is characterized in that, this selecting arrangement comprises: first switchgear is arranged between this System Management Bus and this output terminal; The second switch device is arranged between this output terminal control wafer group and this output terminal; When this enable signal is set at first value, this first switchgear conducting, otherwise this second switch device conducting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310119922 CN1622048A (en) | 2003-11-24 | 2003-11-24 | Method and apparatus for displaying computer system debugging result |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200310119922 CN1622048A (en) | 2003-11-24 | 2003-11-24 | Method and apparatus for displaying computer system debugging result |
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| CN1622048A true CN1622048A (en) | 2005-06-01 |
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| CN 200310119922 Pending CN1622048A (en) | 2003-11-24 | 2003-11-24 | Method and apparatus for displaying computer system debugging result |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930308B (en) * | 2009-06-19 | 2012-07-25 | 炬力集成电路设计有限公司 | Method and device for resetting drive circuit of touch input device |
| CN104035844A (en) * | 2013-03-04 | 2014-09-10 | 联想(北京)有限公司 | Fault testing method and electronic device |
| CN104077203A (en) * | 2014-07-16 | 2014-10-01 | 合肥联宝信息技术有限公司 | Method and device for diagnosing computer hardware through USB interface |
| CN104182309A (en) * | 2013-05-23 | 2014-12-03 | 英业达科技有限公司 | Debugging device and debugging method |
-
2003
- 2003-11-24 CN CN 200310119922 patent/CN1622048A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930308B (en) * | 2009-06-19 | 2012-07-25 | 炬力集成电路设计有限公司 | Method and device for resetting drive circuit of touch input device |
| CN104035844A (en) * | 2013-03-04 | 2014-09-10 | 联想(北京)有限公司 | Fault testing method and electronic device |
| CN104182309A (en) * | 2013-05-23 | 2014-12-03 | 英业达科技有限公司 | Debugging device and debugging method |
| CN104077203A (en) * | 2014-07-16 | 2014-10-01 | 合肥联宝信息技术有限公司 | Method and device for diagnosing computer hardware through USB interface |
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Application publication date: 20050601 |