CN1599241A - Receiving circuit - Google Patents
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- CN1599241A CN1599241A CN200410078654.2A CN200410078654A CN1599241A CN 1599241 A CN1599241 A CN 1599241A CN 200410078654 A CN200410078654 A CN 200410078654A CN 1599241 A CN1599241 A CN 1599241A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
- H03G1/0023—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier in emitter-coupled or cascode amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G11/00—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
- H03G11/08—Limiting rate of change of amplitude
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3052—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
- H03G3/3063—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver using at least one transistor as controlling device, the transistor being used as a variable impedance device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G2201/00—Indexing scheme relating to subclass H03G
- H03G2201/10—Gain control characterised by the type of controlled element
- H03G2201/103—Gain control characterised by the type of controlled element being an amplifying element
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G2201/00—Indexing scheme relating to subclass H03G
- H03G2201/20—Gain control characterized by the position of the detection
- H03G2201/206—Gain control characterized by the position of the detection being in radio frequency
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G2201/00—Indexing scheme relating to subclass H03G
- H03G2201/30—Gain control characterized by the type of controlled signal
- H03G2201/307—Gain control characterized by the type of controlled signal being radio frequency signal
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- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
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Abstract
In a receiving circuit, an antenna 11 receives a high-frequency signal at a predetermined frequency band, a level changing section 13 changes a signal level of the high-frequency signal received by the antenna, a subsequent-stage circuit 14 performs predetermined signal processing for the high-frequency signal whose signal level is changed at the level changing section 13, a detecting section 32 detects a signal level of the high-frequency signal for which the signal processing is performed by the subsequent-stage circuit 14, and a control section 33 sets a rate of change of the high-frequency signal by the level changing section 13, based on the signal level of the high-frequency signal detected by the detecting section 32, so that the signal level of the high-frequency signal detected by the detecting section 32 does not exceed a predetermined value.
Description
Background of invention
Technical field
The present invention relates to receiving circuit, more specifically, relate to the receiving circuit that is used for radio communication device.
Background technology
Below, the receiving circuit that is used for conventional wireless communications devices is described with reference to the accompanying drawings.Conventional wireless communications devices comprises for example mobile phone and PHS.Herein, the calcspar of Fig. 8 demonstrates the structure of the receiving circuit of conventional wireless communications devices.
The receiving circuit of radio communication device as shown in Figure 8 comprises antenna 111, amplifier 113, band limiting filter 114, freq converting circuit 115, local oscillator 116, band limiting filter 117, freq converting circuit 118 and local oscillator 119.Below will the operation of the receiving circuit of relevant above-mentioned radio communication device be described briefly.
At first, receive high-frequency signal by antenna 111.The high-frequency signal that is received is after amplifier 113 amplifies, and the high-frequency signal of amplification passes through band limiting filter 114, and is imported into freq converting circuit 115, and band limiting filter 114 is designed to only by required signal band.Next, by freq converting circuit 115, high-frequency signal is mixed with first oscillation signals according of exporting from local oscillator 116.Thereby, convert high-frequency signal to first intermediate-freuqncy signal.Then, first intermediate-freuqncy signal is imported into freq converting circuit 118 by after the band limiting filter 117.By freq converting circuit 118, first intermediate-freuqncy signal is mixed with second oscillation signals according of exporting from local oscillator 119.Thereby, convert first intermediate-freuqncy signal to second intermediate-freuqncy signal.Then, by the circuit that is connected to the back level second intermediate-freuqncy signal is carried out multiple processing.By above-mentioned processing, convert high-frequency signal to second intermediate-freuqncy signal.
When the user carries the walking of above-mentioned radio communication device and during near the base station, radio communication device receives the high-frequency signal of high electric field strength.In this situation, the signal level of the high-frequency signal of reception is well beyond the out-put dynamic range of freq converting circuit 115.Thereby freq converting circuit 115 operates in the saturation region, has therefore damaged the receiving feature of the receiving circuit of radio communication device.
For addressing the above problem, have the receiving circuit of radio communication device as shown in Figure 9.The receiving circuit of this radio communication device additionally comprises a variable attenuator 112 between antenna 111 and amplifier 113.Signal level according to received signal is carried out FEEDBACK CONTROL, with the attenuation in the control variable attenuator 112.Thereby might prevent that signal level is input to freq converting circuit 115 well beyond the signal of freq converting circuit 115 dynamic ranges.Below, the receiving circuit of above-mentioned radio communication device is described with reference to Fig. 9.
The receiving circuit of this radio communication device comprises antenna 111, variable attenuator 112, amplifier 113, band limiting filter 114, freq converting circuit 115, local oscillator 116, band limiting filter 117, freq converting circuit 118, local oscillator 119 and gain control part 121.Below the operation of the receiving circuit of this radio communication device will be described briefly.
At first, by antenna 111, amplifier 113, band limiting filter 114, freq converting circuit 115, local oscillator 116, band limiting filter 117, freq converting circuit 118, identical with the operation of their corresponding parts in receiving circuit as shown in Figure 8 with the operation that local oscillator 119 is performed, the descriptions thereof are omitted at this.
To be input to gain control part 121 from second intermediate-freuqncy signal of frequency change-over circuit 118 outputs.121 pairs second intermediate-freuqncy signals of gain control part are carried out rectification to obtain direct current.Here, variable attenuator 112 is controlled attenuation by using the direct current that is obtained as gain control signal.Particularly, variable attenuator 112 increases or reduces attenuation according to the level of gain control signal.Therefore, receiving circuit can change the level of received signal.
Therefore, have in input under the situation of received signal of high electric field strength, or in the interference signal of having imported in band limiting filter 117 frequency bands, and the frequency band of band limiting filter 117 is than under the narrower situation of the frequency band of band limiting filter 114, because the control of variable attenuator 112, increase the signal level of second intermediate-freuqncy signal, thereby increased direct voltage (gain control signal).Therefore, increased the attenuation in the variable attenuator 112, guaranteed the dynamic range of freq converting circuit 115, thereby prevented that freq converting circuit 115 from operating in (for example, referring to Japanese Laid-Open Patent Application No.H10-126301) in the saturation region.
Note, except that foregoing invention, also have receiving circuit as the radio communication device that in Japanese pending application application publication number No.H10-93367 or Japanese pending application application publication number No.H5-335857, is disclosed.
Yet there is following problem in receiving circuit as shown in Figure 9.The output signal level that gain control part 121 detects from 118 outputs of frequency change-over circuit, and carry out AGC (automatic gain control).Like this, under the situation that has received the interference signal that is in the high signal level outside band limiting filter 117 frequency bands, gain control part 121 is not carried out the AGC operation, hereinafter with reference to accompanying drawing this is described in detail.Figure 10 demonstrates the schematic diagram of the high-frequency signal that includes interference signal.Wherein, transverse axis is represented frequency, and the longitudinal axis is represented signal level.
Usually, amplifier 113 and freq converting circuit 115 need to handle a plurality of signals of frequency band separately that have.Particularly, band limiting filter 114 signal that allows to have as shown in figure 10 frequency band f1 to f3 separately is by wherein.
On the other hand, band limiting filter 117 only extracts required frequency acceptance band.Specifically, import under the situation of signal as shown in figure 10, band limiting filter 117 only makes required signal (frequency f 2) pass through.Thereby, receive the high-frequency signal that includes interference signal (frequency f 3) as shown in figure 10 at receiving circuit, and the signal level of interference signal is higher than under the situation of desired signal, only required signal (frequency f 2) is outputed to gain control part 121.In this situation, should carry out gain controlling based on the signal level of the interference signal with highest signal level (frequency f 3).Yet gain controlling is based on that the intensity of desired signal (frequency f 2) carries out, and the signal level of desired signal is lower than the signal level of interference signal (frequency f 3).Thereby, the high-frequency signal that includes the interference signal (frequency f 3) that is not enough decayed can be input to freq converting circuit 115, thereby because freq converting circuit 115 operates in the saturation region, and damaged the receptivity of receiver.
Except that the problems referred to above, receiving circuit as shown in Figure 9 also is difficult to reduce power consumption, and which will be described below.
For example, under near the situation radio communication device is in the base station, it is higher relatively that the electric field strength of desired signal becomes.In this situation, by attenuator 112, the level of the received signal of amplifier 113 and freq converting circuit 115 can not change.
Yet in receiving circuit as shown in Figure 9, even the electric field strength of desired signal is very high, amplifier 113 also will amplify received signal with predetermined constant gain and current value.Thereby in receiving circuit as shown in Figure 9, even because of sufficiently high electric field strength there is no need to carry out processing and amplifying, amplifier 113 also can use constant gain and electric current to carry out amplification, and this causes power consumption unnecessary in receiving circuit.
And, except that above-mentioned two problems, in receiving circuit as shown in Figure 9,, the receiving sensitivity of receiving circuit is reduced owing between antenna 111 and amplifier 113, inserted variable attenuator 112.
As shown in Figure 9, in traditional receiving circuit, variable attenuator 112 is between antenna 111 and the amplifier 113.In this situation,, therefore in variable attenuator 112, there is loss of signal up to about 0.5dB because the insertion loss of parts itself and parts insert caused loss in the signal transmssion line.Such loss of signal will cause low SNR (signal to noise ratio).Particularly, by using the circuit after amplifier 113, be difficult to the low SNR that is caused in the circuit of compensation before amplifier 113.To describe this problem in detail below.The following total NF (noise factor) that describes a plurality of circuit that cascade is provided with as an example (after this is designated as NF
Total).NF represents the ratio of input signal SNR and output signal SNR.Particularly, NF represents with following formula:
NF＝(S
in/N
in)/(S
out/N
out)
In these cases, NF
TotalProvide by following formula: NF
Total=NF1+ (NF2-1)/G1+ (NF3-1)/(G1*G2)+....Notice that NF1 represents the NF of first order circuit, G1 represents the gain of first order circuit.And NF2 represents the NF of second level circuit, and G2 represents the gain of second level circuit.In addition, NF3 represents the NF of tertiary circuit, and G2 represents the gain of tertiary circuit.
Herein, the total NF that supposes not occur the circuit of loss in the amplifier previous stage is NF
Total1, set up following equation.
NF
total1＝NF1+(NF2-1)/G1+(NF3-1)/(G1*G2)+...
On the other hand, the total NF that supposes to occur the circuit of loss in the amplifier previous stage is NF
Total2, set up following equation.Notice that NF0 represents the NF of amplifier previous stage circuit, G0 represents the gain of amplifier previous stage circuit.
NF
total2＝NF0+(NF1-1)/G0+(NF2-1)/(G0*G1)+(NF3-1)/(G0*G1*G2)+...
Suppose that the loss in the amplifier previous stage is 0.5dB herein.In this situation, NF0=0.5dB, and G0=-0.5dB.Like this, occur in the circuit of loss in the last circuit of amplifier, because G0 is equal to or less than 1, not only adds NF0, but also a NF1 is increased progressively, this causes lower NF
Total2Even for avoiding NF
Total2Reduce and improve NF in the circuit subsequently, because the NF and 1/ (G0*G1) that improves multiplies each other entire circuit NF
Total2The raising effect also be greatly diminished.
Therefore, the loss in amplifier 113 previous stage causes low SNR, and also is difficult to compensate so low SNR in amplifier 113 back levels.Thus, the receiving sensitivity of radio communication device is reduced greatly.
Summary of the invention
Therefore, an object of the present invention is to provide the wherein receiving circuit of the radio communication device of freq converting circuit inoperation in the saturation region.
Another object of the present invention provides the receiving circuit of the radio communication device that can reduce power consumption.
Another purpose of the present invention provides the receiving circuit that occurs the radio communication device of loss in the received signal that can avoid in the amplifier prime.
For obtaining above-mentioned purpose, the present invention has following characteristic.
In receiving circuit according to the present invention, antenna receives the high-frequency signal of predetermined frequency band, level changes the signal level that parts change this high-frequency signal that is received by antenna, late-class circuit is to changing this high-frequency signal execution predetermined signal processing that the parts place has changed signal level at this level, detection part detects the signal level of carrying out this high-frequency signal of signal processing through this late-class circuit, and control assembly is based on the signal level of this high-frequency signal that is detected by this detection part, the change rate of this high-frequency signal is set, thereby makes the signal level of this high-frequency signal that detects by this detection part can not surpass a predetermined value.
Preferably, it is amplifier that level changes parts, and when the signal level of this high-frequency signal that detects by this detection part during greater than a predetermined threshold value, this control assembly is arranged to the gain littler than a predetermined value with the gain that this level changes parts, and when the signal level of this high-frequency signal that is detected by this detection part during less than this threshold value, this control assembly is arranged to this predetermined value with the gain that this level changes parts.
When the signal level of this high-frequency signal that detects by this detection part during greater than a predetermined threshold value, this control assembly produces than the little control signal of a predetermined level, and when the signal level of this high-frequency signal that is detected by this detection part during less than this threshold value, this control assembly produces has the control signal of this predetermined level.Amplifier comprises: the amplifier transistor of grounded emitter; Be used for applying the biasing circuit of bias voltage to this amplifier transistor base stage; The oxide-semiconductor control transistors that is connected with this amplifier transistor cascade; With the output circuit that is connected with the collector electrode of this oxide-semiconductor control transistors.This high-frequency signal that this amplifier transistor will be input to the base stage that has been applied in bias voltage amplifies.This oxide-semiconductor control transistors is controlled the gain of this amplifier transistor, thereby becomes the gain based on this control signal, and wherein this control signal produces and be input to base stage at this control assembly place.This output circuit output is from this high-frequency signal through amplifying of the collector electrode of this oxide-semiconductor control transistors.
And this detection part comprises: the level detection transistor, and the high-frequency signal of exporting from late-class circuit is imported into this transistorized emitter; Biasing circuit is used for applying predetermined bias to the transistorized base stage of this level detection; And output circuit, be used for converting high-frequency signal to direct current from the transistorized collector electrode output of this level detection.This level detection transistor is exported from the high-frequency signal that this collector electrode will be input to this emitter, and the signal level of this high-frequency signal is higher than the determined threshold value of predetermined bias voltage.When the direct current of this output circuit output certainly during greater than predetermined value, this control assembly produces the control signal less than predetermined level, and when from the direct current of this output circuit output during less than threshold value, this control assembly produces has the control signal of this predetermined level.
In addition, receiving circuit also can comprise: freq converting circuit is used for and will becomes the frequency lower than this high-frequency signal frequency from the frequency inverted of the high-frequency signal of late-class circuit output; And biasing circuit, link to each other with the input block of this freq converting circuit.This detection part detects the current sinking of this biasing circuit.
Preferably, this late-class circuit is to be used for only the signal in this predetermined frequency band being outputed to the band limiting filter of this detection part among this high-frequency signal of this level change parts output.
Preferably, this band limiting filter has and does not allow to output to the frequency characteristic of detection part from the transmission signal of transtation mission circuit output in the radio communication device.
Therefore, based on receiving circuit according to the present invention, the control assembly control level changes the change rate of parts, thereby makes the signal level of high-frequency signal be no more than predetermined value.Like this, might prevent that the signal that signal level is bigger than the dynamic range of the circuit that links to each other with level behind the receiving circuit is input in the circuit.Thereby, might improve the receptivity of the radio communication device of having used this receiving circuit.
In addition, level change parts are amplifier.And, when the signal level of the high-frequency signal that is detected by detection part is higher than predetermined threshold, control assembly is arranged to the gain littler than predetermined value with the gain that level changes parts, and when the signal level of the high-frequency signal that is detected by detection part was lower than predetermined threshold value, control assembly was arranged to predetermined value with the gain that level changes parts.Like this, when input had the high-frequency signal of high signal level, amplifier operated in lower gain.Thereby, might prevent with signal level greater than with receiving circuit after the signal of dynamic range of the circuit that links to each other of level be input to late-class circuit.
In addition, amplifier comprises amplifier transistor and oxide-semiconductor control transistors, and the gain and the electric current of oxide-semiconductor control transistors control amplifier transistor.Like this, oxide-semiconductor control transistors is used to control the gain and the electric current of amplifier transistor, thereby even the high-frequency signal that input has higher signal level also might be controlled the gain of amplifier transistor.And, owing to can reduce the current value that flows into amplifier transistor, might reduce the power consumption of receiving circuit integral body.
In addition, the level detection transistor is arranged in do not carry out the AGC operation and the time can not operate, thereby the receiving feature that might prevent receiving circuit is impaired.
In addition, circuit does not directly link to each other with signal transmssion line with element, thereby might prevent to make receiving feature impaired when not carrying out the AGC operation.
In addition, the signal in the predetermined frequency band is outputed to detection part, thereby the interference signal that comprised in the predetermined frequency band and required signal are outputed to detection part.Therefore, under the situation of signal level greater than the signal level of desired signal of interference signal, detection part detects the signal level of the high-frequency signal of the signal level that comprises interference signal.Like this, control assembly changes parts based on the signal level control level of above-mentioned high-frequency signal.Just, even receive interference signal, might prevent that also the signal level of the high-frequency signal that received from surpassing the dynamic range of receiving circuit with very high signal level.
In addition, band limiting filter has and does not allow to output to the frequency characteristic of detection part from the transmission signal of transtation mission circuit output in the radio communication device.Therefore, might prevent to carry out the AGC operation for the transmission signal that leaks into receiving circuit from transtation mission circuit.
In conjunction with the accompanying drawings, according to the back detailed description of the present invention, can be easier to understand these and other target, characteristic, aspect and advantage of the present invention.
Description of drawings
Fig. 1 is the calcspar of the structure of demonstration receiving circuit according to an embodiment of the invention;
Fig. 2 is the schematic diagram of the exemplary configurations of demonstration level sensitive circuit;
Fig. 3 A is for showing the schematic diagram of the signal waveform that is input to impedance component 63;
Fig. 3 B is for showing the output voltage V of biasing circuit 61
a, when the dynamic range of the amplitude overfrequency change-over circuit 15 of input signal, be input to the level of input signal of emitter and the base-emitter voltage V during when transistor 64 conductings
BeBetween the schematic diagram of relation;
Fig. 4 is the schematic diagram of the exemplary configurations of an amplifier of demonstration;
Fig. 5 is for the signal level that shows the input signal be input to amplifier and the schematic diagram of the current value of the signal after amplifying;
Fig. 6 is the schematic diagram of another exemplary configurations of demonstration level sensitive circuit;
Fig. 7 is the waveform of the base voltage of demonstration transistor 78 and the schematic diagram of the waveform of the electric current that flows through biasing circuit 71;
Fig. 8 is the calcspar of the structure of a kind of traditional receiving circuit of demonstration;
Fig. 9 is the calcspar of the structure of another traditional receiving circuit of demonstration; And
Figure 10 is for showing the schematic diagram of the high-frequency signal that comprises interference signal.
Embodiment
Below, with reference to the accompanying drawings, the receiving circuit of radio communication device is according to an embodiment of the invention described.Fig. 1 is the calcspar of demonstration according to the structure of the receiving circuit of the radio communication device of present embodiment.
Receiving circuit as shown in Figure 1 comprises antenna 11, amplifier 13, band limiting filter 14, freq converting circuit 15, local oscillator 16, band limiting filter 17, level sensitive circuit 32, level control circuit 33 and signal processing circuit 41.
Antenna 11 is received from a plurality of high-frequency signals of base station (not shown) emission.According to the control of level control circuit 33, amplifier 13 will be amplified by the high-frequency signal that antenna 11 receives.Among the high-frequency signal that is received from antenna 11, band limiting filter 14 only will output to freq converting circuit 15 and level sensitive circuit 32 at the high-frequency signal in the frequency range that radio communication device can be handled.Local oscillator 16 produces the signal of preset frequency.Freq converting circuit 15 uses the signal of the preset frequency that is produced by local oscillator 16 (so-called super-heterodyne system), will convert intermediate-freuqncy signal to from the high-frequency signal of band limiting filter 14 outputs.
Among the intermediate-freuqncy signal of freq converting circuit 15 outputs, band limiting filter 17 only outputs to signal processing circuit 41 with the intermediate-freuqncy signal in preset frequency.41 pairs of signal processing circuits carry the intermediate-freuqncy signal of limit filter 17 outputs and carry out polytype signal processing.
Here, will describe as level sensitive circuit 32 and level control circuit 33 according to the feature of the receiving circuit of present embodiment.Based on output, detect the signal level of received signal according to the level sensitive circuit 32 of present embodiment from band limiting filter 14.Under the situation of signal level greater than predetermined level of received signal, level sensitive circuit 32 produces direct current, and the size of this direct current is consistent with the signal level of received signal.Level control circuit 33 converts the direct current of input to the control signal of the signal level with the operation control that is suitable for amplifier 13.Particularly, level control circuit 33 produces control signal, so that make the signal level of control signal become minimum under the situation of maximum direct current, makes the signal level of control signal become maximum under the situation of minimum direct current electric current.In other words, level control circuit 33 is changed the minimum and maximum value of direct current, to produce control signal.Notice that under the situation that output DC does not flow, level control circuit 33 outputs have the control signal of maximum signal level.Then, one of amplifier 13 usefulness depend on from the gain of the signal level of the control signal of level control circuit 33 inputs, received signal are amplified.
Therefore, under the situation of having imported intensity level little received signal than predetermined level, level sensitive circuit 32 and level control circuit 33 make amplifier 13 operate with the predetermined constant gain.On the other hand, under the situation of the big received signal of input intensity level ratio predetermined level, level sensitive circuit 32 and level control circuit 33 make amplifier 13 to operate less than the gain of predetermined constant gain.Thereby FEEDBACK CONTROL is carried out in the operation of pair amplifier 13, therefore, might prevent that the peak value of the received signal that detected by level sensitive circuit 32 is equal to or greater than the predetermined strength level.Therefore, might prevent that the received signal that signal level is very high is input to freq converting circuit 15, and prevent that freq converting circuit 15 from operating in the saturation region.In other words, the intermodulation and the intermodulation that are increased greatly by operated in saturation are minimized, thereby the receptivity that prevents radio communication device is impaired.
Below, with reference to the accompanying drawings, the detailed structure of level sensitive circuit 32 and level control circuit 33 is described.Herein, Fig. 2 is the schematic diagram of the exemplary detailed structure of demonstration level control circuit 33.
Level sensitive circuit 32 comprises biasing circuit 61, output circuit 62, impedance component 63 and transistor 64.Impedance component 63 links to each other with the holding wire that branches out from band limiting filter 14.In addition, the emitter of transistor 64 links to each other with the other end of impedance component 63.And the positive pole of biasing circuit 61 links to each other with the base stage of transistor 64.On the other hand, the minus earth of biasing circuit 61.And the collector electrode of transistor 64 links to each other with output circuit 62, and the output of output circuit 62 links to each other with level control circuit 33.
Notice that when transistor 64 conductings, the voltage of biasing circuit 61 is V
a, base-emitter voltage is V
Be
The operation of above-mentioned level control circuit 33 will be described below.
Signal by band limiting filter 14 is divided into two signals.A signal is input to freq converting circuit 15, and another signal is input to the emitter of transistor 64 after through the impedance component 63 with specified impedance.
Herein, the input to freq converting circuit 15 is clamped to the determined voltage of internal bias circuit.Thereby, the signal (that is, will be input to the signal of freq converting circuit 15 and impedance component 63) that carries limit filter output is superimposed upon on the bias voltage of internal bias circuit of freq converting circuit 15.Such signal has the waveform as shown in Fig. 3 A.Notice that Fig. 3 A is the schematic diagram that shows the waveform of the signal that is input to impedance component 63.Wherein, the longitudinal axis is represented electromotive force, the transverse axis express time.
In addition, the output voltage V of biasing circuit 61
aImpose on the base stage that detects transistor 64.Can use the output voltage V of biasing circuit 61
aThe incoming level that will detect is set.Particularly, determine the output voltage of biasing circuit 61, so that it is higher than the lower limit with the corresponding signal amplitude of electric field strength of required detection.By voltage V
Be(voltage of turn-on transistor 64) is superimposed upon electric field strength on the output voltage of internal bias circuit of freq converting circuit 15.Therefore, amplitude greater than with the corresponding signal amplitude of the electric field strength of required detection (promptly, the electric field strength that exceeds the dynamic range of freq converting circuit 15) signal is input under the situation of transistor 64, transistor 64 conductings, and collector current flows through output circuit, and this will utilize accompanying drawing to be described in detail.Fig. 3 B is for showing the output voltage V of biasing circuit 61
a, when the dynamic range of the amplitude overfrequency change-over circuit 15 of input signal, be input to the level and the base-emitter voltage V during when transistor 64 conductings of the input signal of emitter
BeBetween relation.Notice that the longitudinal axis is represented electromotive force, the transverse axis express time.
The output voltage V of biasing circuit 61 at first, is set
a, so that be in the electromotive force (its electric field strength is just above the dynamic range of freq converting circuit 15) and the V of the amplitude bottom of input signal
a-V
BeConform to.In this situation, be turn-on transistor 64, base-emitter voltage should be V
BeJust, the electromotive force of emitter should be equal to or less than V
a-V
Be
Herein, under the situation of amplitude less than the amplitude of signal shown in Fig. 3 B of input signal, the electromotive force of the emitter of transistor 64 can not become and compare V
a-V
BeLow.Thereby, can turn-on transistor 64, and do not have collector current and flow.
On the other hand, the amplitude of input signal greater than situation just above the amplitude of the dynamic range of freq converting circuit 15 under, the emitter electromotive force of transistor 64 can not become and compare V
a-V
BeLow.Just, base-emitter voltage becomes and compares V
BeGreatly, and make transistor 64 conductings.Thereby during the period that is expressed as the shadow region shown in Fig. 3 B, size depends on that the collector current of signal amplitude flows through output circuit 62.
Below, with reference to the accompanying drawings, the physical circuit of the amplifier 13 that control is described.Fig. 4 is the schematic diagram of the particular circuit configurations of display amplifier 13
Received signal is imported into the base stage of transistor 56.Notice that the base stage of transistor 56 links to each other with the biasing circuit 51 that is used for driving transistors 56 by the impedance component 52 with specified impedance.By impedance component 53, with the grounded emitter of amplifier transistor 56 with specified impedance.The collector electrode of transistor 56 and shared public connection of the emitter of transistor 57.Just, transistor 56 is connected each other with so-called cascade with transistor 57 joins.In addition, by output circuit 54, will output to band limiting filter 14 from the signal that the collector electrode of transistor 57 is exported.Notice that output circuit 54 is for example realized by a coil or a resistance.Be input to the base stage of transistor 57 from the control signal of level control circuit 33 outputs.And output circuit 54 is connected with constant voltage source.
In above-mentioned amplifier 13, electric current flows to the ground under the emitter that is in transistor 56 from constant voltage source.Then, the input signal that transistor 56 will be input to base stage amplifies, and transistor 57 bases are controlled the gain of transistor 56 from the level of the control signal of level control circuit 33.Thereby, from the signal level of the input signal of output circuit 54 outputs through amplifying.The concrete operations of amplifier 13 will be described below.At first, description standard is operated.Herein, " standard operation " is meant that the intensity at the signal that is received by antenna 11 is no more than under the situation of dynamic range of freq converting circuit 15, the operation that amplifier 13 is performed.
At first, will be set to suitable value from the output voltage (base voltage of transistor 57) of level control circuit 33, so that transistor 56, transistor 57 and output circuit 54 can not operate in the saturation region.Received signal is amplified by transistor 56, and is imported into the emitter of transistor 57.Then, will output to band limiting filter 14 from the signal of the collector electrode of transistor 57 output by behind the output circuit 62.Just, amplifier 13 will amplify with predetermined gain from the signal of antenna 11 outputs, and this amplifying signal is outputed to band limiting filter 14.
Below, will be described under the situation of dynamic range of level overfrequency change-over circuit 15 of the signal that is received by antenna 11 operation that amplifier 13 is performed.
At first, under the situation of signal level overfrequency change-over circuit 15 dynamic ranges of the signal that receives by antenna 11, lower when the electromotive force of the control signal of level control circuit 33 outputs becomes than standard operation.When the electromotive force that reduces from the control signal of level control circuit 33 outputs, can reduce the electromotive force of the collector electrode of transistor 56, and amplifier transistor 56 begins to operate in the saturation region.When starting operated in saturation, current-amplifying factor (h
FE=I
c/ I
b) can reduce, make signal level reduction, thereby reduce gain from the collector electrode output of transistor 56.And the base current of transistor 56 increases because of operated in saturation, and this can produce bigger voltage drop in impedance component 53, and base potential is reduced.Thereby, reduce to flow through the electric current of emitter.Just, the electric current that flows through transistor 56 is reduced simultaneously with gain.Therefore, based on amplifier 13, might come the gain and the electric current of oxide-semiconductor control transistors 56 by the base potential of oxide-semiconductor control transistors 57 according to present embodiment.
Noting, be input under the situation of amplifier 13 in the received signal of level greater than threshold value, is to reduce gain and electric current simultaneously, can use the circuit of the output voltage that is used to reduce biasing circuit 51 to replace as shown in Figure 4 circuit.But, such circuit has the shortcoming that the upper limit that makes the level that can reduce the gain and the received signal of electric current is restricted, and this is described in detail with reference to Fig. 5.
As mentioned above, be input under the situation of amplifier 13, reduce the gain of transistor 56 by the output voltage that reduces biasing circuit 51 in the received signal of level greater than threshold value.Under the situation of the output voltage that reduces biasing circuit 51 by such method, the output voltage of biasing circuit 51 is 0V.In this situation, as shown in Figure 5, be input at the signal that surpasses voltage VQ1 (amplifier transistor 56 is operated with this voltage) under the situation of base stage of transistor 56, during input surpasses the signal of voltage VQ1, amplifier transistor 56 is operated, and exports through amplifying signal to late-class circuit.If the level of input signal further increases, then can not carry out gain controlling, thereby when output meeting current sinking during corresponding to the signal of the signal level that increases.
As mentioned above, based on the receiving circuit according to present embodiment, according to the output from band limiting filter 14, pair amplifier 13 is carried out FEEDBACK CONTROL.The signal that carries 14 outputs of limit filter comprises interference signal and required signal.Like this, under the situation of its signal level of input greater than the interference signal of desired signal, receiving circuit can detect wherein interference signal level and the combined signal level of desired signal level, and carries out AGC based on the signal level that is detected.Thereby, different with traditional receiving circuit, under the situation of having imported the interference signal also stronger, there is not the problem of not carrying out AGC owing to can not detect the signal level of interference signal than desired signal.Just, might prevent that the signal higher than dynamic range is input to freq converting circuit 15.Thereby, might improve the receptivity of receiving circuit.
In addition, based on receiving circuit, the power consumption of receiving circuit is minimized according to present embodiment.In traditional receiving circuit, even receive the very high signal of signal level, amplifier 13 also can amplify received signal with constant gain and electric current.On the other hand, based on the receiving circuit according to present embodiment, under the situation that receives the very high signal of signal level, by reducing gain and electric current, amplifier 13 amplifies received signal to have suitable intensity.Just,, might reduce to flow through the current value of amplifier 13, thereby the power consumption of receiving circuit is minimized based on receiving circuit according to present embodiment.
In addition, based on receiving circuit, between antenna 11 and amplifier 13, variable attenuator is not set, thereby avoids the loss that existence caused because of variable attenuator according to present embodiment.
In addition,, in weak electric field area, end, the influence to high frequency characteristics (especially limiting the noise characteristic of receiving sensitivity) is minimized owing to detect transistor 64 based on receiving circuit according to present embodiment.
Note,, suppose that the gain of control signal pair amplifier 13 is controlled, but the present invention is not limited to this based on receiving circuit according to present embodiment.Control signal also can select to control the attenuation that is provided at the variable attenuator between amplifier 13 and the antenna 11 in addition.But, in this situation, can not solve the insertion loss problem of the variable attenuator that under the situation of the attenuation of controlling variable attenuator, occurs.
Note, in the present embodiment, suppose that level sensitive circuit 32 has structure as shown in Figure 2, but the present invention is not limited to this.Below, another exemplary configurations of level sensitive circuit 32 is described with reference to the accompanying drawings.Herein, Fig. 6 is the schematic diagram of another exemplary configurations of demonstration level sensitive circuit 32.
Level sensitive circuit 32 comprises, the pair of transistor 78 and 79 of forming differential amplifier, emitter and the shared public pair of transistor that is connected 83 of the collector electrode of transistor 78 and 84, impedance component 73 with specified impedance, and impedance component 73 links to each other with the emitter of transistor 78, impedance component 74 with specified impedance, and impedance component 74 links to each other with the emitter of transistor 79, with the shared public output circuit that is connected 76 of transistor 81 and 83 collector electrode, with the shared public output circuit that is connected 77 of transistor 82 and 84 collector electrode, impedance component 75 with specified impedance, and impedance component 75 and impedance component 73 that respectively has specified impedance and 74 shared public connections, impedance component 72 with specified impedance, and impedance component 72 links to each other with the base stage of transistor 78, with the shared public biasing circuit that is connected 71 of the base stage of impedance component 72 with specified impedance and transistor 79, with the level sensitive circuit 85 that links to each other with biasing circuit 71.
Impedance component 75 ground connection that have specified impedance herein.And, transistor 82 and 83 base stage and shared public connection of transistor 81 and 84 base stage, and local signal is input to aforementioned base.
Received signal is input to the base stage of transistor 78, and draws output signal from the collector electrode of transistor 78 and 79.This output signal is input to the emitter of transistor 81 and 82 and the emitter of transistor 83 and 84, and the local signal of the base stage of the base stage by being input to transistor 81 and 84 and transistor 82 and 83, and composite signal is carried out frequency inverted.To be input to output circuit 76 and 77 through the signal of frequency inverted, and it will be drawn.
Herein, Fig. 7 is the waveform of the base voltage of demonstration transistor 78 and the schematic diagram of the waveform of the electric current that flows through biasing circuit 71.By the impedance component 72 with specified impedance, the current conversion that will flow through biasing circuit 71 is the base voltage waveform of transistor 78.Herein, level sensitive circuit 85 is with the current value of biasing circuit 71 and at this threshold value (V that determines
Th) compare, and will be at threshold value (V
Th) under signal component output to gain control circuit 86.Gain control circuit 86 converts the signal component of input to depend on incoming signal level direct current, and with this direct current output.The output signal of gain control circuit 86 is used as the Amplifier Gain control signal that comprises gain control part, thereby makes up the AGC loop.
Under the situation of carrying out the AGC operation, the structure of level sensitive circuit as shown in Figure 6 can prevent directly linking to each other of level sensitive circuit and element and signal transmssion line, thereby might prevent to make characteristic impaired because of circuit insertion loss and parasitic antenna.Note, the level sensitive circuit 85 exportable signal components that exceed threshold value of present embodiment, and be not signal component under threshold value.
Note, might improve the receiving sensitivity of receiving circuit by changing to be provided with, thereby make the passband of band limiting filter 14 not comprise the transmission signal band.Detailed description is used to improve this method of receiving sensitivity below.
In recent years, can carry out the quantity cumulative year after year of the mobile phone of data transmission and reception simultaneously.Under the situation of carrying out the data transmission at the same time and receiving, great transmission signal leaks into receiving terminal from transmitting terminal.Thereby, above-mentioned transmission signal is carried out the AGC operation.In this case, even owing to more weak received signal there is no need the gain of step-down amplifier 13, when leaking the transmission signal that surpasses the signal level of carrying out the AGC operation, carry out the AGC operation, thereby make it can not receive received signal from transmit block.
Like this, change is arranged so that the passband of band limiting filter 14 does not comprise the transmission signal band, thereby prevents from the transmission signal that leaks into receiving-member from transmit block is carried out the AGC operation.
Can prevent that according to receiving circuit of the present invention freq converting circuit from operating in the saturation region, and can be used as receiving circuit of radio communication device etc.
Although describe the present invention in detail, in every respect, more than describing only is schematic also indefiniteness.Should be appreciated that, under conditions without departing from the scope of the present invention, can carry out multiple other modifications and variations.
Claims (7)
1. receiving circuit that is used for radio communication device comprises:
Antenna is used to receive the high-frequency signal of predetermined frequency band;
Level changes parts, is used to change the signal level of this high-frequency signal that is received by this antenna;
Late-class circuit is used for change this high-frequency signal execution prearranged signal processing that the parts place has changed signal level at this level;
Detection part is used to detect the signal level of carrying out this high-frequency signal of signal processing through this late-class circuit; With
Control assembly is used for the signal level based on this high-frequency signal that is detected by this detection part, and the change rate of this high-frequency signal is set, thereby makes the signal level of this high-frequency signal that is detected by this detection part can not surpass a predetermined value.
2. according to the receiving circuit of claim 1, wherein,
It is amplifier that this level changes parts, and
When the signal level of this high-frequency signal that detects by this detection part during greater than a predetermined threshold value, this control assembly is arranged to the gain littler than a predetermined value with the gain that this level changes parts, and when the signal level of this high-frequency signal that is detected by this detection part during less than this threshold value, this control assembly is arranged to this predetermined value with the gain that this level changes parts.
3. according to the receiving circuit of claim 2,
Wherein, when the signal level of this high-frequency signal that detects by this detection part during greater than a predetermined threshold value, this control assembly produces the control signal littler than predetermined level, and when the signal level of this high-frequency signal that detects by this detection part during less than this threshold value, this control assembly produces has the control signal of this predetermined level
Wherein, this amplifier comprises:
The amplifier transistor of grounded emitter;
Be used for applying the biasing circuit of bias voltage to the base stage of this amplifier transistor;
The oxide-semiconductor control transistors that is connected with this amplifier transistor cascade; With
The output circuit that is connected with the collector electrode of this oxide-semiconductor control transistors,
Wherein, this high-frequency signal that this amplifier transistor will be input to the base stage that has been applied in bias voltage amplifies,
Wherein, this oxide-semiconductor control transistors is controlled the gain of this amplifier transistor, thereby becomes the gain based on this control signal, and wherein this control signal produces and be input to base stage at this control assembly place, and
Wherein, this output circuit output is from this high-frequency signal through amplifying of the collector electrode of this oxide-semiconductor control transistors.
4. according to the receiving circuit of claim 2,
Wherein, this detection part comprises:
The level detection transistor, the high-frequency signal of exporting from late-class circuit is imported into the transistorized emitter of this level detection;
Biasing circuit, it is used for applying a predetermined bias to the transistorized base stage of this level detection; With
Output circuit, it is used for converting the high-frequency signal from the transistorized collector electrode output of this level detection to direct current,
Wherein, this level detection transistor will be input to the high-frequency signal output of this emitter from this collector electrode, and the signal level of this high-frequency signal is higher than by the predetermined determined threshold value of bias voltage, and
Wherein, when the direct current of this output circuit output certainly during greater than a predetermined value, this control assembly produces the control signal less than a predetermined level, and when from the direct current of this output circuit output during less than this threshold value, this control assembly generation has the control signal of this predetermined level.
5. according to the receiving circuit of claim 2, also comprise:
Freq converting circuit, it is used for and will becomes the frequency lower than the frequency of this high-frequency signal from the frequency inverted of this high-frequency signal of this late-class circuit output; With
Biasing circuit, it links to each other with the input block of this freq converting circuit, wherein,
This detection part detects the current sinking of this biasing circuit.
6. according to the receiving circuit of claim 1, wherein, this late-class circuit is to be used for only the signal in this predetermined frequency band being outputed to the band limiting filter of this detection part among this high-frequency signal of this level change parts output.
7. according to the receiving circuit of claim 6, wherein, this band limiting filter has and does not allow to output to the frequency characteristic of this detection part from the transmission signal of transtation mission circuit output in the radio communication device.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP326684/2003 | 2003-09-18 | ||
| JP2003326684A JP2005094502A (en) | 2003-09-18 | 2003-09-18 | Reception circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1599241A true CN1599241A (en) | 2005-03-23 |
Family
ID=34308758
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200410078654.2A Pending CN1599241A (en) | 2003-09-18 | 2004-09-17 | Receiving circuit |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7386293B2 (en) |
| JP (1) | JP2005094502A (en) |
| CN (1) | CN1599241A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101167258B (en) * | 2005-04-27 | 2011-04-20 | 株式会社理光 | Automatic gain control method |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3447284A1 (en) * | 1984-12-24 | 1986-07-10 | Telefunken electronic GmbH, 7100 Heilbronn | RADIO RECEIVER |
| EP0298959B1 (en) * | 1986-04-03 | 1992-08-12 | Motorola, Inc. | Fm receiver with noise suppression during rayleigh faded received signals |
| JPH01129620A (en) * | 1987-11-16 | 1989-05-22 | Sanyo Electric Co Ltd | Radio receiver |
| JPH0338906A (en) * | 1989-07-05 | 1991-02-20 | Pioneer Electron Corp | Receiver |
| JPH0437317A (en) * | 1990-06-01 | 1992-02-07 | Toyo Commun Equip Co Ltd | Method for preventing suppression of sensitivity and crosstalk of receiver |
| CA2046413C (en) * | 1990-07-11 | 1994-01-04 | Shoichi Narahashi | Feed-forward amplifier |
| JP3207513B2 (en) | 1992-05-29 | 2001-09-10 | 株式会社東芝 | Wireless communication device |
| US5465406A (en) * | 1994-09-06 | 1995-11-07 | Ford Motor Company | Automatic gain control overshoot limiter for AM receiver |
| JPH1093667A (en) | 1996-09-13 | 1998-04-10 | Hitachi Commun Syst Inc | Handset off state detection and display method and telephone set |
| JP2993558B2 (en) | 1996-10-23 | 1999-12-20 | 日本電気株式会社 | Receiving machine |
| JPH10145250A (en) * | 1996-11-12 | 1998-05-29 | Nec Corp | Radio receiver |
| JPH11136154A (en) * | 1997-10-31 | 1999-05-21 | Sony Corp | Receiver |
| JP3185741B2 (en) * | 1998-02-24 | 2001-07-11 | 日本電気株式会社 | Radio selective call receiver |
| CN1146122C (en) * | 1999-02-24 | 2004-04-14 | 三菱电机株式会社 | Radio terminal |
| GB2363546B (en) * | 2000-06-14 | 2002-07-03 | Motorola Israel Ltd | Circuit and method for reducing local oscillator frequency transmission in a radio transceiver |
| US7085255B2 (en) * | 2000-10-19 | 2006-08-01 | Interdigital Technology Corporation | Selectively activated AGC signal measurement unit |
| US6670901B2 (en) * | 2001-07-31 | 2003-12-30 | Motorola, Inc. | Dynamic range on demand receiver and method of varying same |
-
2003
- 2003-09-18 JP JP2003326684A patent/JP2005094502A/en not_active Withdrawn
-
2004
- 2004-09-17 CN CN200410078654.2A patent/CN1599241A/en active Pending
- 2004-09-17 US US10/942,844 patent/US7386293B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101167258B (en) * | 2005-04-27 | 2011-04-20 | 株式会社理光 | Automatic gain control method |
Also Published As
| Publication number | Publication date |
|---|---|
| US20050064841A1 (en) | 2005-03-24 |
| JP2005094502A (en) | 2005-04-07 |
| US7386293B2 (en) | 2008-06-10 |
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