CN1547268A - Method for the manufacture of nanometer magnitude unit device in phase-change storage - Google Patents

Method for the manufacture of nanometer magnitude unit device in phase-change storage Download PDF

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Publication number
CN1547268A
CN1547268A CNA200310109372XA CN200310109372A CN1547268A CN 1547268 A CN1547268 A CN 1547268A CN A200310109372X A CNA200310109372X A CN A200310109372XA CN 200310109372 A CN200310109372 A CN 200310109372A CN 1547268 A CN1547268 A CN 1547268A
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alloy
preparation
layer
nanometer scale
unit component
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CN100356606C (en
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宋志棠
张挺
夏吉林
封松林
陈鲍尼
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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Abstract

The invention refers to a manufacturing method for nano grade unit device in the phase shift memory, which belongs to the micro electron field. The character of the invention lies in: a transition layer with 10-400nm thickness and a subjacent electrode with thickness of 50-400nm on the substrate; the upper electrode of 20-400 nm on the alloy layer with thickness of 10-1000nm is splattered with mask film with mesh hole size of 10-500nm, several poles can be acquired. Then carries on corrosion to the alloy layer, because the corrosion speed to the upper and the subjacent electrode and the alloy is different, the two electrodes won't be corroded; the shape of the corroded alloy layer is the two ends are thick and the middle part is thin. The structure has advantage to the phase shift of the phase shift alloy material, which just are the demands of the phase shift memory design. Finally, fillers are deposited on the sample, there forms a gap on the concave part of the middle part of the pole, and the gap has effect of restraining the insulation and the swelling in alloy layer phase shift. The alloy layer may be other shape.

Description

The preparation method of nanometer scale unit component in the phase transition storage
Technical field
The present invention relates to the preparation method of nanometer scale unit component in a kind of phase transition storage, be exactly furtherly to add that burn into is filled, the method for polishing prepares phase transition storage nanometer scale unit component in substrate, belong to the preparation technology of the nano-device in the microelectronics subject with mask.
Background technology
On some compound, add temperature and cooling time by changing, can realize the phase transformation (S.R.Ovshinsky:Phys.Rev.Lett.21 (1968) 1450) of compound, by the phase transformation of compound, its resistance is changed, utilize this phenomenon can prepare phase transition storage; Again because the continuity of resistance variations, even can design multi-level store, in case success it will cause revolution of memory industry.The resistance of sulphur systemization of having test-manufactured at present and the principle of thing random asccess memory (C-RAM) application chalcogenide compound reversible transition front and back is different and design, it and present dynamic random access memory (DRAM), flash memory (FLASH) has been compared remarkable advantages: volume is little, driving voltage is low, power consumption is little, read or write speed is very fast, non-volatile (Stenfa Lai (Inter), TylerLowrey (Ovonyx), " OUM-A 180nm Nonvolatile Memory Cell ElementTechnology For Stand Alone and Embedded Application).Intel Company just once foretold that C-RAM will replace FLASH, DRAM and SRAM, and C-RAM chip very F.F. is gone into market, and it will be widely applied in the fields such as portable type electronic product and Aero-Space.
Phase transition storage requires the phase-change alloy layer in the device will reach nanometer scale and is beneficial to reduce power consumption and increase capacity, and this is one of difficult problem of present phase transition storage (comprising C-RAM) research and development.Current microelectronics industry is in continuous development, utilizes the narrow linewidth of the present microelectronic technique of technology such as extreme ultraviolet can reach 0.09um.But the method equipment needed thereby costliness has greatly hindered the popular of this method.In addition, the report that does not still have other preparation nanometer scale phase transition storage methods.
Summary of the invention
The objective of the invention is to seek a kind of method for preparing the nanometer scale phase transition storage with low cost, to reach the purpose of reduction work energy consumption, raising integrated level, the access speed that improves, reduction operating voltage.
Preparation process of the present invention is as follows: earlier substrate is cleaned up, successively prepare transition zone, bottom electrode again in substrate, then preparation phase-change alloy layer (as Fig. 1, shown in 2) on top electrode; Select then it to be corroded at the caustic solution of alloy-layer, and upper/lower electrode and substrate are remained intact, and the phase-change alloy layer presents the thin shape in two pluckings centres, and the phase-change alloy material that middle thin structure helps the phase-change alloy layer carries out phase transformation (as shown in Figure 3); Fill insulation filler at last, form air-gap (as shown in Figure 4); With polishing machine unnecessary filler is skimmed, expose top electrode (as shown in Figure 5).
Preparation process is shown in Figure of description, specifically:
(1) substrate is cleaned up, preparation transition zone and bottom electrode in substrate are bonded at mask plate on the bottom electrode more earlier, then sputter phase-change alloy layer and top electrode.Preparation transition zone, bottom electrode, phase-change alloy layer and upper electrode layer adopt magnetron sputtering, or adopt electron beam evaporation, or adopt thermal evaporation, or adopt chemical vapour deposition (CVD), or adopt metallo-organic decomposition process, or adopt among the PECVD any one.Substrate is silicon chip, glass, GaAs, plastics or SiO 2In any one.Upper and lower electrode requires more stable, material be among W, TiW alloy, Ni, Pt, Au, Cu or the Al any one.The purpose of using transition zone is in order to strengthen the adhesive force of bottom electrode and substrate, also to help reducing simultaneously the roughness of bottom electrode, helping the carrying out of subsequent technique.Transition zone is Ti, TiO 2, in TiN or the TiW alloy any one.Usually the transition bed thickness is 10-400nm, and bottom electrode is 50-400nm, the very 20-400nm that powers on, and the phase-change alloy bed thickness is 10-1000nm, and surface roughness is lower than 2nm, and the diameter of mask plate hole is 10-500um, and the distance between the hole is 200nm-1cm.Motionless mask plate in preparation alloy-layer and top electrode process covers on the alloy-layer top electrode just.
(2) corrosion.After mask taken off, then corrode at the phase-change alloy layer, method is a dry etching, or is wet etching.In view of reasons such as " capillarity ", corrode very fast to alloy-layer centre position corrosion rate, so recessed inward in the alloy-layer middle part, thin two pluckings shapes (as shown in drawings) in the middle of having formed, and this shape more helps phase transformation.This is because the pluckings zone of the current density ratio that middle thin zone is passed through two is big, easier heating, thus cause phase transformation.
(3) fill and polish.Filler selects to take into full account the coupling between filler and the phase-change alloy material coefficient of thermal expansion, requires the thermal conductivity of filler good simultaneously, otherwise temperature can't in time reduce after reaching certain temperature generation phase transformation, will have influence on the crystallization situation of phase-change alloy.Adopt magnetron sputtering, or adopt electron beam evaporation, or adopt thermal evaporation, or adopt chemical vapour deposition (CVD), or adopt metallo-organic decomposition process, or adopt PECVD to prepare packed layer.As shown in drawings, partly fall at alloy-layer and to have formed the gap after the filling, gap or be gas or be vacuum that not only there is heat insulating function in the gap, can suppress the expansion of alloy material volume when phase transformation in addition.Owing to fill the very out-of-flatness of back substrate surface, top electrode also is filled thing and covers, so should adopt polishing that unnecessary filler is skimmed, top electrode is exposed, and the while also makes the surfacing of device.The phase-change alloy layer is column not necessarily, can be other shapes.As when being column, the upper and lower interelectrode area of column is 60nm 2~1um 2, highly be 30nm~2um.
Description of drawings
With the unit component is that cylinder is an example, does not represent that device shape only has cylinder a kind of in this patent.
Fig. 1 prepares transition zone and bottom electrode procedure chart
(a) clean substrate
(b) deposition transition zone
(c) on transition zone, deposit bottom electrode
Fig. 2 deposit alloy layer and top electrode obtain
(a) profile
(b) vertical view
Fig. 3 corrodes the back profile
Fig. 4 fills the back profile
Fig. 5 polishes the back profile
Among the figure: 1. substrate 2. transition zones 3. bottom electrodes 4. phase-change alloy layers 5. top electrode 6. gaps 7. fillers
Embodiment
Implement apart from substantive distinguishing features and the obvious improvement of further illustrating preparation method provided by the invention below by concrete.
Embodiment 1: have Ge 2Sb 2Te 5The phase transition storage nanometer scale device preparation method of phase-change alloy layer the steps include:
(1) silicon chip of selecting (100) to be orientated with acetone ultrasonic cleaning 5 minutes, to remove the greasy dirt that sticks on the silicon chip, is used deionized water rinsing earlier afterwards.Silicon chip is immersed in H 2O: H 2O 2: NH 4OH=5: boil in 1.5: 0.5 the mixed liquor and boil 10 minutes, use the deionized water rinsing silicon chip after making its natural cooling then; Again silicon chip is immersed in H 2O: HCl: H 2O 2=5: boil in 1: 1.5 the mixed liquor and boil 10 minutes, use deionized water rinsing behind the natural cooling.HF with 4% carries out processed to silicon chip.
(2) preparation of transition zone and bottom electrode.Diameter be 3 inches (100) orientation the Si sheet prepare TiO with magnetron sputtering method 2And W film, both are respectively by thickness: 10nm and 50nm; The local vacuum 10 of magnetron sputtering -7Below the Torr, the sputter vacuum is 0.67Pa, and sputtering power is 300W, and the effect of substrate transition zone can increase adhesive force, can stop silicon atom to W layer and alloy-layer diffusion simultaneously, helps reducing the roughness of bottom electrode and alloy-layer, improves device performance.
(3) preparation of alloy-layer and top electrode.Place mask in the substrate of step (2) gained, the diameter of mask plate hole is 1um, and the distance between the hole is 20um.Utilize magnetron sputtering to prepare Ge 2Sb 2Te 5Alloy-layer, used target are Ge 2Sb 2Te 5Alloys target.The local vacuum of magnetic control sputtering device is 10 -7Torr charges into high-purity Ar 2Make the sputter vacuum rise to 0.67Pa, the sputtering chamber temperature is 70 ℃.Sputtering power is 300W, and thickness is 100nm, and sputter rate is the 30nm/ branch.Will not take out by sample after finishing the alloy-layer sputter, target is changed to tungsten target, sputter W top electrode, condition is the same.So just solved the problem that is difficult to neatly and easily doing top electrode on the phase-change alloy layer.Top electrode thickness is 20nm, and sputtering power is 300W, and sputter rate is the 5nm/ branch.
(4) corrosion.Sample is taken out, take off mask after, utilize wet etching at Ge 2Sb 2Te 5Alloy-layer corrodes, and the W of upper/lower electrode and substrate remain intact.In corrosion process, constantly to stir, the stage casing of alloy-layer is owing to the abundant flushing of corrosive liquid, so formed the fast phenomenon in etch ratio two, alloy-layer stage casing.Add the little generation that has further promoted above-mentioned phenomenon to a certain degree back " capillarity " that forms of device size.In wet etching, upper/lower electrode can be corroded a bit inevitably, so when selective etching liquid, will select at Ge 2Sb 2Te 5Comparatively fast, and W is slower.It is quite cheap to go out nanometer shape cost with this caustic solution.
(5) insulant is filled.By sputter filler SiO 2Form the gap, heat insulating function is played in gap or be gas, or be vacuum, and the expansion of volume can suppress the chalcogenide compound phase transformation time.
(6) polishing.Sample is carried out chemico-mechanical polishing, with the SiO of W top electrode top 2Skim, the W electrode is exposed, so that draw the utmost point.

Claims (10)

1. the preparation method of a phase transition storage nanometer scale unit component, comprise the selection and the cleaning of substrate, successively prepare transition zone and bottom electrode in the substrate after it is characterized in that cleaning, on bottom electrode, utilize mask plate to prepare phase-change alloy layer and top electrode in succession again, then take off mask plate, alloy-layer is corroded, form middle thin two pluckings shapes, fill insulation filler then, at last unnecessary filler is skimmed and expose top electrode.
2. press the preparation method of the described phase transition storage nanometer scale of claim 1 unit component, it is characterized in that on described bottom electrode, utilizing mask plate to prepare phase-change alloy layer and top electrode in succession, be after mask plate is fixed on bottom electrode, motionless mask plate in the process of preparation alloy-layer and top electrode makes top electrode cover on the alloy-layer just; The diameter of mask plate hole is 10-500um, and the distance between the hole is 200nm-1um.
3. by the preparation method of the described phase transition storage nanometer scale of claim 1 unit component, after it is characterized in that mask taken off, select Ge 2Sb 2Te 5Alloy-layer corrodes the corrosive liquid fast than bottom electrode W; Corrosion is dry etching, or is wet etching.
4. press the preparation method of the described phase transition storage nanometer scale of claim 1 unit component, it is characterized in that described transition bed thickness is 10-400nm, bottom electrode is 50-400nm, and very 20-400nm powers on, the alloy bed thickness is 10-1000nm, and surface roughness is lower than 2nm.
5. press the preparation method of the described phase transition storage nanometer scale of claim 1 unit component, it is characterized in that preparing transition zone, bottom electrode, phase-change alloy layer and upper electrode layer and adopt magnetron sputtering, or employing electron beam evaporation, or employing chemical vapour deposition (CVD), or employing metallo-organic decomposition process, or PECVD.
6. by the preparation method of the described phase transition storage nanometer scale of claim 1 unit component, it is characterized in that described substrate or be silicon chip, or be glass, or be GaAs, or be plastics, or be SiO 2
7. by the preparation method of the described phase transition storage nanometer scale of claim 6 unit component, it is characterized in that the silicon chip of its selection (100) orientation, with acetone ultrasonic cleaning 5 minutes, use deionized water rinsing afterwards earlier; Again silicon chip is immersed in H 2O: H 2O 2: NH 4OH=5: boil in 1.5: 0.5 the mixed liquor and boil 10 minutes, use the deionized water rinsing silicon chip after making its natural cooling then; Again silicon chip is immersed in H 2O: HCl: H 2O 2=5: boil in 1: 1.5 the mixed liquor and boil 10 minutes, use deionized water rinsing behind the natural cooling; With 4% HF silicon chip is carried out processed at last.
8. by the described preparation phase transition storage of claim 1 nanometer scale unit component method, it is characterized in that material that its upper and lower electrode is wanted be among W, TiW alloy, Ni, Pt, Au, Cu or the Al any one; Transition zone is Ti, TiO 2, in TiN or the TiW alloy any one.
9. the preparation method of the described phase transition storage nanometer scale of claim 1 unit component is characterized in that the gap or gas or the vacuum that form after corrosion is filled.
10。By the preparation method of the described phase transition storage nanometer scale of claim 1 unit component, when it is characterized in that the phase-change alloy layer is column, the area between the column upper/lower electrode is 60nm 2To 1um 2, highly be 30nm-2um.
CNB200310109372XA 2003-12-12 2003-12-12 Method for the manufacture of nanometer magnitude unit device in phase-change storage Expired - Lifetime CN100356606C (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006035325A1 (en) * 2004-09-27 2006-04-06 Koninklijke Philips Electronics N.V. Electric device with nanowires comprising a phase change material
CN101789492A (en) * 2010-03-01 2010-07-28 中国科学院半导体研究所 Preparation method of plane phase change memory
CN101127386B (en) * 2006-08-16 2010-10-13 旺宏电子股份有限公司 Self-aligning structure and method for limiting resistance random access memorizer melting point
CN101764197B (en) * 2008-12-24 2011-10-12 中国科学院半导体研究所 Method for manufacturing nano-sized phase change memory
US8049202B2 (en) 2004-12-02 2011-11-01 Samsung Electronics Co., Ltd. Phase change memory device having phase change material layer containing phase change nano particles
CN101764196B (en) * 2008-12-24 2011-12-21 中国科学院半导体研究所 Method for manufacturing nano-scale phase change memory
CN106847311A (en) * 2016-12-12 2017-06-13 宁波大学 A kind of integrated-type all-optical storage device based on phase change nanowire and preparation method thereof
CN112234140A (en) * 2020-12-11 2021-01-15 长江先进存储产业创新中心有限责任公司 Phase change memory and manufacturing method and reading method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166758A (en) * 1991-01-18 1992-11-24 Energy Conversion Devices, Inc. Electrically erasable phase change memory
US6320238B1 (en) * 1996-12-23 2001-11-20 Agere Systems Guardian Corp. Gate structure for integrated circuit fabrication

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7700934B2 (en) 2004-09-27 2010-04-20 Koninklijke Philips Electronics N.V. Electric device with nanowires comprising a phase change material
CN101027797B (en) * 2004-09-27 2010-06-16 皇家飞利浦电子股份有限公司 Electric device with nanowires comprising a phase change material and manufacturing method thereof
WO2006035325A1 (en) * 2004-09-27 2006-04-06 Koninklijke Philips Electronics N.V. Electric device with nanowires comprising a phase change material
US8049202B2 (en) 2004-12-02 2011-11-01 Samsung Electronics Co., Ltd. Phase change memory device having phase change material layer containing phase change nano particles
US8243494B2 (en) 2006-08-16 2012-08-14 Macronix International Co., Ltd. Self-aligned structure and method for confining a melting point in a resistor random access memory
CN101127386B (en) * 2006-08-16 2010-10-13 旺宏电子股份有限公司 Self-aligning structure and method for limiting resistance random access memorizer melting point
CN101764197B (en) * 2008-12-24 2011-10-12 中国科学院半导体研究所 Method for manufacturing nano-sized phase change memory
CN101764196B (en) * 2008-12-24 2011-12-21 中国科学院半导体研究所 Method for manufacturing nano-scale phase change memory
CN101789492B (en) * 2010-03-01 2011-12-07 中国科学院半导体研究所 Preparation method of plane phase change memory
CN101789492A (en) * 2010-03-01 2010-07-28 中国科学院半导体研究所 Preparation method of plane phase change memory
CN106847311A (en) * 2016-12-12 2017-06-13 宁波大学 A kind of integrated-type all-optical storage device based on phase change nanowire and preparation method thereof
CN106847311B (en) * 2016-12-12 2019-05-21 宁波大学 A kind of integrated-type all-optical storage device and preparation method thereof based on phase change nanowire
CN112234140A (en) * 2020-12-11 2021-01-15 长江先进存储产业创新中心有限责任公司 Phase change memory and manufacturing method and reading method thereof
CN112234140B (en) * 2020-12-11 2021-03-16 长江先进存储产业创新中心有限责任公司 Phase change memory and manufacturing method and reading method thereof

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