CN1528614A - MPC500 process type electric car multi-energy power assembly control device - Google Patents

Abstract

The invention is a MPC500 processor-type electric car multi-energy source power assembly control device, using 32-bit car special embedded microprocessor as kernel hardware, designing pair control bus, address/data bus extended interface, serial communication interface, BDM debugging port and various I/O signal interfaces to compose kernel mainboard, which is connected with the I/O extended board with dual-port RAM interface through board to board pin-type standard linker so as to compose the hardware platform, thus heightening system integrity, vehicle carrying reliability and system technical performance, and making the control device able to ECU of each component of electric car multi-energy source power system through the CAN bus interface and the dual-port RAM interface, heightening application flexibility and transplantability. It only need change necessary soft module, thus able to be applied to various electric cars.

Description

MPC500 processes the many energy source and powers of device formula electric automobile and always becomes control device

Technical field

MPC500 processes the many energy source and powers of device formula electric automobile and always becomes control device to belong to auto electronic control technology, relates in particular to the electric automobile Multi-Energy Dynamic Assemble Control System field that fuel cell consists of.

Background technology

Power assembly control system has produced great impact as a kind of new design theory to Automobile Design and manufacturing. U.S. Ford Motor Company points out that the exploitation of power assembly control system has become one of core link in the automotive development process in June, 2000 in the startup report of MOBIES engineering project, relevant research and development spreads all over the whole world. But " Multi-Energy Dynamic Assemble Control System " then is the new system concept that country's " 15 " 863 Program proposes, and this concept comes from traditional automobile and only has a power source, and present electric automobile has a plurality of power sources. Consisted of by various energy resources such as fuel battery engines, battery, super capacitor devices such as the total achievement of the power of fuel cell automobile. By the automobile power assembly of many Energy Mix new technology requirement has been proposed for software and hardware structure, the control algorithm of control system, such as the composition of the dynamic Control of many energy and reasonable distribution problem, control system and system structure problem etc. The main task of Multi-Energy Dynamic Assemble Control System is to selected each parts of power assembly system of whole car, develops each parts carrier on the basis of control system separately, and whole dynamical system is implemented comprehensive control. The many energy source and powers of electric automobile based on the MPC500 series microprocessor always become control device only need pass through to change necessary software module, the needs that just can adapt to the dissimilar electric automobiles such as pure electric automobile, mixed power electric car and fuel cell automobile form the hardware platform of many energy power systems control system.

Patent has been declared by Shanghai Fuel Battery Automobile Power System Co., Ltd " a kind of fuel cell car drive always becomes method for designing ". The present invention discloses a kind of fuel cell car drive and has always become method for designing. The present invention's method can be used for fuel cell car product development process always becomes parameter to finish its power design. The method is analyzed as the basis with multi-state, can optimize the fuel cell car drive and always become the configuration scheme, accurately calculating the fuel cell car divides total one-tenth, other energy supply to divide total one-tenth, electricity to drive the performance requirement of minute total one-tenth, Multi-Energy Dynamic Assemble Control System to the fuel battery engines in the total one-tenth of power, determine simultaneously dynamic characteristic and the efficacious workaround of the total one-tenth of power, and the design that becomes for each minute is total provides clear and definite target and the direction of effort. The method can support many energy combination drive automotive development process to finish its power system parameter design.

Patent has been declared by China No.1 Automobile Group Co's " a kind of novel hybrid power automobile power assembly ". A kind of novel hybrid power automobile power assembly relates to take fuel oil always becoming with the power of electricity as the hybrid power automobile of the energy. The above-mentioned shortcoming that exists to solve present hybrid power automobile, improve the hybrid power automobile serviceability, improve its fuel economy, realize minimum discharge. It is comprised of engine, main clutch, motor, power synthesis device, speed changer, battery, power transmission shaft, back axle and wheel, characterized by further comprising time clutch, two inputs of power synthesis device link by the output shaft of main clutch, inferior clutch and engine, the output shaft of motor respectively, and the input axle of the output of power synthesis device and speed changer links.

Patent has been declared by Wuhan University of Technology " many energy source and powers always become the semi-hardware type simulation test system ". A kind of many energy source and powers always become the semi-hardware type simulation test system. Comprise a desktop computer, 8 road modulus A/D capture cards, 8 way mould D/A change card, 32 way switch amount I/O cards and the digital signal generator that is connected with high speed serial ports USB converter, software development platform Matlab/simulink, the starter that replaces the actual vehicle operation, explosive motor, motor, battery, clutch, speed changer, wheel, vehicle body, the dynamic calculation model of low pressure distribution system synthesis, use the dynamics equation of automobile to set up the energy balance that each always becomes, each total one-tenth model is pressed self-characteristic work, use A/D, D/A, I/O plate card, SCI and usb communication are set up contacting of Multi-energy Powertrain Controller and model computer, Multi-energy Powertrain Controller is carried out parameter control and logic control to model, the output parameter of model all passes through A/D, D/A, I/O, the mode of CAN plate card and SCI communication is transmitted, actual controller, various signal transducer cards and being used for replace truly always becoming the emulation model of device to form together closed loop test system.

Patent has been declared by Dong Feng Auto Corporation's " many energy stand arrangement of mixed power electric car ". The invention belongs to car test techniqes, particularly a kind of many energy of mixed power electric car stand arrangement; This scheme is implemented by following step: the A. engine is connected with gearbox by clutch, main motor is connected in the gearbox rear end, power by behind the gearbox through the two-way output of differential mechanism, by the deceleration machine two-way output is synthesized to the output of axle, to realize surveying being connected of merit machine and dynamical system; B. engine throttle door controller ECU1, ISG controller ECU2, AMT controller ECU3, main Electric Machine Control device PMU and power-supply management system BMU be with after whole vehicle controller connects, again by pedestal control system to whole vehicle controller sending and receiving signal. This test stand scheme is suitable for hybrid power vapour power vehicle multi-energy power assembly, can be used for verifying parts and system's functions such as engine, motor, gearbox, ISG, AMT, battery, ECU, wire harness.

Patent has been declared by Dong Feng Auto Corporation's " motor vehicle integrated control system for whole vehicle of mixed power electric car ". The invention belongs to automobile control technology; be particularly related to a kind of motor vehicle integrated control system for whole vehicle of mixed power electric car; it is characterized in that: described integrated control system is mainly gathered with light current control, strong power management, the protection of whole car fault, the coordination of whole car and the integrated whole vehicle control of instrument signal management in being controlled by the whole car of tradition by Multi-Energy Dynamic Assemble Control System, and described many energy source and powers always become the power division of major control engine and motor. This system has whole car and controls the function that always becomes control with many energy source and powers. Compare with Multi-Energy Dynamic Assemble Control System with traditional whole vehicle control, function has increased, and volume reduces greatly, and reliability is enhanced, and the validity of control and economic property all have obvious raising.

" fuel cell electrical automobile Multi-Energy Dynamic Assemble Control System " is the research and development content of the responsible fuel battery city carriage parts problem of department of computer science, Tsinghua university. Technical characteristic is the hardware platform of developing as core with 32 MPC500 series microprocessors take the automobile of a new generation of company of Motorola (MOTOROLA). So far, the many energy source and powers based on the exploitation of MPC500 series microprocessor always become control device not yet to see. The software platform adopts the OSEK of Tsing-Hua University embedded real-time operating system that meets " the open system of automotive electronics and interface software specifications thereof " (OSEK standard), independent research, and many energy source and powers always become to control algorithm. This shows that the development of Multi-Energy Dynamic Assemble Control System is not only to fuel battery electric auto project itself, and the development of auto industry all is significant.

Above-mentioned patent of having applied for. Shanghai Fuel Battery Automobile Power System Co., Ltd be that a kind of fuel cell car drive always becomes method for designing; China No.1 Automobile Group Co be a kind of composition structure of novel hybrid power automobile power assembly; The patent of Wuhan University of Technology is that a kind of many energy source and powers always become the semi-hardware type simulation test system; " many energy stand arrangement of mixed power electric car " patent of Dong Feng Auto Corporation is a kind of many energy bench test arrangement. Although these several patents always become System Dependent with the many energy source and powers of electric automobile, and control device does not have the technology correlation.

" motor vehicle integrated control system for whole vehicle of mixed power electric car " patent of Dong Feng Auto Corporation is higher with the present invention's relevant degree. This patent is a kind of motor vehicle integrated control system for whole vehicle of mixed power electric car, it is characterized in that Multi-Energy Dynamic Assemble Control System and traditional whole car control group be combined carrying out integrated control. Be a kind of novel control architecture, but do not relate to the control device that always becomes for the many energy source and powers of electric automobile specially based on concrete microprocessor.

Summary of the invention

The application's main purpose is for the limitation that overcomes prior art and weak point, proposes the many energy source and powers of a kind of novel electric automobile and always becomes control device. This device is take 32 automobile specified microprocessors (the operation temperature is-45 ℃～+ 125 ℃) as core hardware, disposed the SRAM of 2M byte and 2M byte the FLASH memory, designed expansion interface, the serial of control bus, address/data bus communicate by letter interface, the total line interface of CAN, BDM debug port and various I/O signal interface, the integrated degree of hardware and the technical performance of control device are greatly improved. Hardware platform is made of core mainboard and I/O expansion board two parts electronic circuit plate, and the I/O expansion board has also designed special-purpose 72 needle sockets of automobile ECU, and the support to the two-port RAM interface is provided. Make control device both can also can pass through the two-port RAM interface by the total line interface of CAN, communicate and realize control with the automatically controlled unit (ECU, Electric Control Unit) of many each parts of energy power system of electric automobile. Control device only need just can adapt to by changing necessary software module the needs of the dissimilar electric automobiles such as pure electric automobile, mixed power electric car and fuel cell automobile.

The invention is characterized in that it also contains:

The core mainboard is made of following part:

The MPC500 microprocessor;

The following each several part that links to each other with this MPC500 microprocessor;

Pin type standard connector between the circuit plate, it comprises:

JP1: extend out the control bus interface;

JP2: extend out the address bus, extend out data bus interface and power supply module interface;

JP3: time processing unit interface;

JP4: the peripheral interface of analog-to-digital conversion interface and serial;

JP5: the total line interface of pulsewidth modulation interface PWM, two function MIOS (modularization input and output system) interface, MIOS parallel input/output interface MPIO, 2 CAN (controller local area network) interface of communicating by letter with 2 serials.

Also have: background debug mode port BDM;

Join serial ports interface chip and CAN interface chip that automobile specified 72 needle connectors are used;

Outside FLASH;

External SRAM;

Latch hardware that chip links to each other with this microprocessor MPC500 control word switch that resets through data;

Crystal oscillator drives chip with the bus that is controlled by hardware configuration switch;

In addition, also have power supply and reset chip.

For the I/O expansion board that the interface signal on the core mainboard is effectively expanded, it links to each other with the core mainboard by pin type standard connector JP1～JP5 between the circuit plate, and be equipped with special-purpose 72 needle sockets of automobile ECU (automatically controlled unit), consisted of by following part:

Special-purpose 72 needle sockets of automobile ECU, it includes:

The electric power system interface: it with the foregoing circuit plate between among the JP2 of pin type standard connector the power supply module interface link to each other;

The PWM interface of PWM and analog signal output interface: PWM output interface and JP5 links to each other, and analog signal output interface links to each other through the PWM interface of high-speed light lotus root and JP5;

Analog input interface: it with the foregoing circuit plate between among the JP4 of pin type standard connector the analog-to-digital conversion interface link to each other;

Numeral amount input/output interface: it with the foregoing circuit plate between among the JP5 of pin type standard connector the parallel input/output interface MPIO of MIOS link to each other;

TPU (time processing unit) interface: it with the foregoing circuit plate between the JP3 of pin type standard connector link to each other;

Communication system interface, it comprises:

Serial communication interface: it with the foregoing circuit plate between among the JP5 of pin type standard connector the serial interface of communicating by letter link to each other;

The CAN interface of communicating by letter: it with the foregoing circuit plate between among the JP5 of pin type standard connector the total line interface of CAN link to each other;

The two-port RAM interface.

The data bus drives chip: it with the foregoing circuit plate between extend out data bus interface among the JP2 of pin type standard connector and link to each other with above-mentioned two-port RAM interface;

The address bus drives chip: it with the foregoing circuit plate between extend out address bus interface among the JP2 of pin type standard connector and link to each other with above-mentioned two-port RAM interface;

The address decoding chip: it extends out among the JP1 of pin type standard connector and extends out the control bus interface among address bus interface, the JP1 and link to each other with above-mentioned two-port RAM interface respectively with between the foregoing circuit plate.

Switch S 1: totally 8, wherein

If the VPP position is set to " 1 " state, do the inner erasable operation of FLASH of MPC500 and program voltage;

The EPEE position is " 1 " state, and expression can be programmed and erasable FLASH;

MODCK[1:3] three: latch chip drives through data, link to each other with MPC500, to dispose phase-locked ring (PLL)/clock operation pattern;

Switch S 2, S3 and S4: each 8, latch chip by other three data respectively and link to each other with the data bus, with the control that resets of realization hardware;

Switch S 5: totally 8, above-mentioned SRAM and FLASH are done sheet select.

The many energy source and powers of the electric automobile based on the MPC500 microprocessor of having finished always become the test model machine (THECU-2002) of control device, have disposed 72 needle connectors of automobile ECU special use and have passed through EMC test by standard GB/T/T17619-1998.

Compare with existing power assembly system of electric vehicle control device, the present invention's concrete technique effect is:

1) employing of automobile-used 32 the PowerPC structure embedded microprocessors of a new generation has improved the integrated degree of system, vehicle-mounted reliability and system's technical performance. So far, the many energy source and powers of electric automobile based on the exploitation of MPC500 series microprocessor always become control device not yet to see.

2) increased the two-port RAM interface on the I/O expansion board electronic circuitry design. Make control device both can also can pass through the two-port RAM interface by the total line interface of CAN, communicate and realize control with the ECU of many each parts of energy power system of electric automobile. Make application flexibility, the portability of control device bring up to a new height.

3) the control device communications anti-jamming can raising and the quickening (detailed introduction is arranged in the back) of computing control speed, the power system of electric automobile distributed control network that makes more piece point is with the optimization scheduling of interface technical merit, multi-energy system and manage the control level and greatly improve.

Description of drawings

Fig. 1. the many energy source and powers of fuel cell electrical automobile always become system architecture diagram

Fig. 2. the many energy source and powers of fuel cell electrical automobile always become control device THECU-2002 type test model machine hardware structure diagram

The hardware principle block diagram of Fig. 3 .THECU-2002 type test model machine core mainboard

The hardware principle block diagram of Fig. 4 .THECU-2002 type test model machine I/O expansion board

Fig. 5 .MPC555 micro processor leg divides Butut

Fig. 6. memory expansion principle figure

Fig. 7 .I/O expansion board circuit theory diagrams

The read cycle sequential chart of Fig. 8 .SRAM memory

The cycle of the writing sequential chart of Fig. 9 .SRAM memory

Concrete enforcement mode

It is to have developed fuel cell electrical automobile Multi-Energy Dynamic Assemble Control System THECU-2002 type test model machine that the many energy source and powers of the electric automobile based on the MPC500 series microprocessor that the present invention proposes always become the embodiment of control device, is elaborated below in conjunction with accompanying drawing and embodiment.

The many energy source and powers of fuel cell electrical automobile always become system's framework as shown in Figure 1. Dynamical system is made of motor controller, fuel cell, battery, DC/DC converter etc., realizes physical connection by electric bus. Power always becomes between ECU and parts ECU to be realized communicating by letter by CAN (controller local area network) bus. What the present invention relates to is the total one-tenth of power automatically controlled cell mesh (Powertrain ECU).

Fuel cell electrical automobile Multi-Energy Dynamic Assemble Control System THECU-2002 type test model machine is take the MPC555 microprocessor as core, the sufficient expansion that its function is carried out, exterior storage device FLASH and SRAM have extended out respectively the byte of 2M, whole test model machine is take 72 needle connectors of automobile ECU special use as the physics interface, for automobile provides the communication of CAN bus, serial communication, the I/O of numeral amount, analog input/output, pulsewidth modulation (PWM) is exported and the function of time processing unit (TPU) interface. In addition, also flexible design the two-port RAM interface, make control device both can also can pass through the two-port RAM interface by the total line interface of CAN, communicate and realize to control with the ECU of many each parts of energy power system of electric automobile. This test model machine can be worked under the environment of high-speed mobile, harshness, has flexible design, system's reliability and the powerful expanded function of height, and is fit to large batch, low-cost production. Control device is supported the communication of CAN bus, has stronger anti-interference ability, has passed through EMC test by standard GB/T/T17619-1998.

THECU-2002 type test model machine hardware platform is made of two parts electronic circuit plate: core mainboard and I/O expansion board. As shown in Figure 2.

The theory diagram of THECU-2002 type test model machine core mainboard as shown in Figure 3. The exploitation of core mainboard is 32 embedded automobile-used MPC500 series microprocessors that adopt U.S. MOROROLA company, is equipped with serial communication interface, the total line interface of CAN, BDM debug port and various I/O signal interface. Realized control bus, address/data bus expansion interface, TPU interface, PWM pulsewidth modulation interface, A/D interface and I/O system interface etc., the memory aspect respectively is the 2M byte according to actual conditions design SRAM and FLASH.

Always become application needs of control in order more to be fit to the many energy source and powers of electric automobile, the function of enhancing core mainboard is also effectively expanded the interface signal on the core mainboard. We have further developed the I/O expansion board of model machine. This I/O expansion board links to each other with the core mainboard by pin type standard connector between the circuit plate, has consisted of the overall structure of THECU-2002 type test model machine, and its hardware principle block diagram as shown in Figure 4. The main function of I/O expansion board is that the interface signal of core mainboard is expanded, altogether by 5 large interface module compositions: JP1 interface module is the expansion to control bus, JP2 is the expansion to address/data bus, JP3 is the expansion to the TPU module, JP4 is the expansion of A/D module and SPI, and JP5 is the expansion to CAN bus, SCI, MDA, PWM, MPIO function. Also increased on the expansion board in addition to the support of two-port RAM interface and design configurations 72 needle connectors of automobile ECU special use.

The circuit structure of THECU-2002 type test model machine forms and comprises: microprocessor MPC555, electric power system, the circuit that resets, outer extension memory, hardware configuration control word switch, background debug port (BDM), two-port RAM interface circuit, communication interface part are divided, 72 needle connector interface circuit of D/A converting circuit and automobile ECU special use etc. Referring to accompanying drawing 5,6,7, main the electric circuit constitute part is as follows.

(1) microprocessor is selected the MPC555 of MOTOROLA company, external crystal-controlled oscillation 4MHz. Main pin name and function description see Table 1. All pin name of MPC555 are referring to accompanying drawing 5.

(2) the main chip of electric power system certain applications has two (seeing Fig. 7): LT1374I5 and LT1587-CT3.3. These two products that chip all is LINEAR company. LT1374I5 Switching regulator (Switching Regulator) has following functions characteristic: 6V～25V DC input voitage, 5V/4.5A output. Operating temperature-40 ℃～125 ℃. The supply voltage of 5V is provided for system. LT1587-CT3.3 input voltage is 4.75V～7V, 3.3V output, output electric current 0mA～3A; For MPC555 provides the 3.3V supply voltage.

Pin name	Function
		PORESET	Electrification reset.
HRESET	Hardware resets.
		SRESET	Software resets.
A[8:31]	The address bus.
		D[0:31]	The data bus.
RD/WR	The read/write signal line, the indication data transfer direction.
		OE	Output effectively.
WE[0:3]	With effect, WE0 confirms D[0:7] data, WE1 confirms D[8:15], WE2 confirms D[16:23], WE3 confirms D[24:31].
		CS[0:3]	Sheet selects the signal line.
RSTCONF	Configuration-input resets. Configuration resets when the HRESET signal is confirmed.
		VPP	The erasable operation voltage input of inner FLASH.
EPEE	The erasable operating control signal line of inner FLASH.
		MODCK[1:3]	Clock pattern configurations word.
A_CNTX0	CAN controller serial data output signal line.
		B_CNTX0	CAN controller serial data output signal line.
A_CNRX0	CAN controller input serial data signal line.
		B_CNRX0	CAN controller input serial data signal line.
TxD[1:2]	The serial data output signal line of SCI.
		RxD[1:2]	The input serial data signal line of SCI.
PWM[0:7]	The pulse width modulating signal line.
		MPIO[0:15]	Universal input/output signal line.
A_TPU[0:4]	The TPU functional pin.
		DSCK	Exploitation port serial clock
DSDI	Exploitation port serial input pin

The main pin function summary of table 1 MPC555

(3) circuit that resets has adopted the DS1233 reset chip (seeing Fig. 7) of DALLAS company, and its operating temperature scope is-40 ℃～85 ℃. DS1233 provides power supply monitoring, and (effectively improve voltage monitoring precision and the reliability of system, when any input voltage drops into corresponding detection threshold when following, chip produces the output that resets. ) and the button two kinds of functions that reset. In this control device, we have used the button of the DS1233 control function that resets. PORESET (power reset) button connects the RST output pin of DS1233, when pressing the PORESET button, DS1233 will produce 350 milliseconds the pulse that resets (Low level effective) until discharge button, the PORESET pin of MPC555 is confirmed to enter the power reset state after the reseting pulse signal. Among DS1233 was not resetting the cycle, it was monitored continuously the RST signal and waits for low level rising edge, if detect this rising edge, DS1233 will bounce and switch that to put the RST signal be low level. After timer internal is overtime, DS1233 will continue the level of monitoring RST signal line. If the signal line is still low level, DS1233 will continue this signal line of monitoring and seek rising edge, discharge signal until detect one, and DS1233 will put the RST signal to be low level and to keep 350 milliseconds.

The function of two other button that resets (HRESET and SRESET) is to make the MPC555 operation that produces that hardware resets and software resets. After pressing HRESET (hardware resets) button, will send a low level signal to the HRESET pin of MPC555, detect the affirmation of a HRESET low level signal as MPC555 after, enter the hardware reset mode. Equally, if after pressing SRESET (software resets) button, will send a low level signal to the SRESET pin of MPC555, detect the affirmation of a SRESET low level signal as MPC555 after, enter the software reset mode.

(4) outer extension memory of THECU-2002 type test model machine comprises FLASH and SRAM (seeing Fig. 6). FLASH selects the AM29LV800BB-90EC of AMD company, totally two. Total memory capacity is the 2M byte. Read-write operation power voltage scope 2.7～3.6V, the access time was 90 nanoseconds. Main pin name and function explanation thereof are as shown in table 2:

Pin	Function is described	Circuit connects
			A[0:18]	The address input.	Address pin A[29:11 with MPC555] link to each other.
DQ[0:14]	15 bit data I/O.	The DQ[0:15 of first AM29LV800BB-90EC] D[15:0 of pin and MPC555] the data line links to each other the DQ[0:15 of the 2nd AM29LV800BB-90EC] D[31:16 of pin and MPC555] the data line links to each other.
			DQ15/A-1	DQ15 (data I/O, type matrix formula), A-1 (address input pin, byte mode).
CE	Chip is effective.				Controlled by the S5 switch.
		OE	Output effectively.	Link to each other with the RD/WR pin of MPC555.
WE	Write operation effectively.				Link to each other with the OE pin of MPC555.
		RESET	The hardware reset pin, low level activates.	Link to each other with the HRESET pin of MPC555.
BYTE					Connect high level.

The main pin explanation of table 2 AM29LV800BB-90EC chip and circuit connect

Wherein BYTE controls data I/O (input and output) pin DQ[0:15] operation is with the pattern of word or with the configuration of the pattern of byte. Also be exactly to select 16 (word) patterns or 8 (byte) patterns. If BYTE is made as logic " 1 ", FLASH is configured to the pattern of word, DQ[0:15] pin is activated and by the control of CE, OE pin. If BYTE is set to logic " 0 ", FLASH will be configured to byte mode. DQ[0:7] pin is activated and by the control of CE, OE pin. DQ[8:14] pin is in three-state (tri-stated) state. Under byte mode, DQ15 will realize the A-1 address function as the input pin. In our system, BYTE is set to high level, also exactly FLASH is configured to type matrix formula, DQ[0:15] be used as data I/O pin.

SRAM selects the IC61LV5128.12K chip of ISSI company, and totally four, total memory capacity is the 2M byte. The access time was 12 nanoseconds. Supply voltage 3.3V. Main pin function explanation is as shown in table 3:

Pin	Function is described	Circuit connects
			A[0:18]	The address input.	Address pin A[29:11 with MPC555] link to each other.
CE	Chip is effective.	Controlled by the S5 switch.
			OE	Output effectively.	Link to each other with the OE pin of MPC555.
I/O[0:7]	Input/output end port.	The I/O[0:7 of four IC61LV5128-12K] pin connects respectively the data line D[31:24 of MPC555], D[23:16], D[15:8], D[7:0].
			WE	Write operation effectively.	The WE pin of four IC61LV5128.12K connects respectively the WE[0:3 of MPC555] pin.

The main pin explanation of table 3 IC61LV5128-12K chip and circuit connect

(5) five hardware configuration control word switches (8 DIP switches). Function is as shown in table 4.

The switch title	Function is described
			The S1 switch, totally 8.	The VPP position	If be set to the conducting state, will be as MPC555 inside FLASH erasable and programming 5V supply voltage.
The EPEE position	The control signal of the inner FLASH programming of MPC555 or erasable operation. Be set to the conducting state, the expression erasable FLASH that can programme.
		MODCK[1:3] three		Through the driving of the 74LVC125 chip of PHILIPS company, with the MODCK[1:3 of MPC555] pin links to each other. Function is configurable clock generator operation pattern.
The EN_CFG position	If be set to the conducting state, will allow the control word that resets of configuration MPC555, otherwise, use the default value of the control word that resets.
		S2, S3, S4 switch, each 8.		Be respectively D[16:23], D[24:31] and D[0:7] the hardware control word switch that resets. S2, S3, the S4 switch 74LVC573A by 3 PHILIPS companies latchs chip and links to each other with the data bus, realizes the hardware control function that resets.
The S5 switch, totally 8.	Four sheets of control MPC555 select signal CS0～CS3, and four of fronts are SRAM sheet selected control switches processed, and four of back are FLASH sheet selected control switches processed. To select signal be CS1 to the SRAM sheet in this control device, and it is CS0 that the FLASH sheet selects signal.

Table 4 hardware configuration control word switch function table

(6) communication system interface comprises the communication of CAN bus, serial communication and two-port RAM interface. CAN controller interface chip is selected the PCA82C250 of PHILIPS company. Because built-in two the TouCAN modules of MPC555 (the total lane controller of CAN) are so select two PCA82C250 as the interface chip. Power supply voltage range is 4.5V～5.5V. The operating temperature scope is-40 ℃～125 ℃. Main pin function is as shown in table 5:

Pin	Function is described	Circuit connects
			TxD	The input of transmission data.	A_CNTX0 and B_CNTX0 pin with MPC555.
RxD	The output of reception data.	The A_CNRX0 and the B_CNRX0 pin that connect MPC555.
			CANL	The low level of CAN voltage I/O	Connect 72 pin automobile ECU private jacks
CANH	The high level of CAN voltage I/O.	Connect 72 pin automobile ECU private jacks
			Rs	The input of slope resistance.	Ground connection

The main pin explanation of table 5 PCA82C250 interface chip and circuit connect

Wherein the Rs pin is the input of slope resistance, is controlled by wire jumper. Totally three kinds of different operation model selections: at a high speed, slope control and pattern for subsequent use. Under high velocity mode of operation, send the transistor of output with fast as far as possible switching, the without limits measurement of rising and lower drop angle rate. Use the shielding cable to avoid (RFI:radio frequency interference) problem of Radio frequency interference. Can select high fast mode by Rs pin ground connection. For the situation of low transmission rate or short bus length, bus can adopt non-Shielded Twisted Pair or and line. In order to reduce Radio frequency interference, should limit the slope that rises and descend. The Rs pin is controlled the ratio of slope by contact resistance. If Rs connects high level, will enter low current pattern for subsequent use. Under this kind pattern, transmitting terminal will be closed, and receiving terminal switches to low current mode. Microprocessor could work by transmitting terminal is switched normal manipulation mode. In this control device, we select high fast mode, also are exactly to make Rs pin ground connection.

The interface chip of serial communication is selected the MAX233AEWP of MAXIM company. Operating temperature is-40 ℃～85 ℃. Main pin function explanation is as shown in table 6.

Pin	Function is described	Circuit connects
			T1 INAnd T2IN	The TTL/CMOS input.	SCI module TxD[1:2 with MPC555] pin links to each other.
R1 OUTAnd R2OUT	The TTL/CMOS output.	SCI module RxD[1:2 with MPC555] pin links to each other.
			T1 OUTAnd T2OUT	The RS-232 output.	Link to each other with 72 pin automobile ECU private jacks
R1 INAnd R2IN	The RS-232 input.	Link to each other with 72 pin automobile ECU private jacks

The explanation of table 6 MAX233AEWP serial communication interface chip pin and circuit connect

Two-port RAM interface circuit is as shown in table 7. The interface of two-port RAM is included in the 72 pin automobile ECU private jacks.

Pin

Function is described

Circuit connects

A[0:10]	The address line	A[31:21 with MPC555] pin links to each other. The space, address of the two-port RAM of 2K is provided.
			D[0:7]	The data line	D[0:7 with MPC555] pin links to each other. 8 data width.
WR	With effect	The WE0 pin that connects MPC555
			CS	Sheet selects signal	The CS2 pin that connects MPC555
RD	Read effectively	The RD/WR pin that connects MPC555

The explanation of table 7 two-port RAM interface circuit and circuit connect

(7) analog input/output, PWM, numeral amount I/O and the explanation of TPU functional pin are as shown in table 8.

Pin	Function is described	Circuit connects
			ACC_IN	Analog input	The A_AN0 pin that connects the QADC module of MPC555.
BRK_IN	Analog input	The A_AN1 pin that connects the QADC module of MPC555.
			AIN[2:7]	Analog input	The A_AN[2:7 that connects the QADC module of MPC555] pin.
PW[0:3]	PWM output	The PWM[0:3 that connects MPC555] pin.
			AO[0:3]	Analog output	The PWM[4:7 of MPC555] the signal line through high-speed light lotus root 6N137 isolation after output.
DIN[0:7]	The input of numeral amount	The MPIO[0:7 that connects MPC555] pin
			DOT[0:7]	The input of numeral amount	The MPIO[8:15 that connects MPC555] pin
TPU[0:4]	The TPU function is supported	The A_TPU[0:4 that connects MPC555] pin.

Table 8 analog input/output, PWM, numeral amount I/O and the explanation of TPU functional pin

(8) 72 needle connector function groups of automobile ECU special use.

The function of first group of pin is the electric power system for control device.

The 2nd group of pin provides 4 road pwm signals and 4 road analog output signals.

The 3rd group of pin provides 8 tunnel analog input signals. Be connected with ADC (analog-to-digital conversion) module of MPC555, realize vapour

Car simulation signal is to the conversion of data signal.

The 4th group of pin provides 16 railway digital signal I/O functions.

The 5th group of pin provides the communication function, comprises serial communication, the communication of CAN bus.

The 6th group of pin provides the TPU function.

The 7th group of pin provides the support to the two-port RAM interface.

Table 9 has provided pin definition and the function of 72 needle connectors and has described.

The group name	The pin name	Character	Physical significance	Remarks
					First group of POWER	VBAT		The input of 24V power supply
VBAT
				DVIN			The voltage input	The numeral amount is inputted with reference to voltage

	GND		System ground
					GND
	The 2nd group of AO/PWM	AO0	Imitated output quantity	Water temperature control (+)					Range: 0-4.5V represents-20 ℃-100 ℃
AO1					Imitated output quantity	Water temperature control (-)
		AO2	Imitated output quantity	Motor rotating speed control (+)				Range: 0-4.5V represents 0-5400rpm
AO3					Imitated output quantity	Motor rotating speed control (-)
		PWM0	PWM output
PWM1					PWM output
		PWM2	PWM output
PWM3					PWM output
		The 3rd group of A_IN	ACC_IN	The analog input amount				Accelerator pedal
BRK_IN	The analog input amount				Brake pedal
			AIN2	The analog input amount			Automobile speed signal (+)	Range: 0-9V
AIN3	The analog input amount
			AIN4	The analog input amount
AIN5	The analog input amount
			AIN6	The analog input amount
AIN7	The analog input amount
			The 4th group of D_I/O	DIN0			Digital input amount	Fuel Cell Engine switch
DIN1	Digital input amount	Urgent switch
				DIN2		Digital input amount	R shelves (reverse gear)
DIN3	Digital input amount	The I shelves
				DIN4		Digital input amount	The II shelves
DIN5	Digital input amount	N shelves (neutral gear)
				DIN6		Digital input amount	Key is in the ON position	Expression enters real driving state
DIN7	Digital input amount	Hydrogen gas leakage
				DOT0		Digital output	The overheated warning of water temperature
DOT1	Digital output	The Ready signal
				DOT2		Digital output
DOT3	Digital output
				DOT4		Digital output
DOT5	Digital output
				DOT6		Digital output

	DOT7	Digital output
					The 5th group of COM_Port	CANH		The CAN bus	High level CAN voltage I/O end
CANL		The CAN bus	Low level CAN voltage I/O end
				CANH			The CAN bus	High level CAN voltage I/O end
CANL		The CAN bus	Low level CAN voltage I/O end
				TXD1			RS232	Serial communication transmitting terminal
RXD1		RS232	Serial communications reception end
				TXD2			RS232	Serial communication transmitting terminal
RXD2		RS232	Serial communications reception end
				The 6th group of TPU		TPU0
TPU1
					TPU2
TPU3
					TPU4
The 7th group of DPRAM	ADDR0		Two-port RAM address line
				ADDR1		Two-port RAM address line
	ADDR2		Two-port RAM address line
				ADDR3		Two-port RAM address line
	ADDR4		Two-port RAM address line
				ADDR5		Two-port RAM address line
	ADDR6		Two-port RAM address line
				ADDR7		Two-port RAM address line
	ADDR8		Two-port RAM address line
				ADDR9		Two-port RAM address line
	ADDR10		Two-port RAM address line
				DATA0		Two-port RAM data line
	DATA1		Two-port RAM data line
				DATA2		Two-port RAM data line
	DATA3		Two-port RAM data line
				DATA4		Two-port RAM data line
	DATA5		Two-port RAM data line
				DATA6		Two-port RAM data line
	DATA7		Two-port RAM data line

	/WR		The two-port RAM write signal
					/CS		The two-port RAM sheet selects signal
	/RD		Two-port RAM is read signal

72 needle connector functional interpretations of table 9 automobile ECU special use

The main hardware circuit that has more than provided control device forms structure and realizes principle, and the below is with the work process of detailed illustrative system.

(1) system works flow process before and after the electrification reset.

Before system power-up, fibrous root is configured work according to using the difference that needs to control device, mainly is to finish the setting of wire jumper and the set of hardware configuration switch. Now illustrate as follows.

MODCK[1:3 among the S1] be set to " 010 ". EN_CFG position " 0 ". " 1 " expression conducting, " 0 " represents not conducting. The 2nd that puts S5 is " 1 " state, makes the CS1 conducting, chooses external SRAM. The 5th CS0 of S5 is set to " 1 " state, chooses outside FLASH.

After system powered on, will input voltage transitions through voltage-stablizer LT1374I5 was 5V, for the chip of 5V power voltage supply on the electronic circuit plate provides voltage. Through the voltage-stablizer LT1587-CT3.3 of fixing output 3.3V, be 3.3V voltage with the 5V voltage transitions again. Chip power supply for MPC555 microprocessor and 3.3V supply voltage. Arrive this, the electric power system of whole control device is finished.

When electrification reset operates, MPC555 will detect the low level input signal of PORESET, enter the electrification reset state after the affirmation, according to MODCK[1:3] signal determine crystal oscillator frequency, phase-locked ring (PLL:phase-locked loop) the frequency multiplication factor, cycle Abort Timer clock (PITRCLK) and time Ji Shizhongyuan (TMBCLK). And MPC555 also confirms HRESET and the input of SRESET pin. The rising of PORESET along the time will determine the state of MODCK pin, MODCK[1:3 in this example] arranged and be " 010 ", because the frequency of crystal oscillator is 4MHz, so master clock is 4MHz with reference to frequency, PLL is effective, normal manipulation mode, and the frequency multiplication factor is 5, the TMBCLK clock is with 4 frequency divisions, and the PITRCLK clock is with 256 frequency divisions. Obtained system's clock frequency this moment. After withdrawing from the electrification reset state, MPC555 will continue to drive HRESET and the SRESET pin continues 512 system clock cycles. After confirming the HRESET signal, in the sampling time (HRESET is low level), RSTCONF is identified, in this control device, the RSTCONF signal is determined by the EN_CFG position of hardware configuration switch S 1, the RSTCONF signal should be the high level input, and this moment, the 20th HC at the hardware reset configuration words register of MPC555 was 0, and system will start from the exterior storage device. This moment, reset configuration words was provided by the CMFCFIG register. Starting relevant position with device in this register has as follows:

The BDIS position is 0, and after expression resetted, memory controller Bank0 was activated, and the BR0 register is effective, and the CS0 sheet of MPC555 selects signal effective, and by the 5th bit switch gating CS0 of S5, system will start from FLASH.

The IP position is 0, and after expression resetted, the IP position in machine state register (MSR) register equaled 0, and exception vector table will begin from the physics address 0x0,000 0000 of FLASH. Because be the hardware operation that resets, the system that produced resets unusually, according to exception vector table, program pointer should point to 0x0,000 0100 place, and system's program should take this address as entrance, be carried out.

After the driving of SRESET pin was identified, the configuration of debug port will be from DSCK and the sampling of DSDI pin.

After 512 clock cycle, MPC555 stops to drive HRESET and SRESET pin, and the electrification reset operation is finished. In the operation of electrification reset, comprised that reseting logic and PLL state reset, system configuration resets, the clock module resets, the HRESET pin drives, debug port configuration, other inner logic resets and SRESET pin drive.

More than with an example described system from power on before the switch configuration of hardware circuit and wire jumper work be set begin, to the signal flow direction and the relevant operation of system power-on reset MPC555 microprocessor, and finish the overall process that resets. Main electrification reset mechanism when this example has also illustrated the work of this control device.

(2) memory operation flow process

For extending out the FLASH memory, we can be as seen from Table 10, reset, the pin state of FLASH chip during read and write operation.

When FLASH resetted, the RSET pin linked to each other with the HRESET pin of MPC555, and when confirming that MPC555 has when resetting operation, RSET is low level, and each pin state of FLASH device sees table 10 for details.

Annotate: " L " represents low level, and " H " represents high level, and "-" expression does not affect operation

The state of each pin during the operation of table 10 FLASH memory

When reading the FLASH operation, the RD/WR of MPC555 and CS0 pin output low level signal driver FLASH memory OE, CE pin are low level. The address bus provides stable address signal, and the CE signal is used for choosing the FLASH memory, and OE is data output control signal, allows data output. The WE pin should keep exporting high level. At this moment, the data pin of FLASH memory will be exported effective data, send the data pin of MPC555 microprocessor to by the data bus, finish to receive the data operation, also be exactly the address of data being read appointment.

Writing of FLASH operates programming and the erasable operation that comprises FLASH. WE and CE are driven to low level, and OE is high level.

Before explanation SRAM memory read/write cycle sequential, at first given the time characteristic of read/write cycles by table 11.

Label	Describe	Minimum time	The maximum time	Chronomere
					t RC	Time read cycle	12	-	Nanosecond
t AA	The address access time	-	12	Nanosecond
					t WC	Write the time in cycle	12	-	Nanosecond
t SA	The time is set up in the address	0	-	Nanosecond
					t PWE	Write pulse width	8	-	Nanosecond
t SD	Data are established to writes end	6	-	Nanosecond
					t HD	The data of writing after the end keep the time	0	-	Nanosecond

Table 11 SRAM memory read/write cycle time characteristic

The read cycle sequential of SRAM requires such as Fig. 8, and at A point place, MPC555 send access unit address, from then on read cycle begins to calculate, and at tRC after the time, the data of reading are really stable in the data bus, so require after the address signal is effective, sheet selects signal CE effective. If after the address signal was effective, CE can not in time arrive effective level, then probably only data occur at internal data bus, and data can not be delivered on the data bus of system. After the C point, the output data become effectively, and as long as address signal and output allow signal OE not cancel, export so data and will remain valid always. In the whole read cycle, the WE signal should keep high level.

The cycle of the writing sequential of SRAM requires such as Fig. 9, when the cycle of writing begins, there is first a sector address to set up time tSA, at B point place, the address signal is effective, at this moment, MPC555 puts sheet and selects signal CE and write signal WE to be low level, for writing data, as long as when CE and WE are low level, data can be stablized and get final product. The cycle tWC of writing be exactly the A point to the time between the D point, it the time address set up time tSA, write pulse width tPWE and write operation recovery time tHD three's sum.

(3) special-purpose 72 needle sockets of automobile ECU

Special-purpose 72 needle sockets of the automobile ECU of design configurations of the present invention, for the application of automobile control provides multiple function interface, comprise powered battery, analog input/output, PWM output, the I/O of numeral amount, TPU function, serial communication, the CAN bus is communicated by letter and to the support of two-port RAM interface.

Provide the 24V power supply by the VBAT pin for system, can obtain 5V and 3.3V voltage through the electric power system circuit control device. The signals such as the accelerator pedal of automobile, brake pedal and the speed of a motor vehicle can be by the input of the analog input pin among 72 needle sockets, analog-to-digital conversion module through control device will be converted to the analog input amount of getting on the car the numeral amount, transfer to the MPC555 microprocessor processes. The analog quantitys such as water temperature control and the control of motor rotating speed will be from the analog output pin output of 72 needle sockets. Control device can also receive the digital input amounts such as Fuel Cell Engine switch amount, urgent switch, R shelves, I shelves, II shelves, N shelves and hydrogen gas leakage, the digital outputs such as the overheated warning of output water temperature, Ready signal. In addition, control device also provides 4 tunnel pwm signal output and the support of TPU function. As the total control device that becomes of power, need frequently communicate and transmission of control signals with other ECU, for this reason, we provide communication interface system in 72 needle sockets, comprise serial communication, the communication of CAN bus and to the support of two-port RAM. The below will introduce the work process of these three kinds of communications in detail.

Serial communication:

In the built-in queues formula serial multi-channel module (QSMCM:Queued Serial Multi-Channel Module) of MPC555, two serial communication interface sub-module (SCI:Serial Communication Interface) are arranged, communicate with other ECU by serial bus and ancillary equipment. In the process of control device by SCI output data, MPC555 exports the parallel data that data are delivered to SCI in the register (TDR:Transmit Data Register), then being transferred to serial sends in the shift register (serial shifter), the serial shift register becomes serial data with the method data that will walk abreast of displacement, then the pin TxD[1:2 by MPC555] be sent to MAX233AEWP interface chip, the function of MAX233AEWP is to be RS-232 mouth level with the TTL level conversion, can link to each other with serial ports of computers, the data of will sampling are sent to computer in real time so that monitoring.

When receiving the data of serial bus, at first make level conversion by the MAX233AEWP chip, data are from the RxD[1:2 of MPC555] the pin serial input is to receiving the shift register, receive shift register and will arrive RxD[1:2] operation that is shifted of the serial data of pin, become parallel data and be sent in the parallel data input registers (RDR:Receive Data Register), then be sent among the CPU.

Serial communication adopts asynchronous transmission mode, after the transmission of putting SCI control register (SCCR) allows position (TE) for " 1 ", just begins process of transmitting. After the reception of putting the SCCR register allows position (RE) for " 1 ", will begin to receive data. The transfer of data form is 10 frame formats (without strange/even parity bit) of 1 initial position, 8 bit data positions and 1 position of rest. The baud rate of transfer of data is 9600 bps.

The communication of CAN bus:

Because built-in two the total lane controller TouCAN of CAN modules so need not external CAN controller chip in our control device, only need to connect the interface chip PCA82C250 of the total lane controller of CAN in the MPC555 microprocessor. The function of PCA82C250 interface chip is to provide differential receiving ability to the CAN controller, provides differential transmission ability to the CAN bus. The TouCAN module provides four pins, and A_CNTX0 and B_CNTX0 are the transmitting terminal of serial data, and A_CNRX0 and B_CNRX0 are the serial data input. 16 message buffering areas are provided in each TouCAN module, and each message buffering area has the sending and receiving dual-use function, also has in addition two serial data buffering areas in the TouCAN module, is responsible for respectively the sending and receiving of data. Can only activate one of them at one time.

When sending data, the TouCAN module is sent data into serial data and is sent buffering area from the message buffering area, send through A_CNTX0, B_CNTX0 pin, send to the TxD pin of PCA82C250 interface chip, the CANH pin of process PCA82C250 chip sends to data on the CAN bus from 72 pin interfaces. When receiving data, the data on the CAN bus send to A_CNRX0, the B_CNRX0 end of TouCAN through PCA82C250 interface chip RxD pin, receive the message buffering area by the Serial data receiving buffering area of TouCAN module.

The support of two-port RAM interface:

The two-port RAM interface provides 8 position datawire D0～D7,11 bit address line A21～A31 and WR, CS and RD cooperating, the exchanges data of realization control device and other automatically controlled unit. The two-port RAM of DPRAM interface compatibility 2K and 1K, the two-port RAM write signal was effective when WR was low level, and when CS was low level, the two-port RAM sheet selected signal effective, and when RD was low level, it is effective that two-port RAM is read signal.

(4) control device technique effect

Compare with existing power system of electric automobile control device, the present invention's concrete technique effect is embodied in, and the employing of automobile-used 32 the PowerPC structure embedded microprocessors of a new generation has improved the integrated degree of system, vehicle-mounted reliability and system's technical performance. Design has increased the support of two-port RAM interface in 72 pin automobile ECU private jacks, make control device both can also can pass through the two-port RAM interface by the total line interface of CAN, communicate and realize control with the ECU of many each parts of energy power system of electric automobile. The application flexibility of control device, portability are brought up to a new height. The control device communications anti-jamming can raising and the quickening of computing control speed, the power system of electric automobile distributed control network that makes more piece point is with the optimization scheduling of interface technical merit, multi-energy system and manage the control level and greatly improve.

The control device technique effect is to concrete experimental test scheme when:

That the motor vehicle integrated control system for whole vehicle of the mixed power electric car of Dong Feng Auto Corporation adopts is 16 bit microprocessor MC912DG128A, and its high operate frequency is 8MHz. The data bus is 16,2 groups of A/D conversion mouths, and every group of 8 passages, 4 PWM outputs need the total lane controller of external CAN, without outer extension memory. And always become control device to adopt 32 automobile specified microprocessor MPC555 based on the many energy source and powers of electric automobile of MPC500 series microprocessor, the clock work frequency is 40MHz, 5 times of MC912DG128A microprocessor, improved the computing speed of system, and MPC555 also has double precision floating-point unit, can process complicated floating-point computing, the optimization scheduling of multi-energy system and the management control level of system are all greatly improved. Simultaneously, 32 data-bus width, so that the handling capacity of memory has increased by one times than 16 bit microprocessors, owing to MPC555 is that MOTOLORA company is the special microprocessor that automotive development is produced, so its technical performance is very suitable for automobile power assembly ECU controller. It provides 2 32 tunnel A/D conversion module, totally 64 tunnel analog input passage, and the output of 8 road pwm signals, the TPU function, the total lane controller TouCAN of integrated CAN, it meets the CAN2.0B standard, and communication speed can reach 1Mbit/s. The design of control device circuit has been simplified in the raising of the integrated degree of controller, also so that the control device operation is more stable and reliable. This control device has also extended out the FLASH of 2M byte and the SRAM of 2M byte, can satisfy the needs in software development storage space, real time operating systems such as the operation OSEK of Tsing-Hua University, μ C/OS-II and flush type LINUX etc. in this control device are no matter in the storage space or this control device all can satisfy requirement on processing speed.

For control device communication system interface part, we adopt between three control device (A, B, C) testing program of carrying out data communication by CAN bus mode to test. Three control device all move the OSEK of Tsing-Hua University embedded real-time operating system, the transmission task of 7 CAN communications of control device A operation, each task will send data on the CAN bus, transfer of data speed is 1Mbit/s, control device B, C operation reception task, receive the data that A passes from the CAN bus, the serial ports that is sent to PC by serial communication interface shows. The test result shows that this control device can be realized the CAN bus communication based on operating system, has strengthened communication capacity and reliability. In addition, the many energy source and powers of electric automobile based on the MPC500 microprocessor always become the test model machine (THECU-2002) of control device to pass through EMC test by standard GB/T/T17619-1998. Be 20MHz～1000MHz in the scanning frequency, under the test field intensity 60V/m environment, this control device is working properly.

Claims (2)

1. Always become control device 1.MPC500 process the many energy source and powers of device formula electric automobile, comprise microprocessor, it is characterized in that it also contains:

   The core mainboard is made of following part:

   The MPC500 microprocessor;

   The following each several part that links to each other with this MPC500 microprocessor;

   Pin type standard connector between the circuit plate, it comprises:

   JP1: extend out the control bus interface;

   JP2: extend out the address bus, extend out data bus interface and power supply module interface;

   JP3: time processing unit interface;

   JP4: the peripheral interface of analog-to-digital conversion interface and serial;

   JP5: the total line interface of pulsewidth modulation interface PWM, two function MIOS (modularization input and output system) interface, MIOS parallel input/output interface MPIO, 2 CAN (controller local area network) interface of communicating by letter with 2 serials.

   Also have: background debug mode port BDM;

   Join serial ports interface chip and CAN interface chip that automobile specified 72 needle connectors are used;

   Outside FLASH;

   External SRAM;

   Latch hardware that chip links to each other with this microprocessor MPC500 control word switch that resets through data;

   Crystal oscillator drives chip with the bus that is controlled by hardware configuration switch;

   In addition, also have power supply and reset chip.

   For the I/O expansion board that the interface signal on the core mainboard is effectively expanded, it links to each other with the core mainboard by pin type standard connector JP1～JP5 between the circuit plate, and be equipped with special-purpose 72 needle sockets of automobile ECU (automatically controlled unit), consisted of by following part:

   Special-purpose 72 needle sockets of automobile ECU, it includes:

   The electric power system interface: it with the foregoing circuit plate between among the JP2 of pin type standard connector the power supply module interface link to each other;

   The PWM interface of PWM and analog signal output interface: PWM output interface and JP5 links to each other, and analog signal output interface links to each other through the PWM interface of high-speed light lotus root and JP5;

   Analog input interface: it with the foregoing circuit plate between among the JP4 of pin type standard connector the analog-to-digital conversion interface link to each other;

   Numeral amount input/output interface: it with the foregoing circuit plate between among the JP5 of pin type standard connector the parallel input/output interface MPIO of MIOS link to each other;

   TPU (time processing unit) interface: it with the foregoing circuit plate between the JP3 of pin type standard connector link to each other;

   Communication system interface, it comprises:

   Serial communication interface: it with the foregoing circuit plate between among the JP5 of pin type standard connector the serial interface of communicating by letter link to each other;

   The CAN interface of communicating by letter: it with the foregoing circuit plate between among the JP5 of pin type standard connector the total line interface of CAN link to each other;

   The two-port RAM interface.

   The data bus drives chip: it with the foregoing circuit plate between extend out data bus interface among the JP2 of pin type standard connector and link to each other with above-mentioned two-port RAM interface;

   The address bus drives chip: it with the foregoing circuit plate between extend out address bus interface among the JP2 of pin type standard connector and link to each other with above-mentioned two-port RAM interface;

   The address decoding chip: it extends out among the JP1 of pin type standard connector and extends out the control bus interface among address bus interface, the JP1 and link to each other with above-mentioned two-port RAM interface respectively with between the foregoing circuit plate.
2. 2. the many energy source and powers of MPC500 processing device formula electric automobile according to claim 1 always become control device, it is characterized in that, described hardware configuration control word switch includes:

   Switch S 1: totally 8, wherein

   If the VPP position is set to " 1 " state, do the inner erasable operation of FLASH of MPC500 and program voltage;

   The EPEE position is " 1 " state, and expression can be programmed and erasable FLASH;

   MODCK[1:3] three: latch chip drives through data, link to each other with MPC500, to dispose phase-locked ring (PLL)/clock operation pattern;

   Switch S 2, S3 and S4: each 8, latch chip by other three data respectively and link to each other with the data bus, with the control that resets of realization hardware;

   Switch S 5: totally 8, above-mentioned SRAM and FLASH are done sheet select.

Images