CN1404226A - Automatic frequency control aided capture method and device - Google Patents
Automatic frequency control aided capture method and device Download PDFInfo
- Publication number
- CN1404226A CN1404226A CN 01132747 CN01132747A CN1404226A CN 1404226 A CN1404226 A CN 1404226A CN 01132747 CN01132747 CN 01132747 CN 01132747 A CN01132747 A CN 01132747A CN 1404226 A CN1404226 A CN 1404226A
- Authority
- CN
- China
- Prior art keywords
- multiplier
- loop
- signal
- loop filter
- multiplying factor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The present invention is automatic frequency control aided capture method and device. In initial capture of the loop, the control signal value for the loop filter parameter is selected, the output signal of the frequency discriminator is fed to the accumulator or accumulation and to the first multiplier for multiplication; the output signal of the accumulator is fed to the second multiplier for multiplication and the output signals of the first multiplier and the second multiplier are added before fed to the next stage of loop filter circuit; and the control signal value for the loop filter is selected, so that the AFC circuit has short time from starting capture to stabilizing loop and small stationary frequency difference after capture. The present invention can simplify circuit design and improve loop performance.
Description
Technical field
The invention belongs to synchronous applications technical field in the communication technology, relate more specifically to the aided capture method and the device thereof of automatic frequency control (AFC) circuit.
Technical background
In order to reduce the loop transient state time, need to improve the gain of loop or increase loop bandwidth, but strengthen loop gain or loop bandwidth, can increase loop stable state frequency difference, therefore, in phase-locked loop, the loop parameter aided capture method that becomes commonly used is realized catching fast, and its basic ideas are when initial acquisition, increasing loop bandwidth or loop gain catches with quickening, behind loop-locking, reduce loop bandwidth or loop gain, to reduce the shake of stable state frequency difference, list of references [1] and [2] { [1] .Floyd M.Gardner, Phase Lock Technique (second edition), 1979, John Wiley publishes; [2] open the Sheng of fainting, Zheng Jiyu, Wan Xinping, Phase Lock Technique, in June, 1994, publishing house of Xian Electronics Science and Technology University } technology contents of this respect is disclosed, the present invention is applied to this technology in the AFC circuit.In AFC circuit and phase-locked loop circuit, loop filter generally adopts the value of this filter construction of single order ideal filter integrator in the loop filter of variable bandwidth front and back constant, make that the variation of loop after bandwidth is switched is slow, can avoid because the unexpected variation of bandwidth causes loop losing lock again, but the shortcoming of this filter construction is that to enter stable state after bandwidth is switched slower.
Summary of the invention
The objective of the invention is to enter the slower shortcoming of stable state after existing bandwidth to switch in the above-mentioned prior art, a kind of method and device thereof that is used for the aided capture that automatic frequency control circuit catches fast is provided in order to overcome.
The method and the device thereof of a kind of automatic frequency control aided capture of the present invention are realized by the following technical solutions, and the method for described a kind of automatic frequency control aided capture comprises that step is as follows:
1, when the loop initial acquisition, selects the control signal value of loop filter parameters;
2, the output signal of frequency discriminator is sent into accumulator and add up, send into first multiplier simultaneously and doubly take advantage of;
3, the output signal of accumulator being sent into second multiplier doubly takes advantage of;
4,, and the output signal after the addition is given the next stage circuit of loop filter with the output signal of first multiplier and the output signal of second multiplier;
5, wherein, parameter is selected control signal, if 1, then times multiplying factor of first multiplier is Kp1 in the filter; Become Ki1 with times multiplying factor of second multiplier; If 2, then times multiplying factor of first a multiplier times multiplying factor of changing into the Kp2 and second multiplier is changed into Ki2, the rest may be inferred;
6, repeat above-mentioned steps 2 to 5.
Wherein, times multiplying factor of first multiplier 2 and second multiplier 3 selects the value N of control signal 7 or 8 to control by loop filter parameters respectively.
The control signal value N of above-mentioned loop filter parameters is a positive integer, generally gets the N value and be 1 to 3 proper, and then the loop-locking decision circuit is too complicated too much, and can establish a loop filter times multiplying factor and satisfy Kp1＞Kp2＞Kp3...KpN, Ki1＞Ki2＞Ki3...KiN., when promptly loop had just begun to catch, loop filter parameters was bigger, loop bandwidth is bigger, catch with quickening, behind loop-locking, reduce loop filter parameters, loop bandwidth is reduced, to guarantee tracking and filtering performance.
A kind of automatic frequency control aided capture device of the present invention comprises:
An input is used for the input signal of receiving filter, and this signal divides two-way, i.e. first signal and secondary signal;
One first multiplier is used for first signal of the input signal of receiving filter, and multiplies each other with a times multiplying factor Kp;
An accumulator is used for the secondary signal of the input signal of receiving filter, and adds up and quadrature;
One second multiplier is used to receive the output signal of accumulator, and multiplies each other with a times multiplying factor Ki;
An adder is used for the output signal of first multiplier and second multiplier is carried out addition, and its output signal is delivered to the output of loop filter;
Wherein, times multiplying factor of first multiplier and second multiplier by loop filter parameters select control signal or value N control.
The method and the device thereof of the aided capture that a kind of AFC of being used for circuit of the present invention is caught fast, fine setting effect by the AFC circuit, the carrier frequency that the carrier frequency tracking of received signal is transmitted reduces because received signal frequency that Doppler frequency shift, transmitting terminal signal frequency unsteadiness and local crystal oscillator cause and the frequency difference between the emission signal frequency.By method and the device thereof that adopts aided capture of the present invention, the AFC circuit was had from the time that begins to capture loop stability shorten, and catch the less advantage of back stable state frequency difference.Adopt improved loop filter structure can simplify circuit design, improve loop performance.
Description of drawings
Further specify method and apparatus of the present invention below in conjunction with drawings and Examples.Identical identical parts of mark On Behalf Of The Name among the figure.
Fig. 1 is the loop filter structure schematic diagram of available technology adopting of the present invention;
Fig. 2 is the variable bandwidth loop closed-loop frequency response curve chart of Frequent Filters in the prior art of the present invention;
Fig. 3 is the loop filter structure schematic diagram that adopts among the present invention;
Fig. 4 is the loop filter structure schematic diagram of automatic frequency control aided capture device among the present invention;
Fig. 5 is the variable bandwidth loop closed-loop frequency response curve chart that adopts postfilter of the present invention.
Embodiment
Fig. 1 is the loop filter structure schematic diagram of available technology adopting of the present invention.As shown in Figure 1, in AFC circuit and phase-locked loop circuit, loop filter generally adopts the single order ideal filter, the value of this filter construction integrator in the loop filter of variable bandwidth front and back is constant, make that the variation of loop after bandwidth is switched is slow, can avoid because the unexpected variation of bandwidth causes loop losing lock again, the shortcoming of this filter construction is that to enter stable state after bandwidth is switched slower.
Fig. 2 is the variable bandwidth loop closed-loop frequency response curve chart of Frequent Filters in the prior art of the present invention.As shown in Figure 2, the steady-state value of loop is 6K, 1500s constantly loop filter parameters switch to little bandwidth parameter, from this moment to loop stability, the about 10000s of required time.The present invention proposes a kind of improvement structure of filter simultaneously, can shorten to enter the stable state time after bandwidth is switched.
Fig. 3 is the loop filter structure schematic diagram that adopts among the present invention.As shown in Figure 3, the loop filter that adopts among the present invention comprises an input 1, is used for the input signal of receiving filter, and this signal divides two-way, i.e. first signal and secondary signal;
One first multiplier 2 is used for first signal of the input signal of receiving filter, and multiplies each other with a times multiplying factor Kp;
An accumulator 4 is used for the secondary signal of the input signal of receiving filter, and adds up and quadrature;
One second multiplier 3 is used to receive the output signal of accumulator, and multiplies each other with a times multiplying factor Ki;
An adder 5 is used for the output signal of first multiplier and second multiplier is carried out addition, and its output signal is delivered to the output 6 of loop filter.
Fig. 4 is the loop filter structure schematic diagram that filter parameter is selected control signal that has that adopts among the present invention.As shown in Figure 4, the loop filter that adopts among the present invention comprises;
An input 1 is used for the input signal of receiving filter, and this signal divides two-way, i.e. first signal and secondary signal;
One first multiplier 2 is used for first signal of the input signal of receiving filter, and multiplies each other with a times multiplying factor Kp;
An accumulator 4 is used for the secondary signal of the input signal of receiving filter, and adds up and quadrature;
One second multiplier 3 is used to receive the output signal of accumulator, and multiplies each other with a times multiplying factor Ki;
An adder 5 is used for the output signal of first multiplier 2 and second multiplier 3 is carried out addition, and its output signal is delivered to the output 6 of loop filter.
Wherein, times multiplying factor of first multiplier 2 and second multiplier 3 selects the value N of control signal 7 or 8 to control by loop filter parameters respectively.
When the loop filter shown in the above-mentioned accompanying drawing 3 was used for the aided capture circuit, times multiplying factor of first multiplier 2 and second multiplier 3 was variable, and loop filter has the selection of an input signal control loop filter parameter in addition.As shown in accompanying drawing 4.Filter parameter selects control signal 7,8 to import first multiplier 2 and second multiplier 3, times multiplying factor of control loop filter multiplier respectively.When loop filter parameters selected control signal to be 1, times multiplying factor of first multiplier 2 was Kp1, and times multiplying factor of second multiplier 3 is Ki1; When loop filter parameters selected control signal to be 2, times multiplying factor of first multiplier 2 was Kp2, and times multiplying factor of second multiplier 3 is Ki2; When loop filter parameters selected control signal to be 3, times multiplying factor of first multiplier 2 was Kp3, and times multiplying factor of second multiplier 3 is Ki3, and the rest may be inferred.In general, loop filter parameters signal value is N, and N is a positive integer, and General N is 1～3 proper, and then the loop-locking decision circuit is too complicated too much.
When adopting this loop filter aided capture, can establish loop filter times multiplying factor Kp1＞Kp2＞Kp3...KpN, Ki1＞Ki2＞Ki3...KiN, when promptly loop had just begun to catch, loop filter parameters was bigger, loop bandwidth is bigger, catch with quickening, behind loop-locking, reduce loop filter parameters, loop bandwidth is reduced, to guarantee tracking and filtering performance.Below, be example to select two cover loop filter parameters for use, implementation procedure of the present invention is described:
1, when the loop initial acquisition, it is 1 that loop filter parameters is selected control signal, and times multiplying factor of first multiplier 2 is Kp1 in the loop filter, and times multiplying factor of second multiplier 3 is Ki1;
2, the output signal of frequency discriminator is sent into accumulator 4 from input 1 and is added up, and sends into first multiplier simultaneously and takes advantage of Kp1 for 2 times;
3, the output signal of accumulator 4 is sent into the multiplication factor Ki1 of second multiplier, 3, the second multipliers 3;
4, export to the next stage circuit of loop filter after the output signal addition of the output signal of first multiplier 2 and second multiplier 3 by last thorough output 6;
5, judge parameter selection control signal, if 1, then times multiplying factor of first multiplier 2 and second multiplier 3 is constant in the filter; If 2, then times multiplying factor of first multiplier 2 changes Kp2 into, times multiplying factor of second multiplier 3 changes Ki2 into;
6, repeat above-mentioned 2～5.
Wherein, times multiplying factor of first multiplier 2 and second multiplier 3 selects the value N of control signal 7 or 8 to control by loop filter parameters respectively.
Fig. 5 is the variable bandwidth loop closed-loop frequency response curve chart that adopts postfilter of the present invention.As shown in Figure 5, this figure is the AFC loop closed-loop response curve analogous diagram when adopting method of the present invention, adopts aided capture method to make capture time less than 200s, in addition, compare as seen, adopt loop filter structure shown in the present with Fig. 2, after bandwidth was switched, loop entered stable state soon.
For the purpose of illustration and description, provide the description of the front of the preferred embodiment of the present invention.It is not detailed or limits the invention to the accurate form of exposure.According to top instruction many modifications and variations is possible.For example, the desirable loop filter structure of single order of the present invention is first integration, after multiply each other.This filter apparatus equally also can be used for digital PLL circuit, in the AFC of WCDMA UE circuit, can adopt this invention, and scope of the present invention is not to be limited by this detailed description, but defined by the appended claims.
Claims (5)
1. the method for an automatic frequency control aided capture, it is characterized in that: it is as follows that the method comprising the steps of:
(1) when the loop initial acquisition, selects the control signal value of loop filter parameters;
(2) output signal of frequency discriminator is sent into accumulator by input and add up, send into first multiplier simultaneously and doubly take advantage of;
(3) output signal of accumulator being sent into second multiplier doubly takes advantage of;
(4), and the output signal after the addition is given the next stage circuit of loop filter with the output signal of first multiplier and the output signal of second multiplier;
(5) wherein, parameter is selected control signal, if 1, then times multiplying factor of first multiplier is Kp1 in the filter; Become Ki1 with times multiplying factor of second multiplier; If 2, then times multiplying factor of first a multiplier times multiplying factor of changing into the Kp2 and second multiplier is changed into Ki2, the rest may be inferred;
(6) repeat above-mentioned steps (2) to (5).
Wherein, times multiplying factor of first multiplier 2 and second multiplier 3 selects the value N of control signal to control by loop filter parameters respectively.
2, method according to claim 1 is characterized in that: the control signal value N of described loop filter parameters is a positive integer, generally gets the N value and be 1 to 3 proper.
3, method according to claim 2, it is characterized in that: described loop filter times multiplying factor should satisfy Kp1＞Kp2＞Kp3...KpN and Ki1＞Ki2＞Ki3...KiN., be that loop is when just having begun to catch, loop filter parameters is bigger, and loop bandwidth is bigger, catches with quickening, behind loop-locking, reduce loop filter parameters, loop bandwidth is reduced, to guarantee tracking and filtering performance.
4, a kind of automatic frequency control aided capture device, it is characterized in that: described device comprises:
An input (1) is used for the input signal of receiving filter, and this signal divides two-way, i.e. first signal and secondary signal;
One first multiplier (2) is used for first signal of the input signal of receiving filter, and multiplies each other with a times multiplying factor Kp:
An accumulator (4) is used for the secondary signal of the input signal of receiving filter, and adds up and quadrature;
One second multiplier (3) is used to receive the output signal of accumulator (4), and multiplies each other with a times multiplying factor Ki;
An adder (5) is used for the output signal of first multiplier (2) and second multiplier (3) is carried out addition, and its output signal is delivered to the output (6) of loop filter;
Wherein, times multiplying factor of first multiplier (2) and second multiplier (3) selects the value N of control signal (7) or (8) to control by loop filter parameters.
5, device according to claim 4 is characterized in that: the control signal value N of described loop filter parameters is a positive integer, generally gets the N value and be 1 to 3 proper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01132747 CN1404226A (en) | 2001-09-03 | 2001-09-03 | Automatic frequency control aided capture method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01132747 CN1404226A (en) | 2001-09-03 | 2001-09-03 | Automatic frequency control aided capture method and device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1404226A true CN1404226A (en) | 2003-03-19 |
Family
ID=4671553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 01132747 Pending CN1404226A (en) | 2001-09-03 | 2001-09-03 | Automatic frequency control aided capture method and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1404226A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106656168A (en) * | 2016-12-30 | 2017-05-10 | 北京集创北方科技股份有限公司 | Clock data restoration device and method |
| CN113485507A (en) * | 2021-07-07 | 2021-10-08 | 深圳东昇射频技术有限公司 | High-precision anti-noise multiplication control voltage-to-current method |
-
2001
- 2001-09-03 CN CN 01132747 patent/CN1404226A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106656168A (en) * | 2016-12-30 | 2017-05-10 | 北京集创北方科技股份有限公司 | Clock data restoration device and method |
| CN106656168B (en) * | 2016-12-30 | 2020-09-04 | 北京集创北方科技股份有限公司 | Clock data recovery device and method |
| CN113485507A (en) * | 2021-07-07 | 2021-10-08 | 深圳东昇射频技术有限公司 | High-precision anti-noise multiplication control voltage-to-current method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7498890B2 (en) | Continuous reversible gear shifting mechanism | |
| CN1183677C (en) | PLL loop filter with switched-capacitor resistor | |
| CN1901375A (en) | Linear phase-locked loop with dual tuning elements | |
| CN1883119A (en) | Phase-locked loop structure with enhanced signal stability | |
| US20090304135A1 (en) | Synchronous clock generation apparatus and synchronous clock generation method | |
| JPWO2007055114A1 (en) | Correlated double sampling circuit and sample hold circuit | |
| US11296710B2 (en) | Digital subsampling PLL with DTC-based SAR phase estimation | |
| US7580498B2 (en) | Closed loop control system and method of dynamically changing the loop bandwidth | |
| CN1146120A (en) | Digital carrier wave restoring device and method therefor in television signal receiver | |
| CN1075579A (en) | Mark N with the compound multiple accumulator of series connection is synthetic | |
| CN1898932A (en) | Method and apparatus for compensating i/q imbalance in receivers | |
| CN112804173A (en) | High-dynamic large-frequency-offset carrier tracking method | |
| CN1404226A (en) | Automatic frequency control aided capture method and device | |
| CN1096794C (en) | Method for reducing carrier recovery time in high definition television receiver | |
| CN1189032C (en) | Automatic gain controller and method for outputing gain control signal | |
| WO2008015816A1 (en) | Frequency synthesizer and loop filter used therein | |
| CN1189041C (en) | Digital colour signal reproducing system | |
| TWI357216B (en) | Frequency adjusting apparatus and adjusting method | |
| CN1171423C (en) | Digital satellite broadcasting receiver for changing PLL loop band-width during center controlling | |
| CN1249568A (en) | Radio equipment comprising frequency synthesizer and phase discriminator | |
| CN1490962A (en) | Automatic frequency controller and method thereof | |
| CN1324815C (en) | Signal phase tracking network | |
| CN1143493C (en) | Radio signal receiving apparatus and method of radio signal reception | |
| CN1578189A (en) | Frequency offset detector for afc under rayleigh fading | |
| US6157264A (en) | Phase-locked loop with tunable oscillator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |