CN1333532C - Quadrature frequency division complex digita receiver - Google Patents
Quadrature frequency division complex digita receiver Download PDFInfo
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- CN1333532C CN1333532C CNB2004100034998A CN200410003499A CN1333532C CN 1333532 C CN1333532 C CN 1333532C CN B2004100034998 A CNB2004100034998 A CN B2004100034998A CN 200410003499 A CN200410003499 A CN 200410003499A CN 1333532 C CN1333532 C CN 1333532C
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Abstract
The present invention relates to an orthogonal frequency division multiplex digital receiver which belongs to the technical field of wireless communication. The present invention is characterized in that the orthogonal frequency division multiplex digital receiver comprises a medium frequency sampling analog/digital converter, a digital down conversion extractor, a frame synchronization and frequency deviation estimator, a first forward frequency deviation corrector, a fast Fourier transformer (FFT), a compensator and a phase estimator, wherein the received OFDM signals are converted into OFDM data stream by the medium frequency sampling analog/digital converter through band pass sampling, the OFDM data stream is down converted by the digital down conversion extractor so as to extract the character rate, the frame synchronization and frequency deviation estimator adopts a specified synchronization method to extract the starting position of frames and the deviation value of frequency, the first forward frequency deviation corrector adjusts the phase of OFDM data according to the error of frequency deviation, the FFT carries out fast Fourier transformation on OFDM data symbols and outputs carrier wave symbols, the compensator compensates channel distortion and the coarse value of frequency deviation and detects the phase error increment of the data symbols, and a second forward frequency deviation corrector adjusts the phase drift of sub-carrier wave symbols and ensures the correct demodulation of the data symbols.
Description
Technical field
The present invention relates to digital communication technology field, particularly a kind of digital receiver that is used for OFDM (OFDM) communication system.
Background technology
OFDM (OFDM) is a kind of transmission technology of broad band multicarrier efficiently, has higher band efficiency and outstanding ability of anti-multipath, is suitable for high speed data transfer.At present, the OFDM technology is used widely in different communication systems, as European digital television broadcasting standard DVB-T, WLAN standard IEEE802.11a and HiperLAN2, wireless metropolitan area network standard IEEE802.16a etc.
Because the existing OFDM receiving equipment commercial chip groups that adopt concrete standard, flexibility is very limited more.And a key issue of its design is exactly that the digitlization that how to realize ofdm signal receives with fast synchronously, improves receptivity when reducing circuit cost, and this also is the difficult point that receiver designs.
Summary of the invention
The present invention has designed a kind of middle OFDM digital received machine equipment of realizing of programmable logic array (FPGA) at the scene that is easy to.
The invention has the advantages that, by adopting the A/D converter of if sampling, the Digital Down Convert of OFDM data flow is handled and is drawn into character rate, A/D converter can freely be sampled fully, be not subjected to the control of follow-up digital circuit.Simultaneously, all ofdm signal processing procedures all can adopt programmable logic device to realize that at numeric field system configuration is flexible, extensibility is strong.OFDM digital receiver of the present invention has the total digitalization design, the flexibility height, characteristics such as antijamming capability is strong, and algorithm is simple, can realize that in monolithic field programmable logic device (FPGA) the realization scale in the Xilinx Series FPGA is less than 250,000 fully.
The invention is characterized in that it contains:
A band pass filter, input is an orthogonal frequency-division multiplex singal;
An analog to digital converter, input links to each other with the output of the bandpass filtered signal of above-mentioned band pass filter;
Digital Down Convert and withdrawal device, input links to each other with the if sampling data output end of above-mentioned analog to digital converter;
Frame synchronization and frequency offset estimator, input links to each other with the baseband signal output of withdrawal device with above-mentioned Digital Down Convert, frame synchronization and frequency offset estimator have three outputs, are respectively: phase pushing figure output, correcting frequency deviation start-up control signal output part, integer frequency output;
The first forward direction correcting frequency deviation device, first input links to each other with the baseband signal output of withdrawal device with above-mentioned Digital Down Convert, and second and third two inputs link to each other with correcting frequency deviation start-up control signal output part with the phase pushing figure output of frequency offset estimator with above-mentioned frame synchronization respectively;
Deserializer, input links to each other with the baseband signal serial output terminal through correcting frequency deviation of the above-mentioned first forward direction correcting frequency deviation device;
A fast Fourier transformer, i.e. FFT, input links to each other with the data output end of above-mentioned deserializer;
A channel estimator, input links to each other with the data output end of above-mentioned FFT;
A compensator, first input links to each other with the subcarrier data symbol output of above-mentioned FFT, and second and third two inputs link to each other with the integer frequency output of frequency offset estimator with channel frequency response estimated value output, the frame synchronization of above-mentioned channel estimator respectively;
One differs estimator, and input links to each other with the subcarrier data symbol output of adjusting through displacement with above-mentioned compensator;
The second forward direction correcting frequency deviation device, two inputs respectively with above-mentioned compensator through displacement and adjust subcarrier data symbol output, the phase drift estimated value output that differs the subcarrier data symbol of estimator links to each other;
A de-mapping device, input links to each other with the adjusted subcarrier data symbol output of the second forward direction correcting frequency deviation device, and output is original data bits stream.
Feature of the present invention is that also described Digital Down Convert and withdrawal device contain:
First, second two real multipliers, the input of first, second real multipliers all link to each other with the if sampling data output end of above-mentioned analog to digital converter;
First low pass filter, two inputs link to each other with the down-conversion real part output of first real multipliers, the down-conversion imaginary part output of second real multipliers respectively;
Feature of the present invention is that also described frame synchronization and frequency offset estimator contain:
A cross-correlation calculation device; The baseband signal output of the low pass filter in input and above-mentioned Digital Down Convert and the withdrawal device links to each other, and another input links to each other with local reference sequences;
The conjugation associated counter of a time-delay M, M is the repetition period of training sequence, the baseband signal output of the low pass filter in input and above-mentioned Digital Down Convert and the withdrawal device links to each other;
The conjugation associated counter of a time-delay N, N is the length of FFT, the baseband signal output of the low pass filter in input and above-mentioned Digital Down Convert and the withdrawal device links to each other;
First square summer, input links to each other with the output of above-mentioned cross-correlation calculation device, and described output signal is the cross correlation value of baseband signal and local reference sequences;
The second square of summer, input links to each other with the output of the conjugation correlation calculator of above-mentioned time-delay M, and described output signal is the conjugation correlation of M unit of baseband signal time-delay;
A threshold judgement device, input links to each other with the output of above-mentioned second square of summer;
A peak detector, data input pin links to each other with the output of above-mentioned first square summer, and the peak value of peak detector detects the start-up control signal input part and links to each other by signal output part with the threshold judgement of above-mentioned threshold judgement device;
A counter, input links to each other with the peak pulse output of above-mentioned peak detector;
A data flow on-off controller, two inputs begin to link to each other with the count pulse output of termination signal output, peak detector with the counting of above-mentioned counter respectively;
An arctan look-up table, i.e. arithmetic unit, two inputs link to each other with the output of the conjugation correlation calculator of the conjugation associated counter of above-mentioned time-delay M, time-delay N respectively;
An adjustment arithmetic unit, by real multipliers with round device and contact successively and constitute, the input of real multipliers links to each other with the operation result data output end of the conjugation correlation of the time-delay M of above-mentioned arctan look-up table, another input that rounds device links to each other with the peak signal output of above-mentioned peak detector, adjusts the output of arithmetic unit and export the integer frequency offset value when the count pulse of above-mentioned peak detector reaches peak value;
A shift unit, input links to each other with the conjugation correlation operation result data output end of the time-delay N of above-mentioned arctan look-up table, another input links to each other with the peak pulse output of above-mentioned peak detector, and output is the output phase tilt value under the control of the pulse of above-mentioned peak detector.
Feature of the present invention is that also the described first forward direction correcting frequency deviation device contains:
The first sine and cosine look-up table, input links to each other with the phase pushing figure output of adjustment arithmetic unit in the frequency offset estimator with above-mentioned frame synchronization;
First complex multiplier, a multiplication input links to each other with the output of above-mentioned sine and cosine look-up table, another multiplication input links to each other with the baseband signal output of low pass filter in the withdrawal device with above-mentioned Digital Down Convert, and the enable signal input of multiplier links to each other with the output of above-mentioned frame synchronization with the correcting frequency deviation start-up control signal of frequency offset estimator; Output links to each other with the input of above-mentioned deserializer.
Feature of the present invention is that also described compensator contains:
Second shift unit, data input pin links to each other with the subcarrier data symbol output of above-mentioned FFT, and number of shift bits control input end and above-mentioned frame synchronization link to each other with integer frequency output in the frequency offset estimator;
Second complex multiplier, an input links to each other with the output of above-mentioned shift unit, and another input links to each other with the output of above-mentioned channel estimator.
Feature of the present invention is that also the described estimator that differs contains:
An accumulator, input links to each other with the imaginary part pilot tone of the subcarrier data symbol output of above-mentioned compensator;
Second low pass filter, input links to each other with the data output end of above-mentioned accumulator, and phase drift estimated value output links to each other with the input of the above-mentioned second forward direction correcting frequency deviation device.
Feature of the present invention is that also the described second correcting frequency deviation device contains:
The second sine and cosine look-up table, input links to each other with the phase drift estimated value output that differs estimator;
The 3rd complex multiplier, the output of an above-mentioned sine and cosine look-up table of input, second input links to each other with the subcarrier data symbol output of above-mentioned compensator.
Feature of the present invention is that also described adjustment arithmetic unit contains:
The 3rd real multipliers, the operation result data output end of the conjugation correlation of the time-delay M of an input and above-mentioned arctan look-up table, another input links to each other with local multiplying power parameter;
One rounds device, and the output of above-mentioned the 3rd real multipliers of input links to each other, and another input links to each other with the peak signal output of above-mentioned peak detector.
Description of drawings
Fig. 1 is the structural representation of OFDM digital receiver of the present invention.
Fig. 2 is the structural representation of Digital Down Convert of the present invention and withdrawal device implementation.
Fig. 3 is the structural representation of frame synchronization of the present invention and frequency offset estimator.
Fig. 4 is the structural representation of the first forward direction correcting frequency deviation device of the present invention.
Fig. 5 is the structural representation of compensator of the present invention.
Fig. 6 is the structural representation of phase estimating device of the present invention.
Fig. 7 is the structural representation of the second forward direction correcting frequency deviation device of the present invention.
Fig. 8 is the structural representation of adjustment arithmetic unit of the present invention.
Fig. 9 is the operational flowchart of OFDM digital receiver of the present invention.
Figure 10 is the operational flowchart of Digital Down Convert of the present invention and withdrawal device implementation.
Figure 11 is the operational flowchart of frame synchronization of the present invention and frequency offset estimator.
Embodiment
Embodiment is a received signal with IEEE802.11a, and its characteristics, implementation are described in detail in detail.
According to an aspect of the present invention, provide a kind of OFDM digital receiver (referring to accompanying drawing 1), this device comprises a band pass filter, is used for the filtration to signal outside the spectral range; An A/D converter is used for the signal after the bandpass filtering is carried out if sampling; Digital Down Convert and withdrawal device are used for the if sampling data are converted to baseband signal; Frame synchronization and frequency offset estimator are used to carry out the location of OFDM frame head and the extraction of frequency deviation rough estimate evaluation; Two forward direction correcting frequency deviation devices, wherein the first correcting frequency deviation device is used to correct phase place deflection; The second correcting frequency deviation device is used to correct phase place deflection residual fraction; A serial/parallel transducer is used for serial signal is converted to parallel signal; A fast Fourier transform (FFT) device is used for the data after the serial/parallel conversion are carried out fast Fourier transform; A channel estimator is used for the estimated value of calculating channel frequency response; A compensator is used for the subcarrier data symbol is carried out displacement and adjustment on the frequency spectrum; One differs estimator, is used for extracting from the subcarrier data symbol estimated value of phase drift; A de-mapping device is used for the subcarrier data symbol is carried out the demodulation judgement, thereby obtains original data bits stream.
The implementation of Digital Down Convert of the present invention and withdrawal device (referring to accompanying drawing 2) comprises first, second multiplier and first low pass filter, and wherein, first multiplier is used to calculate the real part of Digital Down Convert signal; Second multiplier is used to calculate the imaginary part of Digital Down Convert signal; First low pass filter is then with the outer part of the band of filtering baseband signal.
The implementation of frame synchronization of the present invention and frequency offset estimator (referring to accompanying drawing 3) is to adopt digital correlation circuit and decision circuit, comprises a cross-correlation calculation device, is used to calculate the cross correlation value of list entries and local reference sequences; The conjugation correlation calculator of a time-delay M=N/4 is used to calculate the conjugation correlation behind M the unit of list entries time-delay (wherein M is the repetition period of training sequence, and N is the length of fast Fourier transform); The conjugation correlation calculator of a time-delay N is used to calculate the conjugation correlation of N unit of list entries time-delay; Two squares of summers, first square of summer is used for the cross-correlation calculation result is carried out a square summation operation, and second square of summer carries out a square summation operation to the conjugation correlation computations result of time-delay M; A threshold judgement device, whether the result who is used to judge second square of summer greater than preset threshold, whether exports the result of first square of summer to follow-up peak detector with control; A peak detector is used to detect first square of result's that summer is exported peak value, sends count pulse when peak value occurs; A counter is used for the peak value testing result is counted; A data flow on-off controller is used for enabling the output of baseband signal streams when the counter meter is full; An arctan look-up table is used for the conjugation correlation computations result of time-delay M and the conjugation correlation computations result of time-delay N are carried out the arctan computing; An adjustment arithmetic unit is used for first arctan operation result is adjusted computing, obtains the integer-times frequency offset value; First shift unit is used for second arctan operation result carried out displacement, obtains the phase place tilt value.
The implementation of the first forward direction correcting frequency deviation device of the present invention comprises the first sine and cosine table and first complex multiplier, and wherein, the first sine and cosine table is used for calculating fast the sine and cosine value of frequency deviation, and first complex multiplier is finished the forward direction correcting frequency deviation and calculated.(referring to accompanying drawing 4).
The implementation of compensator of the present invention comprises second shift unit and second complex multiplier, and wherein second shift unit is used for compensating for frequency offset and slightly is worth, and second complex multiplier is used for compensate for channel distortions.(referring to accompanying drawing 5).
The implementation that differs estimator of the present invention comprises an accumulator and second low pass filter, and wherein, adder is used to calculate the error increment of phase drift; Low pass filter is used to obtain the estimated value of phase drift.(referring to accompanying drawing 6).
The implementation of the second forward direction correcting frequency deviation device of the present invention comprises the second sine and cosine table and the 3rd complex multiplier, and wherein, the second sine and cosine table is used for calculating fast the sine and cosine value of frequency deviation, and the 3rd complex multiplier is finished the forward direction correcting frequency deviation and calculated.(referring to accompanying drawing 7).
The implementation of adjustment arithmetic unit of the present invention comprises that the 3rd real multipliers and one round device.Wherein, the 3rd real multipliers is used for first arctan operation result and a real number are multiplied each other; Round device and be used for the result of above-mentioned real multiplications is rounded downwards, obtain required integer-times frequency offset value.(referring to accompanying drawing 8)
According to another aspect of the present invention, the implementation method of described OFDM digital receiver may further comprise the steps: at first with band pass filter list entries is filtered; Then, mould/number conversion is carried out in the result's sampling after filtering; Then, mould/number conversion result is carried out Digital Down Convert and digital low-pass filtering, to extract baseband signal; Then, the synchronous points of catching the OFDM frame from the baseband signal line frequency of going forward side by side is estimated partially; Then, the result according to frequency offset estimating carries out the correcting frequency deviation first time to baseband signal; Then, convert the serial baseband signal after the correcting frequency deviation to parallel signal; Then the parallel signal data are carried out fast Fourier transform; Simultaneously, channel estimator utilizes the estimated value of the fast Fourier transform calculating channel frequency response as a result of leading training sequence; Then, the compensator integer value of utilizing the estimated value of channel frequency response and frequency deviation rough estimate is carried out displacement and adjustment on the frequency spectrum to the sub-carrier of fast Fourier transformer output; Then, differ the subcarrier data symbol extraction phase drift amount of estimator from compensator output; Then, the second correcting frequency deviation device utilizes the phase drift amount that the subcarrier data symbol of compensator output is adjusted; At last, the output result of the second correcting frequency deviation device delivers to de-mapping device and carries out the demodulation judgement, output original data bits (referring to accompanying drawing 9).
According to another aspect of the present invention, the implementation method of described Digital Down Convert and withdrawal device may further comprise the steps: real part and the imaginary part of calculating the Digital Down Convert signal; Carry out simultaneously digital down-conversion signal is carried out low-pass filtering, obtain baseband signal (referring to accompanying drawing 10).
According to another aspect of the present invention, the implementation method of described frame synchronization and frequency offset estimator may further comprise the steps: at first, calculate the cross correlation value of list entries and local reference sequences, simultaneously, calculate the conjugation correlation and the conjugation correlation in list entries N sampling interval of time-delay in list entries M sampling interval of time-delay; Then, cross correlation value is carried out a square summation, simultaneously, conjugation correlation to list entries M the sampling interval of time-delay carries out a square summation, and simultaneously, the conjugation correlation and the conjugation correlation in list entries N sampling interval of time-delay to list entries M the sampling interval of time-delay carries out the arctan computing respectively; Then, arctan operation result to the conjugation correlation in M sampling interval of list entries time-delay is adjusted computing, simultaneously, arctan operation result to the conjugation correlation of N unit of list entries time-delay is shifted, and simultaneously, the quadratic sum value of the conjugation correlation in list entries M sampling interval of time-delay is carried out threshold judgement; When threshold judgement passes through, the quadratic sum value of cross correlation value is carried out peak value detect; When peak value occurred, output was adjusted operation result as integer frequency offset, and the output shift result simultaneously, is counted the peak value number as the phase place tilt value; When counter is full, the enable data flow control switch.(referring to accompanying drawing 11).
By be described in detail other purpose, characteristic and the advantage that the present invention may be better understood below in conjunction with the embodiment of accompanying drawing to OFDM digital receiver of the present invention and its implementation.
Referring to Fig. 1 OFDM digital receiver of the present invention is described.As shown in Figure 1, this OFDM digital receiver is by band pass filter 101, A/D converter 102, Digital Down Convert and withdrawal device 103, frame synchronization and frequency offset estimator 104, the first correcting frequency deviation devices 105, serial/parallel transducer 106, fast Fourier transform (FFT) device 107, channel estimator 108, compensator 109 differs estimator 110, the second correcting frequency deviation device 111, de-mapping device 112 is formed.Band pass filter 101 is used for the filtration to signal outside the spectral range.A/D converter 102 is used for the signal after the bandpass filtering is carried out if sampling.Digital Down Convert and withdrawal device 103 are used for the if sampling data are converted to baseband signal.Frame synchronization and frequency offset estimator 104 are used to carry out the location of OFDM frame head and the extraction of the thick value of frequency deviation.The first correcting frequency deviation device 105 is used to correct phase place deflection.Serial/parallel transducer 106 is used for the output signal of the first correcting frequency deviation device 105 is converted to parallel signal.Fast Fourier transformer 107 is used for the data after the serial/parallel conversion are carried out fast Fourier transform.Channel estimator 108 is used for the estimated value of calculating channel frequency response.Compensator 109 is used for the dateout of fast Fourier transformer 107 is carried out displacement and adjustment on the frequency spectrum.Differing estimator 110 is used for from the estimated value of the subcarrier data symbol extraction phase drift of compensator 109 outputs.The second correcting frequency deviation device 111 is used to adjust the subcarrier data symbol of compensator 109 outputs.De-mapping device 112 is used for the subcarrier data symbol of the second correcting frequency deviation device, 111 outputs is carried out the demodulation judgement, thereby obtains original data bits stream.
An embodiment of Digital Down Convert of the present invention and withdrawal device is described below with reference to Fig. 2.In Fig. 2, Digital Down Convert of the present invention and withdrawal device are by the first real multipliers 201a and the second real multipliers 201b, and first low pass filter 202 is formed.The first real multipliers 201a is used to calculate the real part of Digital Down Convert signal.The second real multipliers 201b is used to calculate the imaginary part of Digital Down Convert signal.First low pass filter 202 is used for the outer part of band of filtering baseband signal.This implementation method does not need sine and cosine look-up table stored data, can directly send the first correcting frequency deviation device 105 (referring to Fig. 1) to proofread and correct the data after handling, and hardware is realized simplifying.
Frame synchronization of the present invention and frequency offset estimator are described at the substandard embodiment of 802.11a below with reference to Fig. 3.The effect of frame synchronization of the present invention and frequency offset estimator is the extraction of carrying out the location of OFDM frame head and the thick value of frequency deviation, and extracting method is decided on sending signal frame structure.For the 802.11a system, frame synchronization and frequency offset estimator are made of digital correlation circuit and decision circuit, utilize the leading training sequence of frame head and the local sequence that receive to carry out related operation, and carry out related operation with its delayed sequence.In Fig. 3, frame synchronization of the present invention and frequency offset estimator be by cross-correlation calculation device 301, the conjugation correlation calculator 302 of time-delay M, the conjugation correlation calculator 303 of time-delay N, first square of summer 304a and second square of summer 304b, threshold judgement device 305, peak detector 306, the first counters 307, data flow on-off controller 308, arctan look-up table 309 is adjusted arithmetic unit 310, and shift unit 311 is formed.Cross-correlation calculation device 301 is used to calculate the cross correlation value of list entries and local reference sequences.The conjugation correlation calculator 302 of time-delay M is used to calculate the conjugation correlation behind M unit of list entries time-delay.The conjugation correlation calculator 303 of time-delay N is used to calculate the conjugation correlation of N unit of list entries time-delay.First square of summer 304a is used for the result of calculation of cross-correlator 301 is carried out a square summation operation.Second square of summer 304b is used for the result of calculation of the conjugation correlator 302 of time-delay M is carried out a square summation operation.Whether the result of calculation that threshold judgement device 305 is used to judge second square of summer 304b greater than preset threshold, whether exports the result of calculation of first square of summer 304a to follow-up peak detector 306 with control.Peak detector 306 is used to detect the peak value of first square of summer 304a result of calculation, sends count pulse when peak value occurs.Counter 307 is used for the testing result of peak detector 306 is counted.Data flow on-off controller 308 is used for when counter 307 is full, enables the Digital Down Convert in the OFDM digital receiver of the present invention and the output of withdrawal device 103 (referring to Fig. 1).Arctan look-up table 309 is used for the result of calculation of conjugation correlator 302 to time-delay M, and the result of calculation of the conjugation correlation calculator 303 of time-delay N is carried out the arctan computing.The arct that adjustment arithmetic unit 310 is used for the conjugation correlation of time-delay M is that operation result is adjusted computing, obtains the integer-times frequency offset value, is used for the input of the compensator 109 (referring to Fig. 1) of OFDM digital receiver of the present invention.First shift unit 311 is used for the arctan operation result of the conjugation correlation of time-delay N is carried out displacement, obtains the phase place tilt value of frequency deviation, is used for the input of the first correcting frequency deviation device 105 (referring to Fig. 1) of OFDM digital receiver of the present invention.
An embodiment of the first forward direction correcting frequency deviation device of the present invention is described below with reference to Fig. 4.In Fig. 4, the first forward direction correcting frequency deviation device of the present invention is made up of the first sine and cosine look-up table, 401, the first complex multipliers 402.The functional value of the first sine and cosine look-up table stores sine and cosine.This implementation method does not need complicated sine and cosine to calculate, and hardware is realized simplifying.
Below with reference to Fig. 5 describe compensator of the present invention an embodiment.In Fig. 5, compensator of the present invention is by second shift unit 501 and second complex multiplier 502, and wherein second shift unit is used for compensating for frequency offset and slightly is worth, and second complex multiplier is used for compensate for channel distortions.
Below with reference to Fig. 6 describe of the present invention differ estimator an embodiment.In Fig. 6, of the present invention differ estimator by the accumulator 601 and second low pass filter 602, wherein, accumulator will add up the error increment of phase drift; Second low pass filter is used for filtering and obtains the phase drift noise, the estimated value of acquisition.
An embodiment of the second forward direction correcting frequency deviation device of the present invention is described below with reference to Fig. 7.In Fig. 7, the second forward direction correcting frequency deviation device of the present invention and the first forward direction correcting frequency deviation device are similar, are made up of the first sine and cosine look-up table, 701, the three complex multipliers 702.The functional value of the first sine and cosine look-up table stores sine and cosine.This implementation method does not need complicated sine and cosine to calculate, and hardware is realized simplifying.
An embodiment of adjustment arithmetic unit of the present invention is described below with reference to Fig. 8.In Fig. 8, adjustment arithmetic unit of the present invention is rounded device 802 and is formed by the 3rd real multipliers 801.Wherein, real multipliers is used for first arctan operation result and local multiplying power parameter are multiplied each other; Round device and be used for the result of above-mentioned real multiplications is rounded downwards, obtain required integer-times frequency offset value.
The handling process of OFDM digital receiver of the present invention is described below with reference to Fig. 9.As shown in Figure 9, in step S901,101 pairs of ofdm signals of band pass filter filter, and filter the signal outside the spectral range.In step S902, A/D converter 102 carries out if sampling to be four times in after the bandpass filtering frequency of ofdm signal character rate, and make signal spectrum drop on the center in the 4th Nyquist district, make that after mould/number conversion the numeric field Frequency point of π/4 is dropped at the center of ofdm signal image spectra.In step S903, Digital Down Convert and withdrawal device 103 with the local carrier frequency of numeric field, after the wave digital lowpass filter extraction, obtain baseband signal with the if sampling signal times.In step S904, frame synchronization and frequency offset estimator 104 utilize digital correlation circuit and decision circuit to carry out the location and the frequency deviation rough estimate of OFDM frame head, obtain OFDM frame head position and frequency deviation and slightly are worth.In step S905, the first correcting frequency deviation device 105 is corrected the phase place deflection of deficiency ± subcarrier spacing.In step S906, the output signal of serial/parallel transducer 106 first correcting frequency deviation devices 105 is converted to parallel signal.In step S907, the data after 107 pairs of serial/parallel conversions of fast Fourier transformer are carried out fast Fourier transform.In step S908, channel estimator 108 utilizes the estimated value of original training sequence frequency domain value and fast Fourier transform calculating channel frequency response as a result thereof.In step S909, compensator 109 carries out displacement and adjustment on the frequency spectrum with the dateout of fast Fourier transformer 107, with thick value of compensating for frequency offset and channel distortion.In step S910, differ estimator 110 and directly will obtain the error increment of phase drift from the imaginary part addition of the pilot sub-carrier data symbol of compensator 109 output, handle by a low pass filter again, obtain the estimated value of phase drift.In step S911, the second correcting frequency deviation device 111 utilizes the phase drift value to adjust the subcarrier data symbol of compensator 109 outputs, or feeds back to the first forward direction correcting frequency deviation device, and frequency deviation rough estimate value is finely tuned.In step S912, the subcarrier data symbol of 112 pairs second correcting frequency deviation devices of de-mapping device, 111 outputs carries out the demodulation judgement, and output original data bits stream.
The handling process of Digital Down Convert of the present invention and withdrawal device is described below with reference to Figure 10.As shown in figure 10, in step SA01a, the first real multipliers 201a is with the sampled signal and 1,0 after the digital-to-analogue conversion, and one of-1,0 four values multiply each other, and obtain the real part of Digital Down Convert signal; Simultaneously, in step SA01b, the second real multipliers 201b is with the sampled signal and 0 after the digital-to-analogue conversion, and one of-1,0,1 four value multiplies each other, and obtains the imaginary part of Digital Down Convert signal.In step SA02,202 pairs of digital down-conversion signals of first low pass filter carry out low-pass filtering treatment, obtain baseband signal.
The handling process of frame synchronization of the present invention and frequency offset estimator is described below with reference to Figure 11.As shown in figure 11, in step SB01, cross-correlation calculation device 301 calculates the cross correlation value of list entries and local reference sequences.Simultaneously, in step SB02, the conjugation correlation calculator 302 of time-delay M calculates the conjugation correlation behind M unit of list entries time-delay.And simultaneously, in step SB03, the conjugation correlation calculator 303 of time-delay N calculates the conjugation correlation of N unit of list entries time-delay.In step SB04a, first square of summer 304a carries out a square summation operation to the result of calculation of cross-correlator 301.Simultaneously, in step SB04b, second square of summer 304b carries out a square summation operation to the result of calculation of the conjugation correlator 302 of time-delay M.And simultaneously, in step SB10, the result of calculation of the conjugation correlator 302 of 309 pairs of time-delays of arctan look-up table M, and the result of calculation of the conjugation correlation calculator 303 of time-delay N carried out the arctan computing respectively.In step SB11, adjust will the delay time arctan operation result of conjugation correlation of M of arithmetic unit 310 and adjust computing.Simultaneously, in step SB12, will the delay time arctan operation result of conjugation correlation of N of first shift unit 311 carries out the displacement computing.And simultaneously, in step SB05, threshold judgement device 305 judges that whether the result of calculation of second square of summer 304b is greater than preset threshold.If judgement is passed through, in step SB06, peak detector 306 detects the peak value of first square of summer 304a result of calculation.When peak value occurred, output was adjusted operation result as the integer frequency offset value in step SB13.Simultaneously, in step SB14, export the shift operation result as the phase place tilt value.Simultaneously, in step SB07, the number that 307 pairs of peak values of counter occur is counted.In step SB08, data flow on-off controller 308 judges whether counter 307 is counted full.If counter 307 completely, in step SB09, data flow on-off controller 308 enables the Digital Down Convert in the OFDM digital receiver of the present invention and the output of withdrawal device 103 (referring to Fig. 1).
Claims (8)
1, OFDM digital receiver device, it at the scene programmable gate array be that FPGA go up to realize, it is characterized in that it contains:
A band pass filter, input is an orthogonal frequency-division multiplex singal;
An analog to digital converter, input links to each other with the output of the bandpass filtered signal of above-mentioned band pass filter;
Digital Down Convert and withdrawal device, input links to each other with the if sampling data output end of above-mentioned analog to digital converter;
Frame synchronization and frequency offset estimator, input links to each other with the baseband signal output of withdrawal device with above-mentioned Digital Down Convert, frame synchronization and frequency offset estimator have three outputs, are respectively: phase pushing figure output, correcting frequency deviation start-up control signal output part, integer frequency output;
The first forward direction correcting frequency deviation device, first input links to each other with the baseband signal output of withdrawal device with above-mentioned Digital Down Convert, and second and third two inputs link to each other with correcting frequency deviation start-up control signal output part with the phase pushing figure output of frequency offset estimator with above-mentioned frame synchronization respectively;
Deserializer, input links to each other with the baseband signal serial output terminal through correcting frequency deviation of the above-mentioned first forward direction correcting frequency deviation device;
A fast Fourier transformer, i.e. FFT, input links to each other with the data output end of above-mentioned deserializer;
A channel estimator, input links to each other with the data output end of above-mentioned FFT;
A compensator, first input links to each other with the subcarrier data symbol output of above-mentioned FFT, and second and third two inputs link to each other with the integer frequency output of frequency offset estimator with channel frequency response estimated value output, the frame synchronization of above-mentioned channel estimator respectively;
One differs estimator, and input links to each other with the subcarrier data symbol output of adjusting through displacement with above-mentioned compensator;
The second forward direction correcting frequency deviation device, two inputs respectively with above-mentioned compensator through displacement and adjust subcarrier data symbol output, the phase drift estimated value output that differs the subcarrier data symbol of estimator links to each other;
A de-mapping device, input links to each other with the adjusted subcarrier data symbol output of the second forward direction correcting frequency deviation device, and output is original data bits stream.
2, OFDM digital receiver according to claim 1 is characterized in that, described Digital Down Convert and withdrawal device contain:
First, second two real multipliers, the input of first, second two real multipliers all link to each other with the if sampling data output end of above-mentioned analog to digital converter;
First low pass filter, two inputs link to each other with the down-conversion real part output of first real multipliers, the down-conversion imaginary part output of second real multipliers respectively;
3, OFDM digital receiver according to claim 1 is characterized in that, described frame synchronization and frequency offset estimator contain:
A cross-correlation calculation device; The baseband signal output of the low pass filter in input and above-mentioned Digital Down Convert and the withdrawal device links to each other, and another input links to each other with local reference sequences;
The conjugation associated counter of a time-delay M, M is the repetition period of training sequence, the baseband signal output of the low pass filter in input and above-mentioned Digital Down Convert and the withdrawal device links to each other;
The conjugation associated counter of a time-delay N, N is the length of FFT, the baseband signal output of the low pass filter in input and above-mentioned Digital Down Convert and the withdrawal device links to each other;
First square summer, input links to each other with the output of above-mentioned cross-correlation calculation device, and described output signal is the cross correlation value of baseband signal and local reference sequences;
The second square of summer, input links to each other with the output of the conjugation correlation calculator of above-mentioned time-delay M, and described output signal is the conjugation correlation of M unit of baseband signal time-delay;
A threshold judgement device, input links to each other with the output of above-mentioned second square of summer;
A peak detector, data input pin links to each other with the output of above-mentioned first square summer, and peak value detects the start-up control signal input part and links to each other by signal output part with the threshold judgement of above-mentioned threshold judgement device;
A counter, input links to each other with the peak pulse output of above-mentioned peak detector;
A data flow on-off controller, two inputs begin to link to each other with the count pulse output of termination signal output, peak detector with the counting of above-mentioned counter respectively;
An arctan look-up table, i.e. arithmetic unit, two inputs link to each other with the output of the conjugation correlation calculator of the conjugation associated counter of above-mentioned time-delay M, time-delay N respectively;
An adjustment arithmetic unit, by real multipliers with round device and contact successively and constitute, the input of real multipliers links to each other with the operation result data output end of the conjugation correlation of the time-delay M of above-mentioned arctan look-up table, another input that rounds device links to each other with the peak signal output of above-mentioned peak detector, adjusts the output of arithmetic unit and export the integer frequency offset value when the count pulse of above-mentioned peak detector reaches peak value;
A shift unit, an input links to each other with the conjugation correlation operation result data output end of the time-delay N of above-mentioned arctan look-up table, another input links to each other with the peak pulse output of above-mentioned peak detector, and output is the output phase tilt value under the control of the pulse of above-mentioned peak detector.
4, OFDM digital receiver according to claim 1 is characterized in that, the described first forward direction correcting frequency deviation device contains:
The first sine and cosine look-up table, input links to each other with the phase pushing figure output of adjustment arithmetic unit in the frequency offset estimator with above-mentioned frame synchronization;
First complex multiplier, a multiplication input links to each other with the output of the above-mentioned first sine and cosine look-up table, another multiplication input links to each other with the baseband signal output of low pass filter in the withdrawal device with above-mentioned Digital Down Convert, and the enable signal input of multiplier links to each other with the output of above-mentioned frame synchronization with the correcting frequency deviation start-up control signal of frequency offset estimator; Output links to each other with the input of above-mentioned deserializer.
5, OFDM digital receiver according to claim 1 is characterized in that, described compensator contains:
Second shift unit, data input pin links to each other with the subcarrier data symbol output of above-mentioned FFT, and number of shift bits control input end and above-mentioned frame synchronization link to each other with integer frequency output in the frequency offset estimator;
Second complex multiplier, an input links to each other with the output of above-mentioned shift unit, and another input links to each other with the output of above-mentioned channel estimator.
6, OFDM digital receiver according to claim 1 is characterized in that, the described estimator that differs contains:
An accumulator, input links to each other with the imaginary part pilot tone of the subcarrier data symbol output of above-mentioned compensator;
Second low pass filter, input links to each other with the data output end of above-mentioned accumulator, and phase drift estimated value output links to each other with the input of the above-mentioned second forward direction correcting frequency deviation device.
7, OFDM digital receiver according to claim 1 is characterized in that, the described second forward direction correcting frequency deviation device contains:
The second sine and cosine look-up table, input links to each other with the phase drift estimated value output that differs estimator;
The 3rd complex multiplier, the output of an above-mentioned sine and cosine look-up table of input, second input links to each other with the subcarrier data symbol output of above-mentioned compensator.
8, frame synchronization according to claim 3 and frequency deviation estimation device is characterized in that, described adjustment arithmetic unit contains:
The 3rd real multipliers, the operation result data output end of the conjugation correlation of the time-delay M of an input and above-mentioned arctan look-up table, another input links to each other with local multiplying power parameter;
One rounds device, and the output of above-mentioned the 3rd real multipliers of input links to each other, and another input links to each other with the peak signal output of above-mentioned peak detector.
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| CN1921464B (en) * | 2005-08-22 | 2010-05-05 | 松下电器产业株式会社 | Frequency domain communication channel prediction arithmetic |
| US7539125B2 (en) * | 2005-10-14 | 2009-05-26 | Via Technologies, Inc. | Method and circuit for frequency offset estimation in frequency domain in the orthogonal frequency division multiplexing baseband receiver for IEEE 802.11A/G wireless LAN standard |
| CN101039125B (en) * | 2006-03-16 | 2013-03-13 | 湖北众友科技实业股份有限公司 | Method and system of frequency deviation measurement for testing TD-SCDMA terminal |
| US7852972B2 (en) | 2006-05-22 | 2010-12-14 | Qualcomm Incorporated | Single-burst acquistion for wireless communication system |
| CN101552755B (en) * | 2008-04-03 | 2013-08-21 | 展讯通信（上海）有限公司 | Signal transmitting and receiving method based on subcarrier waves and transceiver |
| CN101312442B (en) * | 2008-05-22 | 2010-12-29 | 北京创毅视讯科技有限公司 | Estimation method and estimation unit for frame head and integral frequency bias of receiver frame head |
| CN101330324B (en) * | 2008-07-23 | 2012-07-25 | 深圳市云海通讯股份有限公司 | Method, apparatus and system for extracting synchronous indicating signal |
| CN101567701B (en) * | 2009-05-11 | 2012-09-05 | 深圳市统先科技股份有限公司 | High efficient multi-path digital down converter system |
| CN102281219B (en) * | 2010-06-09 | 2015-07-22 | 中兴通讯股份有限公司 | Method and apparatus for adjusting dynamic scope of signal |
| CN103023832B (en) * | 2011-09-23 | 2015-11-18 | 京信通信***（中国）有限公司 | The method and apparatus that receiver frequency deviation is estimated and compensated |
| CN103916194B (en) * | 2013-01-05 | 2016-12-07 | 华为技术有限公司 | Phase regulator and wavelength-division multiplex phase regulation method |
| CN104316761A (en) * | 2014-10-24 | 2015-01-28 | 中国电子科技集团公司第五十五研究所 | Test circuit of acoustic surface wave resonator type wireless sensor sensing echo frequency |
| CN109088650B (en) * | 2018-10-18 | 2020-04-14 | 西安电子科技大学 | Low-complexity multi-path OFDM receiver based on FPGA |
| JP7361549B2 (en) * | 2019-09-18 | 2023-10-16 | Kddi株式会社 | Receiving device and program |
| CN113169944B (en) * | 2020-04-29 | 2022-05-03 | 香港应用科技研究院有限公司 | Method for detecting cross product of narrow band signal under wide range Carrier Frequency Offset (CFO) using multiple frequency bands |
| CN112637946B (en) * | 2020-12-17 | 2022-04-05 | 重庆邮电大学 | PSS timing synchronization method suitable for large frequency deviation |
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