CN1333279C - 用于光互连模块的硅载体 - Google Patents

用于光互连模块的硅载体 Download PDF

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CN1333279C
CN1333279C CNB2004100909434A CN200410090943A CN1333279C CN 1333279 C CN1333279 C CN 1333279C CN B2004100909434 A CNB2004100909434 A CN B2004100909434A CN 200410090943 A CN200410090943 A CN 200410090943A CN 1333279 C CN1333279 C CN 1333279C
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light
integrated circuit
interconnecting modules
silicon carrier
optical
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CN1629671A (zh
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J·D·克罗
C·M·德卡塞提斯
J·A·卡沙
J·M·特雷惠拉
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Core Usa Second LLC
GlobalFoundries Inc
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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4228—Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements
    • G02B6/4232—Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements using the surface tension of fluid solder to align the elements, e.g. solder bump techniques
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects
    • G02B6/428—Electrical aspects containing printed circuit boards [PCB]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0274—Optical details, e.g. printed circuits comprising integral optical means
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Lasers (AREA)
  • Optical Couplings Of Light Guides (AREA)
  • Light Receiving Elements (AREA)
  • Optical Integrated Circuits (AREA)

Abstract

本发明的一个实施例为一种光互连模块，包括硅载体；安装在硅载体上的通信集成电路和安装在硅载体上的光集成电路倒装芯片。光集成电路通过硅载体中的电路径与通信集成电路电通信。硅载体中的光路径提供了光集成电路和光线路之间的光耦合。

Description

用于光互连模块的硅载体
技术领域
本发明总体涉及光学互连，特别涉及用于光互连模块的硅载体。
背景技术
光学互连用于多种应用，将光学部件耦合到电子部件。通常公认解决该问题的优选措施包括将光学部件集成到多芯片模块(MCMs)或单芯片模块(SCMs)。一个现有技术包括将激光器阵列直接安装到硅锗(SiGe)激光器驱动器芯片上。然而，该措施增加了额外的成本并产生难以解决的热挑战。热挑战有两层含义：首先，热敏激光器与产生热的SiGe驱动器电路密切接触，影响了激光器的性能和可靠性。其次，由于散热器不能接触激光器区域中的芯片和驱动器线接合焊盘，从而与驱动器的接触面积很小，因此驱动器电路上的散热器不是很有效。
成本增加来源于SiGe芯片，为执行封装功能并且含有需要的驱动器电路，因此芯片尺寸过大。采用该设计没有很有效地布设电路，并估计小于15％的芯片面积。由此，很明确需要一种新型的激光器阵列封装。
发明内容
本发明所要解决的技术问题是提供一种新颖结构的光互连模块，其能克服现有技术的解决方案的高成本、不能有效散热等问题。
本发明的一个实施例是一种光互连模块，包括硅载体；安装在硅载体上的通信集成电路和安装在硅载体上的光集成电路倒装芯片。光集成电路通过硅载体中的电路径与通信集成电路电通信。硅载体中的光路径提供了光集成电路和光线路之间的光耦合。
根据本发明的光互连模块在功能、功耗和成本等方面比现有技术有显著的改善。
附图说明
参考示例性的附图，其中各附图中类似的元件采用类似的标号：
图1为本发明的一个实施例中光学互连组件的透视图；
图2为本发明的一个实施例中光学互连模块的透视图；
图3-10示出了用于光学互连模块的各实施例的多种光学和电学互连。
具体实施方式
图1为本发明的一个实施例中光学互连组件100的透视图。光学互连组件100包括基板102。基板102可以是多层陶瓷片、印制电路板等。互连104定位在基板102的底部上。虽然在图1中示出了球栅阵列(BGA)，但是互连104可以是任何已知类型的电学和/或光学互连。
基板102的顶面包括多个集成电路106。集成电路(ICs)106为通常的电子部件，并通过基板102内的电过孔被耦合到互连104和/或光互连模块200。ICs106可以为光互连模块200提供支持功能并且为低速(例如，5-10Gb/s)CMOS器件。
图2为本发明的一个实施例中光互连模块200的透视图.光互连模块200包括具有电学和光学过孔的作为硅平台(platform)的载体202、嵌入的无源器件(例如，电阻、电容)以及光学对准元件。在一个实施例中，硅载体202为20mm×20mm。互连204定位在硅载体202的底部上。虽然在图2中示出了球栅阵列(BGA)，但是互连204可以是包括倒装芯片互连的电学或光学部件，与基板102顶面上对应的互连匹配。
在硅载体202上还安装有集成电路(ICs)206，提供了如信号编码和信号调节等的信号处理功能。在一个实施例中，ICs206为低速(5-10Gb/s)CMOS器件。ICs206通过硅载体202中的电路径连接到互连204和其它IC。
通信ICs208安装在硅载体202上。通信ICs208可以是以20-40Gb/s的较高速度工作的硅-锗(SiGe)器件。通信ICs208与在硅载体中形成的电路径上的光发送器IC210和光接收器IC212连接。通信ICs208可以包括用于驱动光发送器IC210的驱动器IC和用于放大由光接收器IC212接收的信号的放大器IC。通信ICs208为包括光发送器IC210和光接收器IC212的光集成电路提供了如混合/去混合(mux/demux)、产生时钟、驱动和放大等功能。
光发送器IC210和光接收器IC212与光线路214连接以向和从光互连模块200发送和接收光信号。在一个实施例中，光发送器IC210为III-V化合物VCSEL阵列，并且光接收器IC212为光电二极管阵列，两者都在20-40Gb/s的较高速度下工作。光发送器IC210和光接收器IC212为安装到硅载体202的倒装芯片。应该理解不需要单独的发送器和接收器IC，并且可以使用一个收发器IC。
光发送器IC210和光接收器IC212通过嵌在硅载体202内的光路径(光纤阵列、波导等)耦合到光线路214。在再生或接收之前，沿2m到100m的距离，光线路214发送和接收具有能透过硅载体202的波长(例如，大于约1000nm)的光信号。光传送介质(例如，光纤)被耦合到光线路214以提供传送路径。
在公共载体上安装CMOS ICs206、SiGe ICs208、光发送器IC210和光接收器IC212使功能、功耗和成本最佳。通过放置在载体202上的部件也解决了如VCSEL阵列210邻近SiGe驱动器ICs208等的热管理问题。由于可以获得整个表面，因此可以将散热器安装到通信ICs208的整个顶面。通过相对高速SiGe通信ICs208放置VCSEL阵列210，同样使噪声最小。
多个不同的光学和电学元件可以结合到用于安装和/或互连电学和光学部件的硅载体202中。图3为本发明的一个实施例中光互连模块200的剖面图。硅载体202包括用于对准光学部件的V形槽。例如，提供V形槽302用于定位镜子，提供V形槽304用于定位光纤或透镜306。电通孔308延伸穿过硅载体202到互连204。可以使用反应离子蚀刻(RIE)以限定用金属填充的小尺寸(例如，50微米直径)孔，来形成通孔308。电路径和光路径310可以形成在硅载体202中以连接通孔308和光学部件。
图4为本发明的一个实施例中光学互连组件100的剖面图。基板102包括嵌在基板102中或在基板102表面上的光路径402(例如，波导)。光互连模块200包括光过孔404(这里将更详细地介绍)，将光互连模块200上的光元件(例如，光发射器或接收器)耦合到光路径402。这使得基板102表面上的光互连模块200建立了光通信。
图5为本发明的一个实施例中具有光互连模块200的光学互连组件100的剖面图。硅载体202包括多层布线502(例如，氧化铍)，以提供ICs206、208以及210之间的电连接。ICs206、208以及210通过电互连503(例如微球栅阵列)与硅载体202上的电路径电接触。框架506包围了ICs并气密密封了光互连模块200。散热器508安装在框架506上并热接触ICs206、208以及210。这使高速IC208的整个表面热接触散热器。光过孔504形成在硅载体202中，并包括适合硅微透镜505的通道。如果使用玻璃或聚合物透镜，那么光发送器210和光接收器212可以在约850nm的波长下工作。
基板102包括光路径层510，光路径层510包含与光过孔504光通信的波导509(例如，整个内反射镜)。波导509提供了基板102上光信号的路径。可以使用类似的光过孔互连光接收器212。对准特征507使光过孔504与波导509对准。对准特征507为进行硅载体202与基板102对准的机械对准特征。可以在形成光过孔504的同时在硅载体202中蚀刻出对准特征。
图6为本发明的一个实施例中具有光互连模块200的光学互连组件100的剖面图。光互连模块200类似于图5中的模块，但包括玻璃层602，提供了光发送器210和波导508之间的光互连。透镜604的阵列形成在玻璃层602中以将光发送器210光耦合到波导509。可以使用类似的光过孔互连光接收器212。可以使用附加的透镜使光发送器和光接收器在850nm下工作。
图7为本发明的一个实施例中具有光互连模块200的光学互连组件100的剖面图。光互连模块200类似于图5中的模块，但包括硅载体202底部上的折射率匹配层702。光发送器210发出能透过硅载体的波长的光(例如，大于约1000nm)。在本实施例中，硅载体202为涂覆有1/4波长的氮化物的抗反射层。由光发射器210发出的光穿过载体202、穿过折射率匹配层702到达波导509。在折射率匹配层702中提供开口704以使导电过孔308接触基板102顶部的电互连706(BGA，C4)。透镜可以结合在硅载体202中以将光指向和来自波导509、光发射器208和光接收器210。
图8为本发明的一个实施例中具有光互连模块200的光学互连组件100的剖面图。光互连模块200类似于图7中的模块，但包括折射率匹配底充物806，而不是层702。而且，通过载体202中的一个或多个开口802以及光通路层510中对应数量的柱804获得光互连模块200和基板102的对准。可选地，可以使用已知的互连对准技术(例如，C4自对准)相对于基板102定位光互连模块200。
图9为本发明的一个实施例中具有光互连模块200的光学互连组件100的剖面图。在本实施例中，光集成电路(例如，光发射器和/或光接收器)安装在硅载体202的相对面，作为ICs206和208。图9示出了安装硅载体202的底部上并定位在折射率匹配层702内的光发射器210。电过孔902将ICs208和/或206连接到光发射器210。光发射器210将光发射到波导509。
图10为本发明的一个实施例中具有光互连模块200的光学互连组件100的剖面图。图10的实施例类似于图9的实施例，但光集成电路为边缘发射的微谐振器1002。微谐振器嵌在折射率匹配层702内。微谐振器1002利用对接耦合以与光路径层510光连接。
本发明的各实施例从电路问题中消除了封装问题并使用更低成本的Si载体202用于封装。估计Si载体202的成本比6HP SiGe的便宜5到10倍。用于光互连模块200的Si载体202可以设计为直接附加到柔性引线、到具有通孔和C4s的基板102、或者直接附加到具有BGA的PCB。使用滑动的玻璃盖和标准的光阵列连接器，光发射器210、光接收器212以及通信ICs208可以与Si载体202一起组装在气密或近似气密的封装内，进而可以集成到MCM封装内。紧密集成光发射器210、光接收器212以及通信ICs208可以使电噪声最小并且易于激光器的高数据速率调制。
虽然参考示例性实施例介绍了本发明，但是应该理解对于本领域中的技术人员可以进行多种修改并进行元件的等效替代，只要不脱离本发明的范围。此外，可以根据本发明的教导采用特定的形式或材料来进行多种修改，只要不脱离本发明的范围。因此，本发明不限于作为实施本发明的最佳或唯一方式公开的特定实施例，相反，本发明包括落入附带的权利要求书范围内的所有实施例。而且，使用的术语“第一”、“第二”等不代表任何顺序或重要性，相反术语“第一”、“第二”等用于相互区分。而且，使用术语“一个”等不代表对数量的限制，而是表示存在至少一个参考项。

Claims (19)

1.一种光互连模块，包括：
硅载体；
安装在所述硅载体上的通信集成电路；
安装在所述硅载体上的光集成电路倒装芯片，所述光集成电路通过所述硅载体中的电路径与通信集成电路电通信；
所述硅载体中的光路径，所述光集成电路通过所述硅载体中的所述光路径与光线路光通信。
2.根据权利要求1的光互连模块，还包括：
安装到所述硅载体的信号处理集成电路，所述信号处理电路在比所述通信集成电路低的速度下工作。
3.根据权利要求2的光互连模块，其中：
所述信号处理集成电路是CMOS集成电路。
4.根据权利要求1的光互连模块，其中：
所述通信集成电路包括驱动器集成电路和放大器集成电路。
5.根据权利要求4的光互连模块，其中：
所述光集成电路包括与所述驱动器集成电路和所述放大器集成电路电通信的光收发器。
6.根据权利要求4的光互连模块，其中：
所述光集成电路包括与所述驱动器集成电路电通信的光发送器和与所述放大器集成电路电通信的光接收器。
7.根据权利要求6的光互连模块，其中：
所述光发送器为VCSEL阵列。
8.根据权利要求6的光互连模块，其中：
所述光接收器为光电二极管阵列。
9.根据权利要求1的光互连模块，其中：
所述通信集成电路为硅锗集成电路。
10.根据权利要求1的光互连模块，其中：
所述硅载体包括用于将光学部件与所述硅载体对准的V形槽。
11.根据权利要求1的光互连模块，其中：
所述硅载体包括穿过所述硅载体的光过孔。
12.根据权利要求11的光互连模块，其中：
所述光路径包括适合于硅透镜的通道。
13.根据权利要求11的光互连模块，其中：
所述光路径包括适合于玻璃透镜的通道。
14.根据权利要求11的光互连模块，其中：
所述光路径包括适合于聚合物透镜的通道。
15.根据权利要求11的光互连模块，其中：
所述光路径包括通道；以及
在所述路径的一端具有透镜阵列的玻璃层。
16.根据权利要求11的光互连模块，其中：
所述光路径包括穿过所述硅载体的光传送路径；以及
所述硅载体表面上的折射率匹配层。
17.根据权利要求1的光互连模块，其中：
所述光集成电路定位在所述硅载体的相对面上作为所述通信集成电路。
18.根据权利要求17的光互连模块，其中：
所述光集成电路为微谐振器。
19.根据权利要求1的光互连模块，还包括：
所述硅载体上的对准特征，用于将所述光路径与基板对准。
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