CN1327610A - Vacuum field-effect device and fabrication process thereof - Google Patents
Vacuum field-effect device and fabrication process thereof Download PDFInfo
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- CN1327610A CN1327610A CN00801522A CN00801522A CN1327610A CN 1327610 A CN1327610 A CN 1327610A CN 00801522 A CN00801522 A CN 00801522A CN 00801522 A CN00801522 A CN 00801522A CN 1327610 A CN1327610 A CN 1327610A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
- H01J1/02—Main electrodes
- H01J1/30—Cold cathodes, e.g. field-emissive cathode
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
- C01B32/00—Carbon; Compounds thereof
- C01B32/05—Preparation or purification of carbon not covered by groups C01B32/15, C01B32/20, C01B32/25, C01B32/30
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J21/00—Vacuum tubes
- H01J21/02—Tubes with a single discharge path
- H01J21/06—Tubes with a single discharge path having electrostatic control means only
- H01J21/10—Tubes with a single discharge path having electrostatic control means only with one or more immovable internal control electrodes, e.g. triode, pentode, octode
- H01J21/105—Tubes with a single discharge path having electrostatic control means only with one or more immovable internal control electrodes, e.g. triode, pentode, octode with microengineered cathode and control electrodes, e.g. Spindt-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/02—Manufacture of electrodes or electrode systems
- H01J9/022—Manufacture of electrodes or electrode systems of cold cathodes
- H01J9/025—Manufacture of electrodes or electrode systems of cold cathodes of field emission cathodes
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
Abstract
An ultra-high-frequency vacuum-channel field-effect microelectronic device (VFED or IGVFED) has a lateral field-emission source (60), a drain (150), and one or more insulated gates (40, 160). The insulated gate(s) are preferably disposed to extend in overlapping alignment with the emitting edge (85) of the lateral field-emission source and with a portion of the vacuum-channel region (120). If the gate(s) are omitted, the device performs as an ultra-high speed diode. A preferred fabrication process for the device uses a sacrificial material temporarily deposited in a trench for the vacuum-channel region which is covered with an insulating cover. An access hole in the cover allows removal of the sacrificial material. As part of a preferred fabrication process, the drain preferably acts also as a sealing plug, plugging the access hole and sealing the vacuum-channel region after the vacuum-channel region is evacuated.
Description
Technical field
The present invention relates to microelectronic component, be specifically related to a kind of vacuum channel field effect microelectronic component that has the transverse field emission source and preferably have insulated gate.
The application is relevant with following patent: the U.S. Provisional Application 60/145 that on July 26th, 1999 submitted to, 570, the U.S. Patent application 09/276 that on March 25th, 1999 submitted to, 198 (present U.S. Patent numbers 6,004,830) and 09/276,200, the U.S. Patent application 09/477,788 and 09/476,984 that on December 13rd, 1999 submitted to.The term note
In specification and appending claims, be used alternatingly term " emitted transverse device " or " transverse field emission source " and refer to field emission source with the parallel placement of substrate.For express clear and for simplicity, it is parallel with substrate or vertical to use term " level " and " vertically " to represent herein respectively, and and do not mean that any preferred spatial orientation or the preferred orientation relevant with earth surface or gravity direction.Letter abbreviations " VFED " and " IGVFED " refer to " vacuum field device " and " insulated gate vacuum field device " respectively." insulation " in term " dielectric substrate " and " insulating barrier " is its common meaning of usefulness, is meant that especially resistivity is greater than 10
8The material of Ω-cm.Term " conduction " refers to resistivity and is less than or equal to 10
8The material of Ω-cm promptly comprises the electrical resistivity range of whole conductor and semiconductor substance.
Background technology
K.R.Shoulders has described some vacuum integrated circuits in " utilizing the microelectric technique of electron-beam excitation process technology " literary composition of " computer progress " volume 2 (academic press, New York, 1961) 135-197 page or leaf that F.L.Alt compiles.People such as R.Greene are at " vacuum integrated circuit " (international electronic device meeting [IEDM] technical digest in 1985, IEEE, Piscataway, the New Jersey, 1985, the 172-175 page or leaf) looks back the physical property and the manufacture method of vacuum electron device in the literary composition, and described the principle of the vacuum Field Emission Triodes of class FET.The feds of people such as R.Greene described in that piece article requires the anode voltage of about 100 volts grid bias and about 200-500 volt.People such as Gray are at " using the vacuum field transistor of silicon field emitter array " (international electronic device meeting [IEDM] technical brief in 1986, IEEE, Piscataway, the New Jersey, 1986,776-779 page or leaf) the similar device that uses the vacuum field transistor of silicon field emitter array has been described in the literary composition.People such as R.Greene are at another piece article " vacuum microelectronics technique " (international electronic device meeting [IEDM] technical brief in 1989, IEEE, Piscataway, the New Jersey, 1989,89-15-89-19 page or leaf) in the integrated field emitter array of a kind of grid and a kind of cross one another silicon flat field transmitter array vacuum FET have been described.
People such as H.H.Busta are at " laterally miniaturized vacuum device " (international electronic device meeting [IEDM] technical brief in 1989, IEEE, Piscataway, the New Jersey, 1989,89-533-89-536 page or leaf) described two types transverse field reflector triode in the literary composition: one type has triangle metal reflector, collector electrode and extraction electrode; Another kind of type has tungsten filament reflector, collector electrode and the extraction electrode that is fixed on the polysilicon layer sidewall.
People such as W.J.Orvis are at " report of Lawrence Livermore small size vacuum pipe plan advance " (international electronic device meeting [IEDM] technical brief in 1989, IEEE, Piscataway, the New Jersey, 1989,89-529-89-531 page or leaf) method of utilizing Spindt type field emission device to make small size vacuum diode and triode has been described in the literary composition.
People such as J.E.Cronin announce at ibm technology, volume 32, described the process of making Field Emission Triodes in " Field Emission Triodes integrated circuit building method " literary composition of No.5B (in October, 1989) 242-243 page or leaf, this triode has and self aligned transmitting terminal of control grid.
B.Goodman has described the process of vacuum microelectronics development and the problem of appearance in " discovery " March nineteen ninety in " vacuum tube review " literary composition of 55-58 page or leaf.People such as S.Kanemura are at IEEE electronic device journal, volume 38, No.10, in October, 1991, in " making and the feature of transverse field reflector triode " literary composition of 2334-2336 page or leaf a kind of transverse field reflector triode has been described, this triode has by to each other apart from 170 arrays that field emitter tip is formed of 10 microns, and column grid and anode.
People such as W.N.Carr are at " vacuum science technology " volume A8 (4), 7/8 month nineteen ninety, in " the little triode characteristic of vacuum " literary composition of 3581-3585 page or leaf the I-V characteristic that is similar to pentode that is used to simulate the horizontal vacuum microelectronic device that has the V-arrangement field-transmitting cathode has been described.
People such as A.A.G.Driskill-Smith are at " applied physics " volume 75 No.18 (on November 1st, 1999), a kind of electron tube of nanoscale has been described in " ' nanometer triode ': a kind of field emission tube of nanoscale " literary composition of 2845-2847 page or leaf, this electron tube has field-transmitting cathode (radius is the vertical metal " nano-pillar " of an about nanometer), integrated anode and control grid, and all these is in the vertical and horizontal scale of about 100 nanometers.P.Weiss has summed up people such as Driskill-Smith in the progress aspect the vacuum tube in 156 (on November 6th, 1999) of " Science News " volume in " ' vacuum tube ' new image: too little and can not the see " literary composition, and has reported the comment of some other technical staff in this field." modern physics " in December, 1999, some problems that remain on some advantages of vertical orientated device in people's articles such as Driskill-Smith and this designs summed up in " vacuum tube attempt restoration of the old order the " literary composition of 9 pages.
United States Patent (USP) before many has been described vacuum microelectronic device (particularly feds) and their manufacture craft, and they comprise: Fraser, 3,753,022 of Jr; People's such as Spindt 3,755,704 and 3,789,471; 4,163,949 of Shelton; People's such as Gray 4,578,614; 4,721,885 of Brodie; 4,827,177 of Lee; People's such as Lee 4,983,878; People's such as Goronkin 5,007,873; People's such as Atkinson 5,012,153; 5,070,282 of Epsztein; 5,079,476 of Kane; 5,112,436 of Bol; 5,126,287 of Jones; 5,136,764 of Vasquez; People's such as Jones 5,144,191; 5,214,347 of Gray; 5,221,221 of Okaniwa; 5,245,247 and 5,267,884 of Hosogi; 5,268,648 of Calcatera; 5,270,258 and 5,367,181 of Yoshida; 5,394,006 of Liu; People's such as Muller 5,493,177; 5,834,790 and 5,925,975 of Suzuki.
United States Patent (USP)s before a large amount of have been described the microelectronic component structure that has the transverse field emitting cathode and the manufacture craft of this structure, and they comprise: 4,827,177 of Lee; 5,112,436 of Bol; People's such as Jones 5,144,191; 5,214,347 of Gray; People's such as Cronin 5,233,263,5,308,439,5,312,777 and 5,530,262; People's such as Xie 5,528,099; People's such as Mandelman 5,604,399,5,629,580,5,736,810 and 5,751,097; 5,616,061,5,618,216,5,628,663,5,630,741,5 of Potter, 644,188,5,644,190,5,647,998,5,666,019,5,669,802,5,691,599,5,700,176,5,703,380,5,811,929,5,831,384,5,850,123,5,872,421,5,920,148,5,965,192,6,004,830,6,005,335,6,015,324,6,015,326,6,017,257,6,037,708,6,071,633.
Demand sustainable growth to the ultra-high frequency electronic device.At present, many demands to the ultra-high frequency device are satisfied by semiconductor device and integrated circuit.Because the electron mobility in the semiconductor device is owing to the collision of charge carrier and lattice atoms reduces, so the potential better high frequency performance of small size vacuum device is very attractive.If make enough little also can be worked under enough low voltage, and have enough height and stable electric current, so such vacuum device will obtain electronics application widely in digital and simulation field.
The present invention's general introduction
A kind of hyperfrequency vacuum channel field effect microelectronic component (VFED or IGVFED) comprising: transverse field emission source, drain electrode, one or more insulated gate.Insulated gate preferably is configured to extend to and the transmitting terminal of transverse field emission source and a part of overlapping alignment in vacuum channel zone.If save insulated gate, this device just plays the effect of a ultrahigh speed diode so.In the preferred manufacture craft of this device a kind of expendable material is deposited in the groove in vacuum channel zone temporarily, is coated with an insulation coating on it.By entering the hole and can remove expendable material on this coating.As the part of preferred fabrication technology, drain electrode preferably can be played the effect of a sealing plug.After the vacuum channel zone is eliminated, it is clogged enters the hole and make the vacuum channel regional seal.
Brief Description Of Drawings
Fig. 1. be the partial cut stereogram of insulated gate vacuum field device constructed in accordance;
Fig. 2 a-2j is the cross-sectional side view of the device in each stage of preferred fabrication technology;
Fig. 3 is a flow chart, has described according to the present invention the step of performed preferred fabrication technology.
Realize mode of the present invention
Disclosed herein is a kind of novel superelevation conversion speed vacuum field device (VFED).The electric charge current-carrying source of VFED is for to launch the electron emission source of operating by Fowler-Nordheim.Channel region is a vacuum.Because there is not material to come scattered electron and channel length very short in the channel region, so electronics is also very short by the time of raceway groove.There is not vacuum channel between emission source and the grid or between drain electrode and the grid.Therefore can keep a quite high drain voltage and can be from grid emitting electrons.High drain voltage can make the transit time of electronics reach the order of magnitude of subpicosecond (sub-picoseconds) together with short vacuum channel.In addition, consider that the parasitic capacitance item of novel VFED is very little (being lower than thousand part per trillion farad/micron), deep calculating is measurable arrives, and for 0.5 micron long vacuum channel, conversion speed can be up to 10 terahertzs.For 0.1 micron long vacuum channel, the conversion speed of this device is as calculated near 30 terahertzs.
Reduce the application scenario of output impedance, (γ for hope
p= V
d/ I
d@V
g=constant), owing to the influence of drain voltage to the emission source field, very short vacuum channel length will cause drain current to change significantly.Herein, V
dBe drain voltage, I
dBe drain current, V
gBe grid voltage.In addition, a large amount of individual devices of arranging with parallel way will reduce effective output impedance, and can't reduce conversion speed.Because grid and emission source are very approaching, so mutual conductance (g
m= I
d/ V
g@V
d=constant) will be very high.The influence that the insulator of use high-k helps to improve insulated gate, but also should be taken into account the parasitic capacitance of increase insulated gate to emission source.The value of dielectric constant is more preferably greater than 2.In vacuum channel length during more than or equal to 0.5 micron, because insulated gate is to the strong influence of channel current, gain parameter (μ=| V
d/ V
g| @I
d=constant) can be very big.
Fig. 1. (not in scale) is the partial cut stereogram of insulated gate vacuum channel fieldtron 10 constructed in accordance.Device 10 is produced on the dielectric substrate 20.Emission source layer 60 (the horizontal field emission cold-cathode that has transmitting terminal 85) is parallel with substrate 20.Although Fig. 1 and cross-sectional view strength 2f-2j schematically are shown as rectangle to transmitting terminal 85, the true form of transmitting terminal 85 can be very sharp, promptly has minimum radius, and this is that the field-transmitting cathode field is known.When adding suitable bias voltage with drain electrode 150 for emission source 60,85 electrons emitted of transmitting terminal that drain electrode 150 is assembled by source 60.The drain electrode 150 and the transmitting terminal 85 in source 60 preferably are spaced laterally apart the spacing between 1 nanometer to 1 millimeter.Grid, one might rather say is following grid 40 and last grid 160, they are configured to aim at transmitting terminal 85 to the small part of emission source 60, and extend to the part in vacuum channel zone 120 overlapping.The following gate contacts 155 of conduction extends downwards and keeps electrically contacting of ohmic properties with following grid 40.In the embodiment shown in fig. 1, contact 155 also links to each other with last grid 160.The groove that grid 40 is reserved under on the substrate 20 being can make down grid 40 complanations, therefore in the preferred manufacture craft that will describe in detail below, can provide the uniformity of the thickness of the insulating barrier 50 that deposits on the grid 40 under accurate control and the maintenance.But in other embodiments, grid 40 also can be positioned on the end face of substrate 20, and without groove.
Insulating barrier between each grid and the vacuum channel zone prevents that any electronics of emission source emission from arriving any grid, and each grid and vacuum channel zone are separated fully by each insulating barrier (50 or 70 and 100 combinations).Each insulating barrier has also been blocked its pairing grid and the vacuum channel of drain electrode between 150, so electron stream does not have the vacuum (for example secondary electron stream) of possibility between passing through any grid and draining.It is also to be understood that this point also is correct for the IGVFED with grid preferred embodiment of two grids of diagram of top institute and description (rather than have).In the embodiment with two grids shown in Figure 1, the conductive contact 155 that connects two grids also by insulator 50,70 and 100 and vacuum channel zone 120 insulate fully.As shown in Figure 1, the design of the size in vacuum channel zone 120 makes it avoid extending rearward to the zone of conductive contact 155.
Can be deposited on the passivation layer (not shown) of routine on the device 10, with protection device and prevent surface leakage current.Can form conventional electrode metal (terminal metallurgy) (not shown) that pass through opening and deposition routine, to keep in touch with conducting element shown in Figure 1.
Like this, one aspect of the present invention is a kind of vacuum field device 10, and it comprises: emission source 60, this emission source 60 comprise a transverse field reflector that has the transmitting terminal 85 that is used for emitting electrons; Conductive drain 150, itself and transmitting terminal horizontal subdivision are opened; Vacuum channel zone 120, it is at least in the transmitting terminal 85 of emission source and the extension between 150 that drains; At least one grid 40 or 160, it is opened with the vacuum channel region separation by insulating barrier 50,70 or 100, and described insulating barrier is arranged between grid and the vacuum channel zone 120, is used for prevention by emission source electrons emitted arrival grid; Terminal (for example 140) is used to provide the bias voltage between drain electrode and the emission source and provides control signal for grid.Terminal can integrate with they electrodes separately, for example 150 among Fig. 1 and 160.This device preferably has two public electric grids 40 and 160, can link together them with an integrated conductive grid contact 155.This device is structured on the dielectric substrate 20, and this dielectric substrate can form by supplementary insulation film on conduction or semiconductive substrate.Manufacture craft
It is simply more than making composite semiconductor or heterojunction semiconductor device to make novel terahertz vacuum field device (VFED).Do not use semi-conducting material in this preferred embodiment.But, the IC metallising of this structure fabrication and standard, passivation and interconnected technology are compatible.In addition, this novel device can combine with arbitrary variant or other ic manufacturing process of preferred embodiment manufacture craft.
The overall process of making the vacuum field device may further comprise the steps: a suitable plane dielectric substrate is provided; A transverse field reflector forms emission source by be arrangeding in parallel on substrate; On the transverse field reflector of emission source, form transmitting terminal; Provide a conductive drain to be used to receive electronics, be spaced laterally apart an intersegmental distance between drain electrode and the transmitting terminal; At least between transmitting terminal and drain electrode, make first opening in vacuum channel zone; At least one grid is set, and this grid is partly aimed at transmitting terminal at least, and at least with the first opening portion overlapping alignment; Cover first opening fully to form the vacuum channel chamber of a sealing; From first opening, remove all gas so that vacuum to be provided; Sealing vacuum channel chamber.Whole process can also comprise step: an insulating barrier is set between grid and vacuum channel zone, arrives grid with any electronics that stops the emission source emission, above-mentioned grid is separated fully by insulating barrier and vacuum channel zone.Add terminal and be and be used between drain electrode and emission source, providing bias voltage and provide control signal for insulated gate.
Provide this step of dielectric substrate to be finished by following steps: a basic substrate at first is provided, and basic substrate can have the conductivity or the semiconduction of various degree; On basic substrate, deposit one deck insulating surface layer then.Therefore, basic substrate can for conductor, semiconductor or any resistivity less than 10
8The material of Ω-cm, or be different from the insulator of deposition insulating barrier thereon on the composition.For example, basic substrate can be a metal, silicon, germanium, III-V compounds of group (GaAs, AlGaAs, InP, GaN or the like), conductive oxide (for example indium tin oxide target, indium oxide, tin oxide, cupric oxide, zinc oxide), magnesium-yttrium-transition metal nitride or transition metal carbides.
In the structure of whole manufacture craft, can carry out multiple modification to special material, special process and order thereof.In conjunction with Fig. 2 a-2j and Fig. 3, describe a specific preferred fabrication technology below in detail.Fig. 2 a-2j charts not in scale.Following description comprises the step that two grids are provided, but will be appreciated that the VFED device can be manufactured with one or more grids, and can save grid to make high speed diode.
Fig. 2 a-2j is a series of cross-sectional side view of each stage product of preferred manufacture craft.Fig. 3 is the flow chart of preferred fabrication technology, each step reference number S1 wherein ..., S21 represents.For each step, performed operation is listed in the Table I:
| S1 provides substrate S 2 to make the first groove S3 and fills the first groove with conductive layer and make its complanation S4 deposit the first insulating barrier S5 deposits conductive material and composition emission source S6 and deposit the second insulating barrier S7 and make the second groove and form the hole S11 that enters that passes the 3rd insulating barrier and form emission source and remove expendable material S13 by hole and lower grid by hole S12 and gate contacts S17 deposition and patterning conductive drain electrode S18 sealed vacuum channel region S19 (the simultaneously combination of execution in step S14 to S18) are provided on vacuum environment S14 deposition and patterning conductive source contact S15 deposition and the patterning conductive under grid S16 deposition and the patterning conductive S20 if necessary to form vacuum channel zone S8 and fill the second groove with expendable material and to make its complanation S9 deposit the 3rd insulating barrier S10; If deposition passivating film S21 needs, make the processing step by hole and electrode metal Table I Fig. 3 |
In step S1, provide a suitable plane dielectric substrate 20.Dielectric substrate 20 can comprise that various suitable insulation materials are as glass, pottery, glass ceramics, diamond, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, aluminium nitride, nickel oxide, plastics, condensate, polyimides, Parylene, PETG, and the mixture of above various materials and compound.As mentioned above, the making of the plane dielectric substrate 20 that provides among the step S1 at first will provide a conductivity base substrate, as semiconductor silicon wafer, deposits one deck suitable insulation material then to form insulating surface on conductivity base substrate.Insulating barrier can be top any listed insulating material.
In step S2, (Fig. 2 a) to make groove 30 on the surface of dielectric substrate.In step S3, with conductive layer 40 filling grooves 30 and make its complanation (Fig. 2 b), to make first grid.Complanation can be finished by chemical-mechanical polishing (CMP).The material that is suitable for making conductive layer 40 has: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type silicon, polysilicon, amorphous silicon, or monocrystalline silicon), germanium, and the mixture of above various materials, alloy and compound.To make it can be compatible when selecting conductive material with the other materials of this device.
Step S4 comprises first insulating barrier 50 is deposited on the surface of complanation (Fig. 2 c).First insulating barrier 50 can comprise any suitable insulation body, for example: glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, or the mixture of above various materials and compound.The DIELECTRIC CONSTANT of first insulating barrier 50 is more preferably greater than 2.
In step S5, deposition and patterning conductive material are to form emission source layer 60 (Fig. 2 d).In step S6, deposit second insulating barrier 70, make it cover emission source layer 60 (Fig. 2 e).Second insulating barrier 70 can comprise any suitable insulation body, for example first insulating barrier, 50 employed any material (glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, or the mixture of above various materials and compound).But insulating barrier 50 and 70 preferably includes identical insulating material.The DIELECTRIC CONSTANT of second layer insulating barrier 70 is more preferably greater than 2.
As the vacuum channel zone the making (step S7, Fig. 2 f) of second groove 80 finish by etching at least the second insulating barrier 70 and emission source layer 60, but etching is to being issued to first grid layer 40.The making of groove 80 is finished by the oriented active ion(ic) etching.Also to be etched with when making this groove and make transmitting terminal 85 emission source layer 60.If necessary, further etching for example uses (isotropic wet etch) etching of scalar property's soak law or plasma etching further transmitting terminal 85 to carry out etching.Known as the field-transmitting cathode field, wish to produce transmitting terminal 85 with minimum radius, make it have the equally sharp keen shape of blade.This point is by deposition one deck very thin emission source layer 60 in step S5, the edge of this skim is carried out then that etching finishes in step S7.The electric conducting material that is suitable for making emission source layer 60 comprises: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, aluminium, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.Well-known in this field, to preferably use the material of low work function at the transmitting terminal 85 of emission source layer 60 at least.
At step S8, in second groove 80, insert expendable material 90 parallel planesization (Fig. 2 g) of going forward side by side.Expendable material 90 can be inorganic material or organic material such as Parylene.Deposit the 3rd insulating barrier 100 (step S9, Fig. 2 h) after this.Three-layer insulated layer 100 can comprise any suitable insulation body, for example first insulating barrier 50 and second insulating barrier, 70 employed any materials.Insulating barrier 100 preferably uses and insulating barrier 50 and 70 identical insulating material, and its DIELECTRIC CONSTANT is more preferably greater than 2.
In step S10, open one by three-layer insulated layer 100 and enter hole 110, enter expendable material 90 (Fig. 2 i) downwards at least.Enter hole 110 preferably open range transmission end 85 on the groove 80 farthest that end or near.In step S11, make emission source and pass through the hole (not shown) by hole 130 and following grid 40.Following gate contacts 155 (shown in Figure 1) uses this time grid by the hole, but should be by the hole not in the cross section of Fig. 2 a-2j.As a kind of selection, can and carry out simultaneously step S10 and S11 merging, with a square brackets this two step is merged to get up as shown in Figure 3.In step S12, remove expendable material 90 (for example utilize suitable dissolution with solvents expendable material 90, remove this solution by entering hole 110 then) by entering hole 110.For example, if expendable material 90 is photoresist or paraffin, then solvent can be acetone.If expendable material 90 is a silicon dioxide, it can be removed with for example HF by wet chemical etch.For a lot of expendable materials, the removal process can utilize the oxygen plasma etching to finish.Remove after the expendable material, just stay next empty vacuum channel zone 120.Below several steps will in vacuum environment, carry out, the vacuum pressure that step S13 provided preferably be less than or equal to 1 the holder.
In step S14, deposition and patterning conductive emission source contact 140.In step S15, grid 160 on deposition and the patterning conductive.In step S16, gate contacts 155 (shown in Figure 1) under deposition and the patterning conductive.In step S17, deposition and patterning conductive drain electrode 150.Be suitable for making conduction and go up grid 160, the electric conducting material of gate contacts 155 and conductive drain 150 comprises under the conduction: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
In step S18, fill out hand-hole 110 with sealed vacuum channel region 120.Step S18 is preferably in when vacuum pressure is less than or equal to 1 holder and carries out.When vacuum channel region 120 is sealed, this channel region just will be a vacuum.Step S14-S18 preferably combines as step S19 and carries out, shown in square brackets among Fig. 3.In this preferred technology, enter the pattern that hole 110 also defines drain electrode 150 bottoms (being positioned at vacuum channel zone 120).The device that obtains behind execution of step S14-S18 or combining step S19 is shown in the partial cut stereogram of the cross-sectional view of Fig. 2 j and Fig. 1.Select as the another kind of this technology, can utilize the method in the U.S. Patent No. 5,700,176 of Potter to make conductive drain 150 and sealed vacuum channel region 120, its whole disclosures are incorporated herein by reference.If wish, can deposit a passivation layer (step S20), form by the hole, and depositing electrode metal (step S21).
As long as those skilled in the art will recognize that and save those steps, just can realize the structure of a ultra-high frequency diode in conjunction with control gate element 40 and 160.Keep another if just save in control gate element 40 and 160, this device is still as triode work so.
The scope of making vacuum field size of devices of the present invention and material behavior (such as the dielectric constant of insulator) can be very wide.For example, according to the application scenario, vacuum channel length can be between 1 nanometer to 1 millimeter.DIELECTRIC CONSTANT, drain voltage, with the equilibrium (tradeoffs) of coupling capacitance, and can be very wide to the enhancing scope of operating delay pattern.Dielectric constant at insulating barrier is less than or equal at 20 o'clock, and the thickness of the combination of insulating barrier 50 and insulating barrier 70 and 100 (spacing between grid and the emission source layer 60 just) preferably is chosen between 1 nanometer and 1000 nanometers.When the dielectric constant of insulating barrier greater than 20 the time, this spacing preferably is chosen between 10 nanometers and 5000 nanometers.Industrial applicability
Device disclosed herein is particularly useful for the communication need of high bandwidth.This purposes of this device is included in transmission and reception data in the chip range, so it is suitable for the communication of the wired or wireless internal lan of short distance.Also intrinsic high thermal endurance of this device and radiation resistance.Therefore be suitable in rigorous environment, using.These application comprise: the transducer of fission or fusion reactor, and the boring transducer, accelerator sensor and instrument, at satellite, the application in outer space and the space probe and other many similar application.
For a person skilled in the art, by to the thinking of this specification or by disclosed invention is put into practice, among the some other embodiment of the present invention this device is used for various uses and environment will be apparent.For example, can add extra gate electrode in the structure of the present invention.Again for example, this device can be produced on the substrate of insulation, and this substrate comprises suitable plastic or other polymer, and these materials can be flexibility and/or transparent, and perhaps conducting element can be made by conducting polymer.In addition,, the order of manufacturing process steps can be changed, and some steps can also be saved in order to make simpler structure for certain purpose.Specification and example are exemplary, and the real scope and spirit of the present invention are limited by following claims.
Claims (75)
1. vacuum field device comprises:
A) source, described source comprise a transverse field reflector, and described transverse field reflector has a transmitting terminal that is used for emitting electrons,
Above-mentioned vacuum field device is characterised in that also and comprises:
B) drain electrode, the described transmitting terminal of it and described transverse field reflector is spaced laterally apart, and described drain electrode comprises a conductive electrode;
C) vacuum channel zone, it at least will be between the described transmitting terminal and described drain electrode of described transverse field reflector;
D) at least one first grid, it comprises a kind of electric conducting material, this electric conducting material is separated fully by first insulating barrier between described at least one first grid and described vacuum channel zone and above-mentioned vacuum channel zone, arrives described at least one first grid with any described electronics that prevents the emission of described source; With
E) terminal is used for providing bias voltage between described drain electrode and described source, and provides control signal for described at least one first grid.
2. vacuum field device as claimed in claim 1 is characterized in that, this device further comprises a dielectric substrate, and the described transverse field reflector of described emission source is parallel to described dielectric substrate and places.
3. vacuum field device as claimed in claim 2 is characterized in that, the material of described dielectric substrate is chosen from following tabulation: glass, pottery, glass ceramics, diamond, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, aluminium nitride, nickel oxide, plastics, condensate, polyimides, Parylene, PETG, and the mixture of above various materials and compound.
4. vacuum field device as claimed in claim 1 is characterized in that, the material of described first insulating barrier is chosen from following tabulation: glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, and the mixture of above various materials and compound.
5. vacuum field device as claimed in claim 1 is characterized in that, comprises in described first insulating barrier that a kind of dielectric constant is more than or equal to 2 material.
6. vacuum field device as claimed in claim 1 is characterized in that, described at least one grid is partly aimed at the described transmitting terminal of described transverse field reflector at least, and is configured at least and described vacuum channel area part overlapping alignment.
7. vacuum field device as claimed in claim 1 is characterized in that, forms the electric conducting material of described at least one grid and chooses from following tabulation: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
8. vacuum field device as claimed in claim 1 is characterized in that, described transverse field reflector comprises the thin film conductor that is arranged on described first insulating barrier.
9. vacuum field device as claimed in claim 8 is characterized in that, this device further comprises second insulating barrier that is arranged on the above-mentioned thin film conductor.
10. vacuum field device as claimed in claim 9 is characterized in that, the material of described second insulating barrier is by choosing in the following tabulation: glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, and the mixture of above various materials and compound.
11. vacuum field device as claimed in claim 9 is characterized in that, comprises in described second insulating barrier that a kind of dielectric constant is more than or equal to 2 material.
12. vacuum field device as claimed in claim 9 is characterized in that, described first and second insulating barriers are made of identical insulating material.
13. vacuum field device as claimed in claim 1, it is characterized in that, this device also comprises at least one second grid, described at least one second grid is separated fully by the 3rd insulating barrier between described at least one second grid and described vacuum channel zone and above-mentioned vacuum channel zone, arrives described at least one second grid with any described electronics that prevents the emission of described source; This device also comprises terminal, is used to described at least one second grid that control signal is provided.
14. vacuum field device as claimed in claim 13 is characterized in that, described at least one second grid is partly aimed at the described transmitting terminal of described transverse field reflector at least, and at least with described vacuum channel area part overlapping alignment.
15. vacuum field device as claimed in claim 13 is characterized in that, the electric conducting material that constitutes described at least one second grid is chosen from following tabulation: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
16. vacuum field device as claimed in claim 13 is characterized in that, described at least one second grid is aimed at described at least one first grid to small part.
17. vacuum field device as claimed in claim 13 is characterized in that, described at least one first grid and described at least one second grid are aligned with each other, and about the plane symmetry by described emission source.
18. vacuum field device as claimed in claim 13 is characterized in that, vertical first preset space length that separates with described emission source of described at least one second grid.
19. vacuum field device as claimed in claim 18, it is characterized in that, when the dielectric constant of described second insulating barrier is less than or equal to 20, above-mentioned first preset distance is between 1 nanometer and 1000 nanometers, when the dielectric constant of described second insulating barrier greater than 20 the time, above-mentioned first preset distance is between 10 nanometers and 5000 nanometers.
20. vacuum field device as claimed in claim 13 is characterized in that, vertical second preset space length that separates with described emission source of described at least one first grid.
21. vacuum field device as claimed in claim 20, it is characterized in that, when the dielectric constant of described first insulating barrier is less than or equal to 20, above-mentioned second preset distance is between 1 nanometer and 1000 nanometers, when the dielectric constant of described first insulating barrier greater than 20 the time, above-mentioned second preset distance is between 10 nanometers and 5000 nanometers.
22. vacuum field device as claimed in claim 20 is characterized in that, described at least one second grid is vertical with described emission source separate one with described second preset space length spacing about equally.
23. vacuum field device as claimed in claim 13 is characterized in that the electric connection mode of described first and second grids is identical, and described first and second control signals are public for described first and second grids.
24. vacuum field device as claimed in claim 1 is characterized in that, forms the electric conducting material of described emission source and chooses from following tabulation: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
25. vacuum field device as claimed in claim 1 is characterized in that, forms the electric conducting material of described drain electrode and chooses from following tabulation: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
26. vacuum field device as claimed in claim 1 is characterized in that, the described transmitting terminal of described drain electrode and described transverse field reflector is spaced laterally apart the spacing between 1 nanometer to 1 millimeter.
27. a vacuum field device comprises:
A) dielectric substrate;
B) first insulating barrier;
C) source, described source comprise the transverse field reflector that is parallel to described dielectric substrate setting, and described transverse field reflector comprises the thin film conductor that is positioned on described first insulating barrier, and described transverse field reflector has a transmitting terminal that is used for emitting electrons;
D) conductive drain, the described transmitting terminal of it and described transverse field reflector is spaced laterally apart, and described conductive drain is configured to vertical substantially with described dielectric substrate;
E) vacuum channel zone, it is arranged between the described transmitting terminal and described conductive drain of described transverse field reflector at least, thereby electronics just can be without barrier from the described transmitting terminal of described transverse field reflector to described drain electrode campaign;
F) first and second grids, described first and second grids are by placing the second and the 3rd insulating barrier and described vacuum channel zone between described first, second grid and the described vacuum channel zone to separate fully respectively, arrive described first and second grids any to stop from any described electronics of described emission source emission; With
G) terminal is used for providing bias voltage between described drain electrode and described source, and is respectively described first and second grids first and second control signals are provided.
28. vacuum field device as claimed in claim 27 is characterized in that, described dielectric substrate comprises the conduction base substrate that is covered by the insulating surface layer.
29. vacuum field device as claimed in claim 27 is characterized in that the electric connection mode of described first and second grids is identical, so that provide public described first and second control signals for described first and second grids.
30. a hyperfrequency vacuum diode device comprises:
A) dielectric substrate
B) source, described source comprise that is parallel to the transverse field reflector that described dielectric substrate is provided with, and described transverse field reflector has a transmitting terminal that is used for emitting electrons;
C) drain electrode, the described transmitting terminal of it and described transverse field reflector is spaced laterally apart, and described drain electrode comprises a conductive electrode;
D) vacuum channel zone, it is arranged between the transmitting terminal and described drain electrode of described transverse field reflector at least; With
E) terminal is used for providing a voltage signal between described drain electrode and described source.
31. a hyperfrequency vacuum diode device comprises:
A) dielectric substrate;
B) first insulating barrier;
C) source, described source comprise that is parallel to the transverse field reflector that described dielectric substrate is provided with, and described transverse field reflector comprises the thin film conductor that is positioned on described first insulating barrier, and described transverse field reflector has a transmitting terminal that is used for emitting electrons;
D) conductive drain, the described transmitting terminal of it and described field emission device are spaced laterally apart the spacing between one 1 nanometer to 1 millimeter, and described conductive drain is configured to vertical substantially with described dielectric substrate;
E) vacuum channel zone, it is arranged between the described transmitting terminal and described conductive drain of described transverse field reflector at least, thereby electronics just can be without barrier from the described transmitting terminal of described transverse field reflector to described drain electrode campaign; With
F) terminal is used for a voltage signal is provided between described drain electrode and described source, so that described electron stream directly flows to described conductive drain from described emission source.
32. a technology of making the vacuum field device may further comprise the steps:
A) provide a dielectric substrate;
B) form emission source by making a transverse field reflector be parallel to described substrate;
C) on the described transverse field reflector of described emission source, make transmitting terminal;
D) provide a conductive drain to be used to receive electronics, the described transmitting terminal of described drain electrode and described transverse field reflector is spaced;
E) between the described transmitting terminal of described transverse field reflector and described drain electrode, form first opening in vacuum channel zone at least;
F) at least one first grid is set, this grid is partly aimed at described transmitting terminal at least, and at least with the described first opening portion overlapping alignment;
G) cover described first opening fully, to form the vacuum channel chamber of a sealing;
H) remove all gas by first opening, so that vacuum to be provided therein; And
I) the described vacuum channel chamber of sealing.
33. a vacuum field device is characterized in that, is made by the described technology of claim 32.
34. technology as claimed in claim 32 is characterized in that, and is further comprising the steps of:
J) between described at least one first grid and described vacuum channel zone, first insulating barrier is set, arrive described at least one first grid with any described electronics that stops described emission source emission, described at least one first grid is separated fully by described first insulating barrier and described vacuum channel zone.
35. technology as claimed in claim 32 is characterized in that, and is further comprising the steps of:
K) form terminal,, and provide control signal for described at least one first grid so that between described drain electrode and described emission source, provide bias voltage.
36. the technology as claim 32 is characterized in that, provides the step (a) of dielectric substrate to realize that by a basic substrate being provided and depositing an insulating barrier on described basic substrate above-mentioned basic substrate has the conductivity or the semiconduction of any degree.
37. technology as claimed in claim 32 is characterized in that, makes the step (c) of transmitting terminal and the step (e) of making first opening and may be incorporated in together and carry out simultaneously basically.
38. technology as claimed in claim 37 is characterized in that, comprises that further passing described transverse field reflector at least carries out directional etch.
39. technology as claimed in claim 32 is characterized in that, provides the step (d) of described conductive drain and the step (i) of the described vacuum channel chamber of sealing to may be incorporated in together and carry out simultaneously basically.
40. a technology of making the vacuum field device may further comprise the steps:
A) provide dielectric substrate;
B) in described dielectric substrate, form first groove;
C) fill described first groove with first conductive layer, grid to be provided down and to make its complanation;
D) deposition first insulating barrier on above-mentioned dielectric substrate and described first conductive layer is so that described gate insulator down;
E) deposition second conductive layer and composition are to form the emission source layer parallel with described substrate;
F) deposition second insulating barrier on described emission source layer;
G) second groove in formation vacuum channel zone forms the transmitting terminal of described emission source layer simultaneously, thereby finishes the making of transverse field emitter source;
H) fill described second groove and make its complanation with expendable material;
I) the 3rd insulating layer deposition that will on described expendable material, extend;
J) pass described the 3rd insulating barrier making and lead to the hole that enters of described expendable material;
K) make the pass through hole of emission source by hole and following grid;
L) remove described expendable material by the described hole that enters;
M) provide vacuum environment; And
N) grid, conduction contact, source, following gate contacts and conductive drain on deposition and the composition seal described vacuum channel zone simultaneously, thereby described the 3rd insulating barrier makes described grid and the described vacuum channel region insulation of going up.
41. a vacuum field device is characterized in that, is made by the described technology of claim 40.
42. technology as claimed in claim 40 is characterized in that, provides the step (a) of dielectric substrate to realize that by a basic substrate being provided and depositing an insulating barrier on described basic substrate above-mentioned basic substrate has the conductivity or the semiconduction of any degree.
43. technology as claimed in claim 40 is characterized in that, the step (m) that described vacuum environment is provided is by providing the vacuum pressure that is less than or equal to 1 holder to realize.
44. technology as claimed in claim 40 is characterized in that, provides the step (m) and the described deposition of described vacuum environment and pattern step (n) may be incorporated in together and carry out simultaneously basically.
45. technology as claimed in claim 40 is characterized in that, providing the step (a) of described dielectric substrate to comprise provides a kind of substrate of being made by insulating material, and described insulating material can be chosen from following tabulation: glass, pottery, glass ceramics, diamond, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, aluminium nitride, nickel oxide, plastics, condensate, polyimides, Parylene, PETG, and the mixture of above various materials and compound.
46. technology as claimed in claim 40 is characterized in that, the step (b) of making described first groove is included in recess of etching on the described dielectric substrate.
47. technology as claimed in claim 46 is characterized in that, the step (b) of making described first groove comprises uses the ion directional etch.
48. technology as claimed in claim 40 is characterized in that, the step (c) of filling described first groove comprises with electric conducting material fills described first groove, and described electric conducting material is chosen from following tabulation: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
49. technology as claimed in claim 40 is characterized in that, deposits a kind of insulating material of step (d) bag deposition of described first insulating barrier, described insulating material is chosen from following tabulation: glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, or the mixture of above various materials and compound.
50. technology as claimed in claim 40 is characterized in that, the step (d) that deposits described first insulating barrier comprises that a kind of dielectric constant of deposition is equal to or greater than 2 insulating material.
51. technology as claimed in claim 40 is characterized in that, deposition and described second conductive layer of composition comprise a kind of electric conducting material of deposition with the step (e) of making described emission source layer, and described electric conducting material is chosen from following tabulation: aluminium, copper, silver, gold, platinum, palladium, bismuth, conductive oxide, conductive nitride, the magnesium-yttrium-transition metal of infusibility (titanium, vanadium, chromium, zinc, niobium, molybdenum, hafnium, tantalum, tungsten), the transition metal carbides of infusibility, the magnesium-yttrium-transition metal nitride of infusibility, boron carbide, the boron nitride of doping, magnesium-yttrium-transition metal silicide, the carbon of any conduction form (diamond of Can Zaing for example, graphite, amorphous carbon, fullerene, nanotube, or nanometer corallite), silicon (N type or P type, polycrystalline, amorphous, or monocrystalline), germanium, and the mixture of above various materials, alloy and compound.
52. technology as claimed in claim 40 is characterized in that, the step (f) that deposits described second insulating barrier comprises a kind of insulating material of deposition, described insulating material is chosen from following tabulation: glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, or the mixture of above various materials and compound.
53. technology as claimed in claim 40 is characterized in that, the step (f) that deposits described second insulating barrier comprises that deposition one deck dielectric constant is equal to or greater than 2 insulating material.
54. technology as claimed in claim 40 is characterized in that, the step (g) of making described second groove and making transmitting terminal comprises uses the ion directional etch.
55. technology as claimed in claim 54 is characterized in that, the step (g) of making described second groove and formation transmitting terminal further comprises plasma etching.
56. technology as claimed in claim 40 is characterized in that, the step (g) of making described second groove and making transmitting terminal comprises that further wet etch carves.
57. technology as claimed in claim 40 is characterized in that, fills described second groove and the step (h) of its complanation is comprised with organic expendable material and fill described second groove.
58. technology as claimed in claim 40, it is characterized in that, fill described second groove and the step (h) of its complanation is comprised and use the expendable material of from following tabulation, choosing to fill described second groove: Parylene, photoresist, wax, and silicon dioxide.
59. technology as claimed in claim 40 is characterized in that, the step (i) that deposits described the 3rd insulating barrier comprises the deposition inorganic insulating material.
60. technology as claimed in claim 40 is characterized in that, the step (i) that deposits described the 3rd insulating barrier comprises a kind of insulating material of choosing of deposition from following tabulation: glass, glass ceramics, quartz, aluminium oxide, sapphire, silicon dioxide, silicon nitride, barium strontium titanate, titanium oxide, samarium oxide, yittrium oxide, tantalum oxide, titanium oxide barium, tantalum oxide barium, titanium oxide lead, strontium titanium oxides, oxidation (zinc, titanium) strontium, aluminium nitride, polyimides, Parylene, and the mixture of above various materials and compound.
61. technology as claimed in claim 40 is characterized in that, the step (i) that deposits described the 3rd insulating barrier comprises that a kind of dielectric constant of deposition is equal to or greater than 2 insulating material.
62. technology as claimed in claim 40 is characterized in that, makes the described step (j) that enters the hole and comprises by described the 3rd insulating barrier and carry out active-ion-etch, and etch into described expendable material at least.
63. technology as claimed in claim 40 is characterized in that, the step (1) of removing described expendable material comprises by the described hole that enters carries out the oxygen plasma etching.
64. technology as claimed in claim 40 is characterized in that, the step (1) of removing described expendable material comprises utilizes the described expendable material of dissolution with solvents.
65. technology as claimed in claim 40 is characterized in that, the step (1) of removing described expendable material comprises by the described hole that enters carries out wet chemical etch.
66. technology as claimed in claim 40 is characterized in that, providing the step (m) of described vacuum environment to comprise provides the vacuum pressure that is less than or equal to 1 holder.
67. technology as claimed in claim 40 is characterized in that, described deposition and sealing step (n) may further comprise the steps:
O) grid on deposition and the composition,
P) deposition and contact, patterning conductive source,
Q) gate contacts under deposition and the composition,
R) deposition and patterning conductive drain electrode, and
S) the described vacuum channel of sealing zone.
68. technology as claimed in claim 40 is characterized in that, described deposition and sealing step (n) also comprise step:
T) described conductive drain is set, makes the described transmitting terminal of itself and described emission source layer spaced.
69. technology as claimed in claim 40 is characterized in that, also is included in the step of deposition one passivation layer on the above-mentioned device.
70. technology as claimed in claim 40 is characterized in that, also comprises forming by the hole step of deposition and composition electrode metal.
71. a technology of making hyperfrequency vacuum diode device may further comprise the steps:
A) provide dielectric substrate;
B) form emission source by making a transverse field reflector be parallel to described substrate;
C) on the described transverse field reflector of described emission source, make transmitting terminal;
D) provide a conductive drain that is used to receive electronics, this drain electrode is spaced with the described transmitting terminal of described transverse field reflector;
E) between the described transmitting terminal of described transverse field reflector and described drain electrode, form first opening in described vacuum channel zone at least;
F) cover described first opening fully, to form the vacuum channel chamber of sealing;
G) described first opening of finding time; And
H) the described vacuum channel chamber of sealing.
72. as the described technology of claim 71, it is characterized in that, provide the step (a) of described dielectric substrate to realize that by a basic substrate being provided and on described basic substrate, depositing an insulating barrier above-mentioned basic substrate can have the conduction or the semiconduction of any degree.
73. a technology of making hyperfrequency vacuum diode device may further comprise the steps:
A) provide dielectric substrate;
B) deposition first insulating barrier on described dielectric substrate;
C) deposit first conductive layer and composition, be parallel to the emission source layer of described substrate with making;
D) deposition second insulating barrier on described emission source layer;
E) be that the vacuum channel zone makes groove, make the transmitting terminal of described emission source layer simultaneously, thereby finished the making of transverse field emitter source;
F) fill described groove with expendable material, the parallel planesization of going forward side by side;
G) make the 3rd insulating layer deposition that on described expendable material, extends;
H) pass described three-layer insulated layer and make the hole that enters that leads to expendable material;
I) make emission source and pass through the hole;
J) remove described expendable material by the described hole that enters;
K) provide vacuum environment; And
L) deposition and contact, patterning conductive source and conductive drain seal described vacuum channel zone simultaneously.
74. a vacuum field device is characterized in that, is made by the described technology of claim 73.
75. as the described technology of claim 73, it is characterized in that, provide the step (a) of described dielectric substrate to realize that by a basic substrate being provided and on described basic substrate, depositing an insulating barrier above-mentioned basic substrate can have the conduction or the semiconduction of any degree.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14557099P | 1999-07-26 | 1999-07-26 | |
| US60/145,570 | 1999-07-26 | ||
| US47698499A | 1999-12-31 | 1999-12-31 | |
| US47778899A | 1999-12-31 | 1999-12-31 | |
| US09/476,984 | 1999-12-31 | ||
| US09/477,788 | 1999-12-31 |
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| Publication Number | Publication Date |
|---|---|
| CN1327610A true CN1327610A (en) | 2001-12-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN00801522A Pending CN1327610A (en) | 1999-07-26 | 2000-07-25 | Vacuum field-effect device and fabrication process thereof |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1116256A1 (en) |
| JP (1) | JP2003505844A (en) |
| KR (1) | KR20010075312A (en) |
| CN (1) | CN1327610A (en) |
| CA (1) | CA2345629A1 (en) |
| WO (1) | WO2001008193A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101086940B (en) * | 2006-06-09 | 2011-06-22 | 清华大学 | Making method of field radiation cathode device |
| CN104217909A (en) * | 2013-05-31 | 2014-12-17 | 意法半导体股份有限公司 | Integrated vacuum microelectronic device and fabrication method thereof |
| US9496392B2 (en) | 2014-03-31 | 2016-11-15 | Stmicroelectronics S.R.L. | Integrated vacuum microelectronic structure and manufacturing method thereof |
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- 2000-07-25 KR KR1020017003711A patent/KR20010075312A/en not_active Application Discontinuation
- 2000-07-25 EP EP00948950A patent/EP1116256A1/en not_active Withdrawn
- 2000-07-25 CN CN00801522A patent/CN1327610A/en active Pending
- 2000-07-25 CA CA002345629A patent/CA2345629A1/en not_active Abandoned
- 2000-07-25 WO PCT/US2000/020230 patent/WO2001008193A1/en not_active Application Discontinuation
- 2000-07-25 JP JP2001512614A patent/JP2003505844A/en active Pending
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| CN110767519A (en) * | 2019-10-21 | 2020-02-07 | 中国电子科技集团公司第十二研究所 | Field emission electron source structure and forming method thereof, electron source and microwave tube |
| CN110767519B (en) * | 2019-10-21 | 2022-03-04 | 中国电子科技集团公司第十二研究所 | Field emission electron source structure and forming method thereof, electron source and microwave tube |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1116256A1 (en) | 2001-07-18 |
| CA2345629A1 (en) | 2001-02-01 |
| JP2003505844A (en) | 2003-02-12 |
| KR20010075312A (en) | 2001-08-09 |
| WO2001008193A1 (en) | 2001-02-01 |
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