CN1307690C - Method for making polysilicon layer - Google Patents
Method for making polysilicon layer Download PDFInfo
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- CN1307690C CN1307690C CNB021493952A CN02149395A CN1307690C CN 1307690 C CN1307690 C CN 1307690C CN B021493952 A CNB021493952 A CN B021493952A CN 02149395 A CN02149395 A CN 02149395A CN 1307690 C CN1307690 C CN 1307690C
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- irrigation canals
- polysilicon layer
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Abstract
The present invention relates to a method for making a polycrystalline silicon layer, which comprises the following steps: (a) providing a base material; (b) forming a buffer layer which has plurality of conduits on the base material; (c) form an amorphous silicon layer on the buffer layer; (d) carrying out a laser annealing process to make the amorphous silicon layer crystallize starting from the upward side of the conduits after melting so as to form a polycrystalline silicon layer. The present invention can be applied to the making a liquid crystal displayer with low temperature polycrystalline silicon film transistors, and the formed polycrystalline silicon layer has large crystal sizes and good uniformity.
Description
Technical field
The invention relates to a kind of manufacture method of polysilicon layer, and particularly relevant for a kind of with in the irrigation canals and ditches (trench) not the amorphous silicon layer of fusion and carry out the manufacture method of the polysilicon layer of transverse crystallizing (lateral crystallization) as nucleation site.
Background technology
Low-temperature polysilicon film transistor LCD (Low Temperature PolySiliconLiquid Crystal Display, LTPS LCD) be different from general traditional amorphous silicon film transistor LCD (a-Si TFT-LCD), its electron mobility can reach 200cm
2More than/the V-sec, thus can make the thin-film transistor element area occupied littler of meeting the demand of high aperture, and then promote display brightness and reduce whole power consumption problem.In addition, because the increase of electron mobility can be manufactured in part drive circuit and thin-film transistor technology on the glass baseplate in the lump, significantly promote the reliability of display panels, and make the panel manufacturing cost significantly reduce.Therefore, the manufacturing cost of low-temperature polysilicon film transistor LCD is low than the amorphous silicon film transistor LCD.In addition, the low-temperature polysilicon film transistor LCD has thin thickness, in light weight, characteristics such as resolution is good, and very suitable being applied to requires on the action end product of light and handy power saving.
In the low-temperature polysilicon film transistor LCD (LTPS-LCD), the channel layer of thin-film transistor is usually with quasi-molecule laser annealing technology (Excimer Laser Annealing, ELA) form, the quality of this channel layer depends on the size (grain size) and the uniformity (uniformity) thereof of polysilicon crystal usually, and the uniformity of the size of crystal and crystal all has direct connection with the control of excimer laser on energy.
Figure 1A to Fig. 1 C is the making schematic flow sheet of known polysilicon layer.At first please refer to Figure 1A, a base material 100 is provided, this base material 100 is generally glass substrate.Then form a resilient coating 102 on base material 100, this resilient coating 102 is generally a lamination structure that includes silicon nitride layer and silicon oxide layer.
Then please refer to Figure 1B and Fig. 1 C, after forming resilient coating 102, then form an amorphous silicon layer 104 on resilient coating 102.Be to carry out an excimer laser thermal anneal process afterwards, the energy of control excimer laser irradiation on amorphous silicon layer 104, make amorphous silicon layer 104 be close to complete fusion, only go up a little nuclei of crystallization (seed ofcrystallization) of reservation in resilient coating 102 surfaces.Afterwards, the liquid-state silicon of these fusions can begin crystallization from the above-mentioned nuclei of crystallization and become a polysilicon layer 106, and can have the very not uniform crystal boundaries 108 of distribution in this polysilicon layer 106.
In the above-mentioned excimer laser thermal anneal process, if when the energy of excimer laser surpasses SLG (Super Lateral Growth) point, it is very low that the distribution density of the nuclei of crystallization can be fallen moment, causes the crystallite dimension of polysilicon layer little and uniformity is not good.Therefore, it is very accurate that the energy of excimer laser must be controlled, and can produce the polysilicon layer that crystalline size and uniformity all conform with demand, so the process margin of technology is very little.
Fig. 2 carries out the schematic diagram that polysilicon layer is made for known by the opening on the resilient coating.Please refer to Fig. 2, a base material 200 is provided, this base material 200 is generally glass substrate.Then form a resilient coating 202 on base material 200, this resilient coating 202 is generally a lamination structure that includes silicon nitride layer and silicon oxide layer.In order to improve the problem of crystalline size, uniformity and process margin in the formed polysilicon layer, be known in and make a plurality of openings of arranging with array way 204 in the resilient coating 202, these openings 204 will be played the part of considerable role in the excimer laser thermal anneal process.In the process of excimer laser thermal annealing, amorphous silicon layer (not illustrating) on the zone beyond the opening 204 will be melt into liquid silicon fully, and the amorphous silicon layer (not illustrating) of opening 204 bottoms is not melted fully, and it is a polysilicon layer that therefore liquid silicon can begin crystallization (laterally growing up) from opening 204 bottoms.From the above, the position of beginning crystallization is the position of opening 204, so the effectively quantity examined of crystallization control and the position of its distribution.
Fig. 3 is the crystal boundaries schematic diagram of known polysilicon layer.Please refer to Fig. 3, because the not fusion fully of the amorphous silicon layer of opening 204 bottoms, so liquid silicon can begin to grow up outward from opening 204 bottoms.Because the liquid-state silicon of fusion is laterally to be grown up outward by opening 204, thus between adjacent opening 204, can have crystal boundaries 300, and these grain boundaries 300 will directly be subject to opening 204 distance each other.Because opening 204 is with arranged in array mode, its on the x direction with the y direction on crystal grain-growth all be subjected to the restriction of adjacent apertures 204, therefore, though the effective distribution situation of crystallization control nuclear of this mode still limits to some extent for crystallite dimension.
Summary of the invention
Therefore, purpose of the present invention is in the manufacture method that proposes a kind of polysilicon layer, and formed polysilicon layer has bigger crystalline size and preferable uniformity.
Another object of the present invention can be so that the process margin of LASER HEAT annealing process (process window) greatly promotes in the manufacture method that proposes a kind of polysilicon layer.
A further object of the present invention is in the manufacture method that proposes a kind of polysilicon layer, and formed polysilicon layer has less crystal boundaries (grain boundary).
For reaching above-mentioned purpose of the present invention, a kind of manufacture method of polysilicon layer is proposed, comprise the following steps: that (a) provides a base material; (b) on base material, form a resilient coating with a plurality of first irrigation canals and ditches; (c) on resilient coating, form an amorphous silicon layer; And (d) carry out a laser annealing technique, make after the amorphous silicon layer fusion by these first irrigation canals and ditches top beginning crystallizations, to form a polysilicon layer.
Among the present invention, the formation method with resilient coating of first irrigation canals and ditches for example comprises the following steps: that (a) forms a silicon nitride layer on base material; (b) in silicon nitride layer, form a plurality of second irrigation canals and ditches; And (c) on silicon nitride layer, form a conformal silicon oxide layer, with a plurality of first irrigation canals and ditches corresponding of formation naturally in silicon oxide layer with second irrigation canals and ditches.
Among the present invention, the formation method with resilient coating of first irrigation canals and ditches for example comprises the following steps: that (a) forms a silicon nitride layer on base material; (b) on silicon nitride layer, form one silica layer; And (c) in silicon oxide layer, form a plurality of first irrigation canals and ditches.
First irrigation canals and ditches that the present invention is above-mentioned and/or second irrigation canals and ditches for example are by photoetching/etched mode forms, and above-mentioned laser annealing technique for example is an excimer laser annealing process.
Description of drawings
Figure 1A to Fig. 1 C is the making schematic flow sheet of known polysilicon layer;
Fig. 2 carries out the schematic diagram that polysilicon layer is made for known by the opening on the resilient coating;
Fig. 3 is the crystal boundaries schematic diagram of known polysilicon layer;
Fig. 4 is for carrying out the schematic diagram that polysilicon layer is made according to a preferred embodiment of the present invention by the irrigation canals and ditches on the resilient coating;
Fig. 5 is the crystal boundaries schematic diagram according to a preferred embodiment of the present invention polysilicon layer;
Fig. 6 A to Fig. 6 D is the making schematic flow sheet according to a preferred embodiment of the present invention polysilicon layer; And
Fig. 7 A to Fig. 7 D is the making schematic flow sheet according to another preferred embodiment polysilicon layer of the present invention.
100,200,400,600,700: base material
102,202,402,602,702: resilient coating
104,606,706: amorphous silicon layer
106,608,708: polysilicon layer
108,300,500,610,710: crystal boundaries
204: opening
404,604,704b: first irrigation canals and ditches
602a, 702a: silicon nitride layer
602b, 702b: silicon oxide layer
704a: second irrigation canals and ditches
Embodiment
Fig. 4 is for carrying out the schematic diagram that polysilicon layer is made according to a preferred embodiment of the present invention by the irrigation canals and ditches on the resilient coating.Please refer to Fig. 4, a base material 400 is provided, this base material 400 is generally glass substrate.Then form a resilient coating 402 on base material 400, this resilient coating 402 for example is one to include the lamination structure (will be specified in the back) of silicon nitride layer and silicon oxide layer.In order to improve the problem of crystalline size, uniformity and process margin in the formed polysilicon layer, present embodiment is made a plurality of first irrigation canals and ditches 404 parallel to each other in resilient coating 402, these first irrigation canals and ditches 404 will be played the part of the role that the nuclei of crystallization are provided in follow-up excimer laser thermal anneal process.In the process of excimer laser thermal annealing, amorphous silicon layer (not illustrating) on the zone beyond first irrigation canals and ditches 404 will be melt into liquid silicon fully, and the amorphous silicon layer (not illustrating) of first irrigation canals and ditches, 404 bottoms is not melted fully, and therefore liquid silicon can be a polysilicon layer since the 404 bottom crystallizations of first irrigation canals and ditches (laterally growing up).From the above, the position of beginning crystallization is the position of first irrigation canals and ditches 404, so effectively crystallization control is examined the position that distributes.
Fig. 5 is the crystal boundaries schematic diagram according to a preferred embodiment of the present invention polysilicon layer.Please refer to Fig. 5, because the not fusion fully of the amorphous silicon layer of first irrigation canals and ditches, 404 bottoms, so liquid silicon can be grown up outward since first irrigation canals and ditches, 404 bottoms.Because the liquid-state silicon of fusion is laterally to be grown up outward by first irrigation canals and ditches 404, thus between the first adjacent irrigation canals and ditches 404, can have crystal boundaries 500, and these grain boundaries 500 will directly be subject to first irrigation canals and ditches 404 distance each other.Because first irrigation canals and ditches 404 are to be arranged in parallel with each other, for example to arrange along the y direction, its crystal grain-growth only is subjected to the restriction of adjacent first irrigation canals and ditches 404 on the x direction.In other words, provide the nuclei of crystallization of many linearities can take into account the crystallite dimension and the uniformity of polysilicon layer simultaneously by first irrigation canals and ditches 404.
Below be described in detail at the making of whole polysilicon layer.Fig. 6 A to Fig. 6 D is the making schematic flow sheet according to a preferred embodiment of the present invention polysilicon layer.At first please refer to Fig. 6 A, a base material 600 is provided, this base material 600 is generally glass substrate.Then form a resilient coating 602 on base material 600, this resilient coating 602 for example is one to include the lamination structure of silicon nitride layer 602a and silicon oxide layer 602b.Above-mentioned silicon nitride layer 602a and silicon oxide layer 602b for example are that (Plasma Enhanced ChemicalVapor Deposition, mode PECVD) forms with plasma activated chemical vapour deposition.
Then please refer to Fig. 6 B, form a plurality of first irrigation canals and ditches 604 that are arranged in parallel with each other in above-mentioned resilient coating 602, these first irrigation canals and ditches 604 for example are to form in photoetching/etched mode, and the position of its formation for example is in the silicon oxide layer 602b on upper strata.
Then please be simultaneously with reference to Fig. 6 C and Fig. 6 D, after first irrigation canals and ditches 604 form, then form an amorphous silicon layer 606 on resilient coating 602, for example (Low Pressure Chemical Vapor Deposition, mode LPCVD) forms amorphous silicon layer 606 with low-pressure chemical vapor deposition.And after forming amorphous silicon layer 606, then carrying out a LASER HEAT annealing process, this LASER HEAT annealing process for example is an excimer laser thermal anneal process.In the LASER HEAT annealing process, the energy of control excimer laser irradiation on amorphous silicon layer 606, make the amorphous silicon layer 606 on irrigation canals and ditches 604 zone in addition of winning be close to complete fusions, and the amorphous silicon layer 606 of first irrigation canals and ditches, 604 bottoms is not melted fully, and therefore liquid silicon can be a polysilicon layer 608 since the 604 bottom crystallizations of first irrigation canals and ditches.In addition, can have grain boundary 610 by the formed polysilicon layer 608 of LASER HEAT annealing process, this grain boundary 610 only can appear between the first adjacent irrigation canals and ditches 604.
Fig. 7 A to Fig. 7 D is the making schematic flow sheet according to another preferred embodiment polysilicon layer of the present invention.At first please refer to Fig. 7 A, a base material 700 is provided, this base material 700 is generally glass substrate.Then form a silicon nitride layer 702a on base material 700, this silicon nitride layer 702a for example forms in the mode of plasma activated chemical vapour deposition (PECVD).Then form a plurality of second irrigation canals and ditches 704a that are arranged in parallel with each other in above-mentioned silicon nitride layer 702a, these second irrigation canals and ditches 704a for example forms in photoetching/etched mode.
Then please refer to Fig. 7 B, after the second irrigation canals and ditches 704a forms, then form a conformal silicon oxide layer 702b on silicon nitride layer 702a, this silicon nitride layer 702a and silicon oxide layer 702b constitute a resilient coating 702.Because silicon oxide layer 702b is covered on the silicon nitride layer 702a, so can form a plurality of first irrigation canals and ditches 704b by nature on the position of the silicon oxide layer 602b second irrigation canals and ditches 704a.In addition, the width of these first irrigation canals and ditches 704b can be littler than the width of the second irrigation canals and ditches 704a because of the cause of ladder covering (step coverage), therefore present embodiment can be produced width less than critical dimension (Critical Dimension, first irrigation canals and ditches 704b CD).
Then please after first irrigation canals and ditches 704 form, then form an amorphous silicon layer 706 on resilient coating 702 simultaneously with reference to Fig. 7 C and Fig. 7 D, amorphous silicon layer 706 for example forms in the mode of low-pressure chemical vapor deposition (LPCVD).And after forming amorphous silicon layer 706, then carrying out a LASER HEAT annealing process, this LASER HEAT annealing process for example is an excimer laser thermal anneal process.In the LASER HEAT annealing process, the energy of control excimer laser irradiation on amorphous silicon layer 706, make the amorphous silicon layer 706 on the irrigation canals and ditches 704b zone in addition of winning be close to complete fusions, and the amorphous silicon layer 706 of first irrigation canals and ditches 704b bottom is not melted fully, and therefore liquid silicon can be a polysilicon layer 708 since first irrigation canals and ditches 704b bottom crystallization.In addition, can have grain boundary 710 by the formed polysilicon layer 708 of LASER HEAT annealing process, this grain boundary 710 only can appear between the first adjacent irrigation canals and ditches 704b.
In sum, the manufacture method of polysilicon layer of the present invention has following advantage at least:
Since in the irrigation canals and ditches not fully the amorphous silicon layer of fusion the good nuclei of crystallization (seedof crystallization) are provided, it is big to make that the polysilicon layer that becomes to grow has a crystalline size, and the advantage that has good uniformity.
2. irrigation canals and ditches can be made with existing photoetching/technology or other technology easily.
Since in the irrigation canals and ditches not fully the amorphous silicon layer of fusion good nucleation site is provided, make that the process margin of LASER HEAT annealing process is very big.
4. because irrigation canals and ditches provide continuous nucleation site, the feasible polysilicon layer that becomes to grow has less crystal boundaries.
Claims (6)
1. the manufacture method of a polysilicon layer is characterized in that, this method comprises:
One base material is provided;
Formation one has the resilient coating of a plurality of first irrigation canals and ditches on this base material;
On this resilient coating, form an amorphous silicon layer; And
Carry out a laser annealing technique, make after this amorphous silicon layer fusion by those first irrigation canals and ditches top beginning crystallizations, to form a polysilicon layer.
2. the manufacture method of polysilicon layer as claimed in claim 1 is characterized in that, the formation method with resilient coating of those irrigation canals and ditches comprises:
On this base material, form a silicon nitride layer;
In this silicon nitride layer, form a plurality of second irrigation canals and ditches; And
On this silicon nitride layer, form a conformal silicon oxide layer, in this silicon oxide layer, to form those first irrigation canals and ditches naturally.
3. the manufacture method of polysilicon layer as claimed in claim 2 is characterized in that, those second irrigation canals and ditches form in photoetching/etched mode.
4. the manufacture method of polysilicon layer as claimed in claim 1 is characterized in that, the formation method with resilient coating of those irrigation canals and ditches comprises:
On this base material, form a silicon nitride layer;
On this silicon nitride layer, form one silica layer; And
In this silicon oxide layer, form those first irrigation canals and ditches.
5. the manufacture method of polysilicon layer as claimed in claim 4 is characterized in that, those first irrigation canals and ditches are to form in photoetching/etched mode.
6. the manufacture method of polysilicon layer as claimed in claim 1 is characterized in that, this laser annealing technique is an excimer laser annealing process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021493952A CN1307690C (en) | 2002-11-12 | 2002-11-12 | Method for making polysilicon layer |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB021493952A CN1307690C (en) | 2002-11-12 | 2002-11-12 | Method for making polysilicon layer |
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| CN1501449A CN1501449A (en) | 2004-06-02 |
| CN1307690C true CN1307690C (en) | 2007-03-28 |
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| CNB021493952A Expired - Lifetime CN1307690C (en) | 2002-11-12 | 2002-11-12 | Method for making polysilicon layer |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009082840A1 (en) * | 2007-12-27 | 2009-07-09 | Applied Materials, Inc. | Method for forming a polysilicon film |
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| KR100954332B1 (en) * | 2003-06-30 | 2010-04-21 | 엘지디스플레이 주식회사 | Liquid crystal display device and method of fabricating the same |
| CN1300825C (en) * | 2004-07-21 | 2007-02-14 | 友达光电股份有限公司 | Method for producing multicrystalline silicon layer |
| CN100433242C (en) * | 2004-10-10 | 2008-11-12 | 友达光电股份有限公司 | Method for producing low-temperature polycrystalline silicon thin membrane |
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| CN103762167A (en) * | 2011-12-31 | 2014-04-30 | 广东中显科技有限公司 | Bridged-grain polysilicon thin film transistor and manufacturing method thereof |
| CN102891107B (en) * | 2012-10-19 | 2015-03-25 | 京东方科技集团股份有限公司 | Low temperature polysilicon base plate and manufacturing method thereof |
| CN104253026A (en) * | 2013-06-27 | 2014-12-31 | 上海和辉光电有限公司 | Polycrystalline silicon layer preparing method |
| CN103745916B (en) * | 2013-12-30 | 2017-07-28 | 深圳市华星光电技术有限公司 | The method for defining polycrystalline silicon growth direction |
| CN103730336B (en) * | 2013-12-30 | 2016-07-06 | 深圳市华星光电技术有限公司 | The method in definition polycrystalline silicon growth direction |
| CN103887244B (en) * | 2014-03-07 | 2017-05-31 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
| CN104064451A (en) * | 2014-07-10 | 2014-09-24 | 深圳市华星光电技术有限公司 | Low-temperature poly-silicon manufacturing method, method for manufacturing TFT substrate by utilization of low-temperature poly-silicon manufacturing method, and TFT substrate structure |
| CN105527771A (en) * | 2016-02-18 | 2016-04-27 | 武汉华星光电技术有限公司 | Array substrate and liquid crystal display device |
| CN106229254B (en) * | 2016-08-31 | 2019-11-26 | 京东方科技集团股份有限公司 | A kind of production method and polysilicon membrane of polysilicon |
| CN107946173B (en) * | 2017-10-12 | 2019-12-27 | 惠科股份有限公司 | Method for manufacturing low-temperature polycrystalline silicon thin film and transistor |
| CN107919268B (en) | 2017-10-12 | 2020-10-09 | 惠科股份有限公司 | Method for manufacturing low-temperature polycrystalline silicon thin film and transistor |
| CN107910263A (en) * | 2017-10-12 | 2018-04-13 | 惠科股份有限公司 | The manufacture method of low-temperature polysilicon film and transistor |
| CN110143594A (en) * | 2019-06-19 | 2019-08-20 | 中国科学院宁波材料技术与工程研究所 | A kind of methods and applications of induced with laser Si oxide disproportionation |
| CN111370427A (en) * | 2020-03-18 | 2020-07-03 | 武汉华星光电半导体显示技术有限公司 | Array substrate |
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| JPH07231099A (en) * | 1994-02-16 | 1995-08-29 | Casio Comput Co Ltd | Method for manufacturing thin-film semiconductor element array |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2009082840A1 (en) * | 2007-12-27 | 2009-07-09 | Applied Materials, Inc. | Method for forming a polysilicon film |
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| CN1501449A (en) | 2004-06-02 |
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