CN1301537C - Low temperature reflux dielectric-boron phosphor-silicon fluorine glass - Google Patents
Low temperature reflux dielectric-boron phosphor-silicon fluorine glass Download PDFInfo
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- CN1301537C CN1301537C CNB991051238A CN99105123A CN1301537C CN 1301537 C CN1301537 C CN 1301537C CN B991051238 A CNB991051238 A CN B991051238A CN 99105123 A CN99105123 A CN 99105123A CN 1301537 C CN1301537 C CN 1301537C
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Abstract
The present invention relates to a device and a method for manufacturing fluorine mixed boron-phosphorosilicate glass (F-BPSG) on devices by low pressure chemical vapor deposition technology. The F-BPSG glass does not basically have layers with cavities granules on substrate with 0.10 mu m of gaps and the shape ration of 6 to 1; reactant gas comprises boron and phosphorus doping agents, oxygen and mixtures of TEOS and FTES. Deposition is carried out at the temperature of 750 to 850 DEG C and at the pressure of 1 to 3 torr; annealing is preferably carried out under the similar conditions so that the surface of the F-BPSG can be further flattened. The present invention provides the F-BPSG glass and semiconductor wafer on which F-BPSG layers are arranged.
Description
Technical field
The present invention relates to semi-conductor electricity sub-element and manufacture method thereof, relate to more precisely as the essentially no cavity on the semiconductor wafer narrow and reach 0.10 μ m and shape improved boron-phosphorosilicate glass, and comprise the method that about 800 ℃ reflux temperature that the manufacturing that is lower than present suggestion requires is made glassy layer down than layer up to 6: 1.
Background technology
In the manufacturing of semi-conductor electricity sub-element, must be in glass with element encases, or with glass as interlevel dielectric film.Usually, glassy layer is to be produced on SiO on the wafer surface with chemical vapor deposition (CVD) method
2Layer.Because the ever-increasing requirement of industrial quarters, the demand of the current densities of meticulousr circuitous pattern and Geng Gao is made that must develop improved glassy layer makes semiconductor surface stratification in manufacturing process.Special what be concerned about is the inhomogeneities of semiconductor substrate surface, when current densities and high-precision circuit figure further improve, becomes more crucial.
On semiconductor wafer, make glassy layer, SiO in early days
2Layer is used as glass material.By means of joining such as the dopant boron and/or the phosphorus in the glass, these oxide glass layers have been improved, this dopant has reduced fusing point and has made and might reheat with soften glass layer, makes it to reflux, to produce smooth surface on semiconductor device.Yet, along with current densities with to the increase of the demand of fine circuit pattern, having realized that preparation and processing oxide glass film do not stay cavity or bubble with the more tiny gap on the filling semiconductor device surface in the oxide glass layer, is very important.
Boron-phosphorosilicate glass (BPSG) is used as interlayer dielectric layer at present, and must provide the narrow structure that reaches 0.10 μ m and the no cavity of shape ratio up to 6: 1 to fill.In order to satisfy this requirement, in it is about 800-850 ℃ glass transformation temperature scope, deposit after, make the bpsg layer backflow usually.Glass transformation temperature is a critical nature of glass, and for process efficiency with avoid in the manufacturing process temperature that the damaging action of semiconductor wafer is wished that very reflux temperature is low as far as possible.
Usually by means of in carrier gas and in vapour phase, make tetraethyl orthosilicate (TEOS), trimethyl phosphate (TMP) or hydrogen phosphide (PH
3) and trimethylborate (TMB) or triethyl borate (TEB) react at aerobic and under the situation that preferably has small amount of ozone to exist and make the silicon oxide layer (BPSG) of boron and phosphorus doping.This technology can be in plasma arc light technology, or have (350-600 ℃) under the atmospheric pressure of ozone, or carry out with the decompression operation under the higher temperature (for example 700-850 ℃).Usually, the technology of elevated pressures is used low temperature process, for example 400-600 ℃ of temperature in 50-760 torr (50-760mmHg) (having ozone) down and 350-480 ℃ of temperature under 1-10 torr (1-10mmHg), come deposit BPSG with the common oxidation of reactant.As an alternative, can adopt the high-temperature deposition technology such as the low pressure that is about 0.5-5 torr (0.5-5mmHg), this technology is carried out in being about 700-850 ℃ temperature range.
In a broad sense, for narrow reach 0.10 μ m and the nothing cavity structure filling of shape ratio up to 6: 1 are provided, wish that very BPSG has low viscosity in manufacturing process.By means of improving reflux temperature, i.e. the temperature that the glass of deposit begins to flow is also referred to as glass transition temperature usually, can reduce the viscosity of BPSG.By means of improving boron and the concentration of dopant of phosphorus in BPSG, also can reduce viscosity.In addition, the filling behavior of glass is capillary function.Mix fluorine and improved surface tension, thereby reduce viscosity and strengthened the filling characteristic under the lower temperature.
Yet, the hot polymerization collection of semiconductor device be limited in about 800 ℃ following 30 minutes.Therefore, for many manufacturing situations, the raising of reflux temperature is worthless.Equally, because too high concentration of dopant causes the surface crystal growth of boric acid or boron phosphate after deposit, so B
2O
3And P
2O
5Concentration of dopant be limited in about 5% weight ratio.Because manufacturing and integration problem in follow-up photoetching, reactive ion etching (RIE) and chemico-mechanical polishing (CMP) technology, surface crystal is worthless.
Authorized many patents to make great efforts to improve bpsg film in this respect.United States Patent (USP) 4791005,4845054,5094984,5104482,5180692,5286681 and 5354387 has illustrated the method for making bpsg film on Semiconductor substrate.
In European publication number 0562625, the oxygen atom that can replace bpsg film with the non-bridged bond component such as the halogen atom that comprises fluorine is disclosed.The oxo bridge key that this has broken up between the silicon atom causes dielectric film viscosity to reduce.Be typically with fluorine and replace partial oxygen in the bpsg film, be about 850 ℃ thereby the flow temperature of dielectric film is reduced to.
Summary of the invention
Consider prior art problems and defective, therefore, the purpose of this invention is to provide a kind of improvement of on the substrate such as semiconductor wafer, making boron-phosphorosilicate glass method, this glass has the gap-filling properties that improved and low reflux temperature.
Another object of the present invention provides the substrate that has the boron-phosphorosilicate glass layer on a kind of such as semiconductor wafer its, and this glass has the gap-filling properties that improved and low reflux temperature.
Another purpose of the present invention provides a kind of boron-phosphorosilicate glass with clearance filling capability of enhancing, so that narrow reach 0.10 μ m and the nothing cavity structure filling of shape ratio up to 6: 1 to be provided.
Other purpose of the present invention and advantage will obtain understanding from specification.
Having reached the one skilled in the art in the present invention will be conspicuous above-mentioned and other purpose and advantage, first kind of situation of the present invention is in the low pressure chemical vapor deposition chamber, make the method for the boron-phosphorosilicate glass of mixing fluorine (BPSG) that strengthens on the substrate such as semiconductor wafer, it comprises the following step:
In the low pressure chemical vapor deposition chamber, make by TEOS, such as the fluorine-containing alkoxy silane of FTES (fluorine triethoxysilane), such as TEB or TMB and PH
3And so on boron and the gaseous source formed of phosphorus dopant and oxygen source, at approximately 650-850 ℃, preferably 720-780 ℃ temperature and approximately 0.5-5 torr (0.5-5mmHg) preferably under the pressure of 1-3 torr (1-3mmHg), are mixed and are reacted;
Deposit one deck is mixed the BPSG of fluorine on the Semiconductor substrate in deposition chamber; And
Be lower than about 800 ℃, be preferably lower than under about 750 ℃ temperature, reflux stacked semiconductor device for example 10-20 minute effective time with the leveling deposit the layer.
Under optimal cases of the present invention, this method adopts the fluorine source that the weight ratio of TEOS is about 0.25: 1-3: 1, preferably 0.5: 1-2: 1 the gaseous mixture of being made up of fluorine source and TEOS.In another most preferred embodiment, reaction temperature is about 720-780 ℃, and reaction pressure is about 1-3 torr (mmHg).
In the best approach of making the BPSG that mixes fluorine on the semiconductor device is to comprise in the device of circular reative cell, and wherein a plurality of devices are flatly equidistant to be arranged in the reative cell and rotation, and gaseous reactant reacts.Under splendid situation of the present invention, adopt segmentation air-flow method alternately, wherein by boron component (for example TEB), TEOS, oxygen source (O for example
2), carrier gas (N for example
2) and fluorine source (for example FTES) gaseous mixture of forming mixed and send into the inlet that replaces at reative cell periphery place, and phosphorous dopant component (PH for example
3), oxygen source (O for example
2) and carrier gas (N for example
2) gaseous mixture be admitted to the inlet that other replace.
Under another situation of the present invention, device is used to make the fluorine boron phosphorus doped silex glass that strengthens on the substrate such as semiconductor wafer, and this device comprises:
Low pressure rounding chemical vapor deposition chamber, it has gas inlet device and substrate is supported in supportive device in the reative cell, preferably also has the device of rotation substrate supporting device;
Be used for presenting the device of the gaseous source of forming by tetraethyl orthosilicate, fluorine-containing alkoxy silane, boron and phosphorus dopant and oxygen source to inlet device; And
The boron-phosphorosilicate glass layer that each gas reacts in reative cell and the deposit fluorine mixes on substrate wherein.
Under another situation of the present invention, make the semiconductor wafer of BPSG (F-BPSG) layer that has the fluorine doping on it of method and apparatus of the present invention.
Description of drawings
In claims, describe features of novelty of the present invention and element characteristic in detail.Accompanying drawing only is for illustrative purposes, so be not drawn to scale.But with reference to detailed description with the accompanying drawing, can understand the present invention's itself tissue and method of operation best, in these accompanying drawings:
Fig. 1 is the side cutaway view that is laminated with the semiconductor device of bpsg film of the present invention.
Fig. 2 is the side cutaway view that is laminated with the semiconductor device that contains empty bpsg film of prior art.
Fig. 3 is the side cutaway view of semiconductor device that is laminated with the bpsg film that contains surface crystal of prior art.
Fig. 4 is that the present invention is used for the vertical view of on a plurality of semiconductor wafer substrate reaction chamber apparatus of deposit bpsg film.
Embodiment
When describing most preferred embodiment of the present invention, will be with reference to figure 1-4, wherein identical reference number is represented components identical of the present invention.Each element of the present invention is not necessarily drawn in proportion among the figure.
According to the present invention, fluorine-containing BPSG insulation levelling blanket (hereinafter referred to as F-BPSG) is produced on the surface of semiconductor wafer and other electron component substrate.The feature of this F-BPSG layer is not have cavity and surface crystal basically, and is the glassy layer that can reflux easily under the quite low reflux temperature that conforms to the semiconductor wafer fabrication process of present proposition.
Term used herein " semiconductor wafer " means the wafer surface structure that comprises such as the devices such as lead-in wire, groove and transistor of protuberance.Structure on the semiconductor wafer surface is formed alleged " stepped ramp type surface " usually, the presentation surface structure forms groove between structure, comprise high shape than groove, that is the degree of depth to the ratio of width greater than 1, for example 4: 1 or even a kind of structure of 6: 1 groove.The one skilled in the art knows, also can contain the raceway groove (or groove) of filling such as the glassy layer that is deposited in the surface of stacked substrate.
At first with reference to Fig. 2 and 3, the integrated circuit structure of commercial unacceptable prior art demonstrates has the bpsg layer that contains cavity and/or surface crystal on it.So, in Fig. 2, be shown 10 semiconductor device usually and comprise substrate 11 such as the silicon wafer of the lead-in wire 12 that a plurality of protuberances are arranged on its surface.It is groove 14 that the lead-in wire 12 of protuberance forms a series of raceway groove betwixt, and this raceway groove must be used the bpsg layer complete filling, and the cavity or the surface particles of any significant amounts can not be arranged.Conventional coating and the bpsg layer that refluxes are illustrated as 13, and a large amount of cavity 15 is arranged in groove 14.Equally, in Fig. 3, in the groove 14 of the surface of bpsg layer 13 and bpsg layer, show surface crystal 16.
With Fig. 2 and 3 and Fig. 1 of the glass laminated semiconductor wafer that makes according to the inventive method compare.Use method of the present invention, apply the Semiconductor substrate 11 that has the lead-in wire 12 of a series of protuberances on it with F-BPSG 22.In layer, do not have possibility to make cavity or the surface crystal of wafer in commercial unacceptable significant amounts, and such glass laminated electronic component the electronics process industry is required just.
F-BPSG rete of the present invention makes in the well-known low pressure chemical vapor deposition in present technique field (LP-CVD).In most preferred embodiment, reative cell horizontally rotates for circle and around vertical center axis, is equipped with a plurality of silicon wafers on horizontal circular platform.Process gas is injected in the reative cell, preferably is injected into a series of porch that are positioned at the reative cell periphery.Under optimal cases of the present invention, adopted two group reaction gases, every group of gas is alternately injected reative cell by a series of inlets.Followingly be discussed further with reference to Fig. 4.
In a broad sense, reactant is by phosphorus and boron dope agent, tetraethyl orthosilicate (TEOS) and fluorine-containing alkoxy silane, preferably the gaseous source of Ethoxysilane (FTES represents the fluorine triethoxysilane, is commonly used to represent the fluoroalkoxysilane source) composition.Ethoxysilane also can replace to form the difluoro diethoxy silane with two fluorine atoms.Though also plan also can be used for technology such as other fluoroalkoxysilane of fluorine Ethoxysilane, for simplicity, will only be described below herein to FTES.The alkoxyl that alkoxyl family is preferably lower, normally ethyoxyl.Gaseous reactant also comprises the gaseous source of being made up of oxygen that comprises ozone and oxygen/ozone mixture and hydrogen peroxide.Carrier gas such as argon, nitrogen or helium also appears in the admixture of gas usually, and sees it is preferably from the viewpoint of technological operation.
The gas source of boron and phosphorus can comprise any gas that contains boron or phosphorus respectively.Boron and phosphorus source can be contained and not hinder the F-BPSG deposit, and any other material that can decompose in the concrete pressure and temperature scope of technology and react with TEOS and FTES the two and oxygen and/or ozone.This gaseous source of boron and phosphorus is organically boracic and phosphorous gas preferably, and its can decompose under deposition temperature, and volatilization of the remainder of gas component and the vacuum-pumping system that is held the reative cell vacuum are removed.
The example of this gaseous source of boron and phosphorus comprises triethyl borate (TEB), trimethylborate (TMB), hydrogen phosphide, triethyl phosphate (TEP) and so on and composition thereof.Because the efficient that is manifested, best boron and phosphorus gaseous source are TEB and hydrogen phosphide.
An important feature of the present invention is to adopt the mixture of being made up of TEOS and FTES to obtain enhancing F-BPSG rete of the present invention in low pressure chemical vapor deposition (LPCVD) reative cell.FTES can change significantly to the weight ratio of TEOS, and preferably about 0.25: 1-3: between 1, about 0.5: 1-2: 1, for example 0.5: 1-1: 1 is better.
Usually, with present technique field well-known liquid injection system, the gaseous reactant source is mixed with nonreactive carrier gas such as nitrogen, argon or helium.The discrete pump of liquid injection system general using is fed to liquid reactant suction evaporation chamber in the reative cell with steam then.Like this, if more than one liquid will be fed to reative cell with the form of gaseous mixture, then each liquid is drawn into same chamber and volatilization, injects with the form of gaseous mixture then.
Gaseous reactant and/or evaporated liquid reactant can mix with each inert carrier gas and be injected in the reative cell respectively individually.The best way is the gaseous source of boron and phosphorus dopant and appropriate non reactive carrier gas to be combined into a gaseous state inject stream, and TEOS and FTES are combined into another gaseous state and inject stream.Oxygen and/or ozone reaction agent can mix with in described two streams one or two.
In splendid embodiment of the present invention, because its efficient that manifests has formed two gaseous states and injected stream.One is injected the carrier gas that stream contains hydrogen phosphide (or other phosphorus source), oxygen and/or ozone and nitrogen and so on.Another stream of reactants contains the carrier gas such as TEB, TEOS, FTES, oxygen and/or ozone and nitrogen.Can use above-mentioned liquid injection system as mentioned above.
The used optimum vacuum reaction chamber apparatus of the present invention comprises circular device, and wherein wafer is positioned at the periphery of the levelling bench of rotation.Fig. 4 shows the subregion situation of this device, and it comprises a series of inlets, and each above-mentioned gas stream alternately injects along the periphery of vacuum reaction chamber.So, as shown in Figure 4, be shown 9 wafers 10 that 17 reative cell has the periphery that is positioned evenly over reative cell platform 21.The place shows the many input ports that are expressed as 18a-18l at the reative cell periphery.As mentioned above with the TEB/TEOS/FTES/O that comprises of liquid injection system preparation
2/ N
2Gaseous source 19, be introduced at the input port 18a, the 18c that replace, 18e, 18g, 18i, 18k place.Phosphine containing/O
2/ N
2Phosphorous stream 20 be fed to inlet 18b, 18d, 18f, 18h, 18j, 18l as shown.Reative cell 17 as shown by arrow A direction rotation in deposition process.
Method of the present invention comprises employing low pressure chemical vapor deposition (LPCVD) technology and uses the mixture of being made up of TEOS and FTES reactant as the silicon source.In a broad sense, the reaction of F-BPSG layer and deposit are to carry out being about 650-850 ℃ deposition temperature and being about under the pressure of 0.5-5 torr (mmHg).In most preferred embodiment, adopted to be about 750-850 ℃ deposition temperature, this provides the original position of the F-BPSG layer of deposit to reflux in deposition process.Because this original position refluxes, can with same deposit/annealing temperature and same boron and phosphorus dopant concentration fill have high shape than and for example less than the closely spaced wafer window of 0.10 μ m.No matter used deposition conditions is how, after deposit, can and normally in used same LPCVD system when carrying out deposit under 750-850 ℃, preferably be lower than 800 ℃, for example under 750 ℃, carry out 20 minutes annealing.The cost that this has just improved operating efficiency and has reduced manufacturing process.Usually at 0.5-5 torr (mmHg), for example anneal under the low pressure of 1-3 torr (mmHg).
Have been found that, under same deposition temperature and same annealing temperature, make in the comparative example of conventional bpsg film and F-BPSG film of the present invention with same boron and phosphorus dopant concentration, F-BPSG film of the present invention provides the filling of not having the cavity, and the BPSG deposit has a large amount of cavities, commercial be unacceptable.
Enter the overall flow rate of the gaseous reactant of deposition chamber in order to obtain the highest deposition rate, change slightly with the design and the geometry of the specific device that is used for depositing technics.Usually, the F-BPSG film of the phosphorus of the flow velocity of the reactant boron that is used to provide components by weight to be about 2-5% and 2-5%.Fluorine concentration among the F-BPSG is about the 1ppm-1% weight ratio.
Following Example is used to describe the present invention, but is not to be used for limiting the present invention.
Example
The DSM9800 system that utilizes Lam Research to make has handled 98 inches wafer simultaneously.As shown in Figure 4, alternately inject the TEB/FTES/TEOS/O for preparing with liquid injection system by 12 inlets
2/ N
2Mixture and PH
3/ O
2/ N
2Admixture of gas.The delivery rate of liquid is about 10ml/min (total liquid).PH
3Be about per minute 1 standard liter (slpm), O
2Be about 2slpm, and N
2Be about 3slpm.
The platform of fixed wafer speed with 1-10rpm in deposition process is rotated.The pressure of system is 2.9 torrs (mmHg), and deposition temperature is 750 ℃.Stop deposit after 5 minutes.In the reative cell that is similarly 2.9 torrs (mmHg), carry out 750 ℃ of annealing of 20 minutes.
The components by weight of the wafer of deposit is about 4.5% P, about 4.5% B and about 0.1% F.The wafer of deposit presents smooth surface and does not have the cavity or the surface particles of significant amounts.The feature of this wafer is to have a series of 64 megabit devices on it, the gap of 0.15 μ m is arranged between the device, and the shape ratio is about 4: 1.
Though described the present invention particularly in conjunction with concrete most preferred embodiment, obviously,,, can make many accommodations, correction and variation according to the description of front for person skilled in the art.Therefore think that claims have covered all these and met accommodation, correction and the variation of the scope of the invention and design.
Claims (7)
- One kind in the low pressure chemical vapor deposition chamber, on semiconductor wafer, make the method for the boron-phosphorosilicate glass mix fluorine, it comprises the following step:In the low pressure chemical vapor deposition chamber, under the pressure of 650-850 ℃ temperature and 0.5-5mmHg, the gaseous source that mixing and reaction are made up of TEOS, fluoroalkoxysilane, boron and phosphorus dopant and oxygen source;On the Semiconductor substrate of deposit, the bpsg layer of fluorine is mixed in deposit in reative cell; AndBe lower than under 800 ℃ the temperature, making the stacked semiconductor device layer of one effective period that reflux with the leveling deposit.
- 2. the process of claim 1 wherein that fluoroalkoxysilane is 0.25 to the weight ratio of tetraethyl orthosilicate: 1-3: 1.
- 3. the method for claim 2, wherein fluoroalkoxysilane is the fluorine triethoxysilane.
- 4. the method for claim 3, wherein reaction temperature is 720-780 ℃, and pressure is 1-3mmHg.
- 5. the method for claim 4, wherein the boron source is triethyl borate or trimethylborate, and the phosphorus source is a hydrogen phosphide.
- 6. the process of claim 1 wherein that two discrete gaseous states inject the mixed and reaction of stream, first-classly contain phosphorus source, oxygen and carrier gas, and second stream contains boron source, tetraethyl orthosilicate, fluorine-containing alkoxy silane, oxygen and carrier gas.
- 7. the method for claim 6, wherein the boron source is triethyl borate or trimethylborate, and the phosphorus source is a hydrogen phosphide.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB991051238A CN1301537C (en) | 1999-04-16 | 1999-04-16 | Low temperature reflux dielectric-boron phosphor-silicon fluorine glass |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB991051238A CN1301537C (en) | 1999-04-16 | 1999-04-16 | Low temperature reflux dielectric-boron phosphor-silicon fluorine glass |
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| Publication Number | Publication Date |
|---|---|
| CN1270935A CN1270935A (en) | 2000-10-25 |
| CN1301537C true CN1301537C (en) | 2007-02-21 |
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| CNB991051238A Expired - Fee Related CN1301537C (en) | 1999-04-16 | 1999-04-16 | Low temperature reflux dielectric-boron phosphor-silicon fluorine glass |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3975099B2 (en) | 2002-03-26 | 2007-09-12 | 富士通株式会社 | Manufacturing method of semiconductor device |
| WO2013026177A1 (en) * | 2011-08-22 | 2013-02-28 | Honeywell International Inc. | Phosphorous-comprising dopants, methods for forming phosphorous-doped regions in semiconductor substrates using such phosphorous-comprising dopants, and methods for forming such phosphorous-comprising dopants |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990007019A1 (en) * | 1988-12-21 | 1990-06-28 | Monkowski-Rhine, Inc. | Chemical vapor deposition reactor and method for use thereof |
| US5633211A (en) * | 1992-03-27 | 1997-05-27 | Matsushita Electric Industrial Co., Ld. | Semiconductor device and process |
-
1999
- 1999-04-16 CN CNB991051238A patent/CN1301537C/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990007019A1 (en) * | 1988-12-21 | 1990-06-28 | Monkowski-Rhine, Inc. | Chemical vapor deposition reactor and method for use thereof |
| US5633211A (en) * | 1992-03-27 | 1997-05-27 | Matsushita Electric Industrial Co., Ld. | Semiconductor device and process |
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