CN1300432A - Microcontroller having write enable bit - Google Patents
Microcontroller having write enable bit Download PDFInfo
- Publication number
- CN1300432A CN1300432A CN00800556A CN00800556A CN1300432A CN 1300432 A CN1300432 A CN 1300432A CN 00800556 A CN00800556 A CN 00800556A CN 00800556 A CN00800556 A CN 00800556A CN 1300432 A CN1300432 A CN 1300432A
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- microcontroller
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- program
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
- G11C16/225—Preventing erasure, programming or reading when power supply voltages are outside the required ranges
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/24—Loading of the microprogram
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
Abstract
A microcontroller having a memory programmable in user mode. The microcontroller contains circuitry for detecting whether a programming level voltage has been activated. Also included is a Longwrite enable register containing an enable bit for enabling/disabling programming of the memory. When the register contains the bit indicating programming as enabled, and the programming level voltage is detected, the microcontroller allows the program memory to be programmed. The programming can take place in user mode. The programming level voltage signal is also used to detect whether to enter into a test mode. Programming of the program memory is also possible in the test mode. The invention is also directed to a method for operating a microcontroller for controlling programming of the program memory. The microcontroller according to the invention allows increased functionality by detecting whether to enter the test mode without the requirement of a test mode select input signal.
Description
Background of the present invention
The field of the invention
The present invention relates to microcontroller, particularly relate to and have the internal storage that a write enable bit programmes to storer is used in permission in user model microcontroller.
The description of background technology
Microcontroller is designed to have nonvolatile memory on the sheet, is representative (EEPROM and EPROM) with the form of Electrically Erasable Read Only Memory.EEPROM allows microcontroller according to the requirement programming of using.EEPROM also allows to revise or wipe fully institute's written program.The nonvolatile memory of protection in the microcontroller is not important by chance or the programming of having a mind to or reprogramming.Many methods are arranged when speaking of this problem.
At United States Patent (USP) 5,808, a kind of method has been described in 544, only when CPU (central processing unit) (CPU) was being carried out instruction in the inner ROM (read-only memory) (ROM), the EEPROM in the microcontroller was programmable.Microcontroller 100 comprises security logic 116, with the lead 118 of ROM 110 coupling on the control signal of output ROM, with the lead 120 of EEPROM 109 couplings on the control signal of output EEPROM.Carrying out the sign indicating number of the outside of inner ROM 110 as CPU, when attempting EEPROM 109 programmings, security logic 116 can not addressing EEPROM 109.Whenever carrying out inner ROM 110 sign indicating number in addition, all can not be to ROM 110 addressing.In addition, the ROM security logic is involved in security logic 116 and comprise a current address comparer 202, and it compares first and second addresses in current address in the programmable counter 204 and the secure address range registers.If the program counter address is greater than first address and less than second address, the current address is set in the secure address scope.If the current address is in the secure address scope, the current address comparer is exported a high level logic signal, otherwise the output low logic level.
Another kind method concentrates on avoids the reprogramming that produces owing to the undesirable landing of power supply supply voltage.Such method is at United States Patent (USP) 5,349, describes in 669.Here, when the primary power supply voltage is switched on the back-up source supply voltage, circuit supervision.When switching generation, the data protecting device (set) that discharges discriminator circuit detects the fault of power supply power supply, and allows (enable) data protection control signal to come protected data.Another example is at United States Patent (USP) 5,199, describes in 032.Microcontroller comprises the low voltage program that monitors supply voltage and forbids (LVPI) circuit.Be lower than predetermined voltage class if supply voltage drops to, the LVPI circuit disables is used the EEPROM program register, prevents the EEPROM programming or wipes EEPROM.
Another system, for example the PIC17C42 that is made by assignee of the present invention comprises the pin TEST that an independent test pattern is selected control.Another pin MCLR/V
PpRemove the input that resets with deciding, and during programming mode, accept program voltage.In this device, the programming of storer occurs in during the special pattern, and can not occur in during normal user's use pattern, and gives test mode select signal with an independent pin assignments.
General introduction of the present invention
An object of the present invention is to provide a kind of in user model programmable micro controller.
Another object of the present invention is to allow the inside of model selection to detect by multiplexing input pin, and exempts the needs of giving an independent pin of model selection Control Allocation, thereby increases function in microcontroller.
A further object of the present invention is in the device family of pin compatibility, such as increasing function in the microcontroller.
These and other objects are to have program storage by use to write the circuit of microcontroller of the program storage of enable register, voltage detector circuit and decoder circuit and realize that wherein said decoder circuit is connected to described register and described detector circuit.Reset circuit is also connected to described register and detector circuit.The signal of reset circuit output reseting register.Reset circuit comprises an only device of ability reseting register when resetting microcontroller.Described microcontroller also has an input pin that is connected to described reset circuit and detector circuit.
Decoder circuit also can comprise first input of a connection, is used for receiving the output of detector circuit, also can comprise second input of a connection, is used for the output of receiving register.Decoder circuit also comprises and is used for based on the output of described detector circuit and register and exports the device of test pattern enable signal and program storage enable signal.
In one embodiment, microcontroller can comprise data-carrier store, and register can comprise the memory location (location) in the data-carrier store.Register can or melt silk with independent register to be realized.
Above purpose can also by a kind of in microcontroller the method to memory program realize.This method comprises the following steps: to detect program level voltage; Determine whether to allow to memory program; Detect described voltage and determine storer be allowed to programming after to memory program.This method also can comprise step: enter test pattern when detecting described voltage and determining not allow memory program.The present invention also comprises step: enter test pattern, allow memory program, and in test pattern to memory program.
For whether enter detecting pattern determine realize in inside by microcontroller.Inside determines whether to enter test pattern and can finish with program level voltage.
Microcontroller may operate in the normal user model and in normal user model to memory program.
This method can also comprise: on an input pin of microcontroller, detect program level voltage, and multiplexing with at least one other signal on this pin such as reset signal.
Above-mentioned purpose can also realize by a kind of method that increases function in microcontroller.This method comprises the following steps: to differentiate the first and second required input signals of corresponding first and second predetermined functions of execution.First input signal is used to carry out first function and is used for determining whether to carry out second function in inside.Second input signal is removed as an input of microcontroller.Described method also comprises the following steps: to differentiate first signal as the program level voltage that the storer in the microcontroller is programmed; Discriminating is as the secondary signal of test mode signal; And, use program level voltage to determine whether to enter test pattern.The test pattern detection signal is deleted as input signal.
Inner first signal that uses comprises: detect program level voltage; Determine whether to allow in microcontroller, program storage to be programmed; And, be to enter programming mode when allowing when detecting program level voltage and determining to memory program.Can enter programming mode during the normal user mode of microcontroller and after entering test pattern.
Brief description of the drawings
In conjunction with the drawings referring to following detailed, to of the present invention more fully appreciate and many attendant advantages of the present invention with easier obtaining, these advantages also can become and be more readily understood the while, in the accompanying drawing;
Fig. 1 is the pin figure according to microcontroller of the present invention;
Fig. 2 is the simplified block diagram according to microcontroller of the present invention;
Fig. 3 is a circuit diagram in microcontroller according to the present invention;
Fig. 4 is a data memory diagram in microcontroller according to the present invention; With
Fig. 5 is the sequential chart that the microcontroller operation is described according to the present invention.
The description of preferred embodiment
With reference now to accompanying drawing,, particularly Fig. 1 the figure shows according to microcontroller of the present invention.What Fig. 1 showed is the pin figure that the present invention is applied to microcontroller.An example of the device that this microcontroller can be applied to as the present invention, but can not be interpreted as being used to limit the present invention.In Fig. 1, the pin figure of the microcontroller of label 10 expression DIP encapsulation.This microcontroller can also be to wait other structures to encapsulate such as plastics lead plating chip carrier (plastic leaded chip carrier) or frosting installation encapsulation.Pin represents to accord with RA0-RA5 corresponding to two-way I/O port A.Similar expression symbol is used for representing two-way I/O port B, C, D and E.Information transmission is exported to the pin of two-way I/O port and from the pin of two-way I/O port.Encapsulation 10 also comprises power supply power pin (V
DDAnd V
SS), oscillator input and output (OSC1 and OSC2) and main removing/program voltage input pin MCLP/V
PP
Voltage switch 11 is also shown among Fig. 1.By voltage switch 11,5V or 12V power feed are to pin MCLP/V
PPCan realize voltage switch 11 with well-known circuit.Switching between thread switching control 12 control 5V and the 12V power supply, and the RA4 pin that it is connected to I/O port A also is shown among the figure.Carrying out switching controls with another suitable pin also is fine.Voltage switches in the control operation down of CPU.
The 5V power supply also is fed to V
DDPin and ground (ground) be added to V
SSPin.Oscillator 13 is connected between OSC1 and the OSC2 pin, is used to provide the clock input.Oscillator 13 can be a crystal resonator.
The more more detailed block diagram of some associated components of microcontroller 10 shows at Fig. 2.It only is for simplicity that some parts omit from this figure.The CPU 45 that is shown by dotted line comprises parts 33-36 and the 38-43 that is discussed in more detail below, and is used to control the operation of microcontroller.Fig. 2 also comprises port A20, port B21, port C22, port D23 and port E24, and each port all is connected on the data bus 25.Port A20 in this example is that the FPDP of 6 bit wides also can be by the peripheral function part reusing of microcontroller.Port B21 and port C22 are that the bidirectional port of 8 bit wides also can be by the peripheral function part reusing of microcontroller.Port D23 also is 8 bidirectional ports and also can be used as system bus address/FPDP.Port E24 is that 3 bidirectional ports and its pin also are used as such as functions such as address latch enable output enable or write signal.
The circuit of Fig. 2 also comprises ALU 26 and the peripherals in square frame 27.Square frame 28 comprises a large amount of circuit blocks, resets such as startup (power-up) timer, oscillator starting (start-up) timer, power on (power-on), and WatchDog Timer, step-down (brown-out) resets and test pattern is selected.MCLP, V
DDAnd V
SSPin is connected to square frame 28.These functions of components are believed and can be understood well, thereby omitted description of them here.The input of OSC1 and OSC2 pin is input to the timing generation circuit 31 that is connected to square frame 28 equally by impact damper 32.Timing generation circuit 31 is also connected to 4X PLL circuit 30, and circuit 30 is connected to square frame 28.Accurately band gap (bandgap) benchmark 29 is connected to square frame 28.Use instruction decoding and control circuit 33 to the instruction decoding.
The storer of microcontroller is made up of two elements.First element is a programmable memory 37, and it roughly contains the 2M byte, and another element is address and data latches.Program storage both can be can also be to realize and preserve the software program of being carried out by microcontroller with EEPROM with ROM.The address is input to storer 37 from programmable counter 40 and list index 39 by traffic pilot 38.N level storehouse 41 is connected on the programmable counter 40.Microcontroller also comprises data RAM 44, is used for storing the data that microcontroller uses.The address is fed in the data RAM by address multiplexer 43.The selection of address selects logic 42 to carry out by register.Also show latch and register that other uses among Fig. 2 in system, such as table latch 36, ROM latch 35 and IR register 34.
Be connected to that more detailed circuit is presented among Fig. 3 in the circuit 28 of MCLR pin.MCLR signal and program voltage level apply by pin 50 in Fig. 3.Arrow 51 is shown as and makes programming information enter into program storage, and program voltage is to the connection of suitable circuit.The high-voltage test circuit 52 that is connected to pin 50 detects program voltage level.This function can realize in several ways.For example, testing circuit 52 can seek absolute voltage level (promptly greater than, such as, 12 volts) maybe can find two voltage differences between the voltage.In this case, voltage is compared with supply voltage, if its difference greater than some definite amounts, then input voltage can be used as program voltage and is detected.The typical composition of circuit is the mixing of analog-and digital-element, such as simple comparer and voltage reference, and comprises triode threshold value and/or resitstance voltage divider.
What be connected to high-voltage test circuit 52 outputs is decode logic 54.Decode logic can be realized with basic digital circuit.This circuit produces two outputs: Test Enable (test enable) and Longwrite Enable (long writing enables).These signals are based on and produce from high-voltage test circuit 52 and the long input of writing enable register 55.Excite Test Enable signal can make microcontroller place test pattern, and excite Longwrite Enable signal can allow program storage 37 is programmed.When circuit 52 detects high-voltage level and long when writing enable register and not being excited, decode logic 54 excites Test Enable signal.In case test pattern is enabled, if long write the position (Longwrite bit LWRT) is excited, and then will to keep test enable signal effective for decoder circuit 54, and longly writes enable signal and also become effectively.Device allows in test pattern program storage 37 programmings.In this case, the exciting of LWRT position early than on pin 50, high voltage occurring, Longwrite Enable signal becomes effectively, but test enable is invalid.Therefore, when microcontroller is in the normal user mode, promptly when the instruction in the executive memory, can programme to storer 37.In both cases, if LWRT position or high pressure do not occur, Longwrite Enable will not be excited.
Normal user model is such situation: the instruction that the execution strictness of code is taken out based on the program storage (being storer 37 this example) from the user.For the situation of the microcontroller that internal storage is only arranged, this pattern will be restricted to storer 37.When microcontroller had the external code executive capability, external memory bus also can occur.
If test pattern is initialised, the LWRT position that excites does not allow to programme in test pattern, and it is possible then constructing decode logic 54.Enter programming mode by at first exciting LWRT position and order to detect high voltage with circuit 52.
Length is write enable register 55 and is comprised the LWRT position, and it is wanted the nonvolatile memory in the program storage is programmed with the indication user by the personal code work set in the microcontroller.In case the LWRT position is set, the voltage that rises on the pin 50 will make microcontroller enter the pattern that allows the user that program storage is programmed, and microcontroller runs on normal execution pattern simultaneously.The register that comprises the LWRT position can be realized in several ways.An independent register can be included in the microcontroller and by the user model that CPU carries out to be controlled.The existing code of microcontroller is used to that indication information enters long word register 55 or from long word register 55 sense informations.Register also can be the part of user data memory, is existing sram cell (art SRAM cell) in this example, this unit of user's read and write freely.Register further can be realized with melting silk.
The example of realizing the LWRT register in data RAM 44 is presented among Fig. 4.Data RAM 44 comprises data latches 46, address latch 48 and data field 49.47 parts in the data field 49 be designated as special function register (special function register, SFR).The LWRT register resides in the SFR space 47 as the part in user data RAM district 49.SFR is used to move specific function, such as control I/O port with as any peripheral hardware of the part of microcontroller.Configurations such as WatchDog Timer, step-down reset also can be controlled by SFR.
Writing the LWRT position described now.Program storage 37 comprises a series of special in the instruction of microcontroller instruction set.These instructions are taken out from program storage 37 by CPU45 and are decoded/decipher by order register 34 and instruction decoding demoder 33.The instruction of particular order is included in when enabling the LWRT register, and indication is presented to right value on the data bus 25, and described LWRT register is designated as 56 in Fig. 3.In this example, the LWRT register resides in the storer 44, and register selects logic 42 to enable the LWRT register in SFR space 47, and, select logic 42 based on register, the address that is used for enabling comprising the SFR of LWRT register will appear at storer 44.In case the LWRT register is enabled, be passed to the register from the value of data bus 25.
The sequential chart that the device operation is described illustrates in Fig. 5.Behind the chip power, the MCLR signal rises to power supply supply voltage (being 5V this example) from 0V, allows microcontroller to enter normal execution pattern.Originally, when the MCLR signal was 0V, microcontroller was resetted by reseting logic 53, as described above.The activation length sometime that is in operation is write enable register.This represents by the LWRT signal is risen to high logic level.This signal represents that also this value is written to the situation of register or data-carrier store, and is considered to the program enable of program storage 37.
In this moment, length is write enable register 55 instruction decoding logics 54 LWRT positions and is excited.Some time afterwards is engraved in the microcontroller program when carrying out, and switching line is excited for the MCLR pin provides program level voltage.As above discuss, the exciting of switching line can occur in before the LWRT position is set, or during test pattern.Just as shown in Figure 5, the MCLR signal rises to 12V afterwards.This will cause high-voltage test circuit 52 instruction decoding logics 54 program level voltage to occur.Therefore Longwrite Enable signal is excited, and is set in this example to be high level.The programming of program storage 37 is possible now.
Although do not show in Fig. 5, followed by exciting of Longwrite Enable signal, the MCLR signal turns back to the 0V LWRT position that resets.So LWRT and length are write enable voltage and all will be turned back to 0V.
In the present invention, requiring a signal is that program voltage is carried out a function in advance, is the programming of program storage in this example.This signal can also be used to indicate microcontroller to enter one of two kinds of test enable patterns.This instruction is carried out with independent test mode select signal in the past.Length is write enable mode and is detected by circuit, and this circuit is connected to the pin that signal applies, and enters special pattern with the indication chip, perhaps carries out independent function.Therefore, the present invention carries out the number that all predetermined functions reduce essential pin for allowing microcontroller.
Develop the occasion of pin compatibility device family people, the minimizing of number of pins has special advantage.In case the user has designed the scope (footprint) of microcontroller, discharge the additional pin that (freeing up) allows additional function, when following when keeping the compatible added restriction of pin scope, provide the ability of more powerful microcontroller by the user.Upward-compatible is an important advantage, because when adding the up-to-date version of chip family, or when he wants or during the function of wishing to add, the user needn't bear costliness and time-consuming redesign activity.
Further, be preferred by using the characteristic upgrading of revising software/firmware rather than hardware.The present invention allows the user to revise software/firmware in user model, at this moment must not stop normal mode and enter independent programming mode.By discharging pin, the ability of upgrading ability or modification software has improved, and the function of microcontroller improves or increased, and becomes more flexible.
Obviously, a large amount of modifications and variations of the present invention are possible under the guidance of above explanation.For example, although use main removing/program voltage input pin to describe the present invention as an example, the present invention is not limited to this.The present invention can be applied to following occasion, the various signals that promptly are added to microcontroller or other device can be multiplexed to a pin, and utilize internal circuit to detect,, eliminated the needs that distribute independent pin simultaneously with the suitable pattern/function that allows to carry out.The present invention also is not limited to any type or special microcontroller, but there is special advantage in the device family of pin compatibility.Therefore we can understand like this, and the present invention can implement in the scope of additional claims, rather than the present invention is defined as the special content of describing herein.
Claims (20)
1. circuit that is used in the microcontroller with program storage comprises:
Program storage is write enable register;
Voltage detector circuit; With
Be connected to the decoder circuit of described register and described detector circuit.
2. circuit as claimed in claim 1 comprises:
Be connected to the reset circuit of described register and described detector circuit.
3. circuit as claimed in claim 2, wherein,
The signal of the described register that resets of described reset circuit output.
4. circuit as claimed in claim 3, wherein
Described reset circuit comprises the device of the described register that only just resets when resetting described microcontroller.
5. circuit as claimed in claim 2 comprises:
An input pin of described microcontroller, this pin is connected to described reset circuit and described detector circuit.
6. circuit as claimed in claim 1, wherein said decoder circuit comprises:
First input that connects is used to receive the output of described detector circuit;
Second input that connects is used to receive the output of described register;
Be used for based on described each output of described detector circuit and described register and export the device of test pattern enable signal and program storage enable signal.
7. circuit as claimed in claim 1, wherein,
Described microcontroller comprises data-carrier store; With
Described register is included in the memory location in the described data-carrier store.
8. method that the storer of microcontroller is programmed comprises:
Detect program level voltage;
Whether the programming of determining described storer is allowed to; With
After detecting described voltage and determining that described storer has been allowed to programming, described storer is programmed.
9. method as claimed in claim 8 comprises:
When described voltage is detected and described storer when not being allowed to programme, enter test pattern.
10. method as claimed in claim 9 comprises:
Enter described test pattern;
Allow described memory program; With
In described test pattern to described memory program.
11. method as claimed in claim 8 comprises:
Inside determines whether to enter test pattern.
12. method as claimed in claim 11 comprises:
Inside determines whether to use described program level voltage to enter described test pattern.
13. method as claimed in claim 8 comprises:
The described microcontroller of operation in normal user model; With
During described normal user model, described storer is programmed.
14. method as claimed in claim 8 comprises:
On the input pin of described microcontroller, detect the program level voltage signal; With
Multiplexing at least one other signal on described pin.
15. method as claimed in claim 14 comprises:
A multiplexing reset signal on described pin.
16. a method that increases the function in the microcontroller comprises:
Differentiate and carry out the first and second required input signals of corresponding first and second predetermined functions;
Use described first signal to carry out described first function;
Inner first signal that uses detects whether carry out described second function; With
Deletion is as described second input signal of the input of described microcontroller.
17. method as claimed in claim 16 comprises:
Differentiate described first signal, this signal is with acting on the program level voltage that the storer in the described microcontroller is programmed;
Discriminating is as the described secondary signal of test mode select signal;
Whether detect uses described program level voltage to enter described test pattern; With
Deletion is as the described test mode select signal of input.
18. method as claimed in claim 16, described first signal of wherein inner use comprises:
Detect described program level voltage;
Determine whether to allow in described microcontroller, program storage to be programmed;
When detecting described program level voltage and determining not allow, enter test pattern to described memory program; With
When detecting described program level voltage and determine to allow, enter programming mode to described memory program.
19. method as claimed in claim 18 comprises:
Enter described programming mode, simultaneously the described microcontroller of operation in normal user model.
20. method as claimed in claim 18 comprises:
After entering described test pattern, enter described programming mode.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US26470799A | 1999-03-09 | 1999-03-09 | |
| US09/264,707 | 1999-03-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1300432A true CN1300432A (en) | 2001-06-20 |
Family
ID=23007269
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN00800556A Pending CN1300432A (en) | 1999-03-09 | 2000-03-09 | Microcontroller having write enable bit |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1086466A1 (en) |
| JP (1) | JP2002539542A (en) |
| KR (1) | KR20010071231A (en) |
| CN (1) | CN1300432A (en) |
| TW (1) | TW490670B (en) |
| WO (1) | WO2000054282A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113900709A (en) * | 2021-10-29 | 2022-01-07 | 努比亚技术有限公司 | Circuit and method for activating MCU (microprogrammed control Unit) downloading mode |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003032089A (en) * | 2001-07-18 | 2003-01-31 | Matsushita Electric Ind Co Ltd | Microcomputer with built-in reset function |
| TWI397855B (en) * | 2008-05-07 | 2013-06-01 | Sunplus Mmedia Inc | Method for reducing pin counts and microprocessor using the same |
| TWI503818B (en) | 2013-01-21 | 2015-10-11 | Richtek Technology Corp | Motor contorller having multi-functional pin and control method thereof |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0729386A (en) * | 1993-07-13 | 1995-01-31 | Hitachi Ltd | Flash member and microcomputer |
| US5615159A (en) * | 1995-11-28 | 1997-03-25 | Micron Quantum Devices, Inc. | Memory system with non-volatile data storage unit and method of initializing same |
| US5991849A (en) * | 1996-04-10 | 1999-11-23 | Sanyo Electric Co., Ltd | Rewriting protection of a size varying first region of a reprogrammable non-volatile memory |
| JPH09282302A (en) * | 1996-04-10 | 1997-10-31 | Sanyo Electric Co Ltd | Microcomputer |
| FR2766594B1 (en) * | 1997-07-24 | 2000-01-28 | Sgs Thomson Microelectronics | EXTERNAL CONTROL RESET FOR A NON-VOLATILE MEMORY IN AN INTEGRATED CIRCUIT |
-
2000
- 2000-03-09 CN CN00800556A patent/CN1300432A/en active Pending
- 2000-03-09 WO PCT/US2000/006165 patent/WO2000054282A1/en not_active Application Discontinuation
- 2000-03-09 JP JP2000604421A patent/JP2002539542A/en not_active Withdrawn
- 2000-03-09 EP EP00917817A patent/EP1086466A1/en not_active Withdrawn
- 2000-03-09 KR KR1020007012551A patent/KR20010071231A/en not_active Application Discontinuation
- 2000-05-05 TW TW089104215A patent/TW490670B/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113900709A (en) * | 2021-10-29 | 2022-01-07 | 努比亚技术有限公司 | Circuit and method for activating MCU (microprogrammed control Unit) downloading mode |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010071231A (en) | 2001-07-28 |
| EP1086466A1 (en) | 2001-03-28 |
| TW490670B (en) | 2002-06-11 |
| WO2000054282A1 (en) | 2000-09-14 |
| JP2002539542A (en) | 2002-11-19 |
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