CN1299347C - Process for making shallow trench isolation arrangement - Google Patents
Process for making shallow trench isolation arrangement Download PDFInfo
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- CN1299347C CN1299347C CNB021555370A CN02155537A CN1299347C CN 1299347 C CN1299347 C CN 1299347C CN B021555370 A CNB021555370 A CN B021555370A CN 02155537 A CN02155537 A CN 02155537A CN 1299347 C CN1299347 C CN 1299347C
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- layer
- cover curtain
- shallow trench
- raceway groove
- isolation structure
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Abstract
The present invention relates to a method for manufacturing shallow trench isolation structures. In the method, a cushion oxidizing layer and a covering curtain layer are orderly formed on a substrate; the cushion oxidizing layer, the covering curtain layer and part of the substrate are orderly defined to form a trench; a conformal buffer layer is formed on the internal surface of the trench and the surface of the covering curtain layer; the buffer layer is converted into an oxide layer; an insulating layer is formed in the shallow trench and on the substrate to fill up the trench; the insulating layer and the oxide layer outside the trench are removed until the surface of the covering curtain layer is exposed; finally, the covering curtain layer and the cushion oxidizing layer are removed to form a shallow trench isolation structure.
Description
Technical field
The invention relates to a kind of manufacture method of integrated circuit component, and particularly relevant for a kind of isolation structure of shallow trench (shallow trench isolation, manufacture method STI).
Background technology
In semiconductor element closeness today closely day by day; it is very important that isolation between the element becomes; for preventing that adjacent element is short-circuited; usually can be betwixt a separator in addition; wherein making the most traditional general technology of separator is regional selective oxidation method (LOCOS), and can obtain the high and effective component isolation structure of reliability with lower cost.Yet regional selective oxidation method still has multinomial shortcoming, comprises the relevant issues that known stress produces, with the formation of beak district around the isolation structure of LOCOS field (bird ' s beak) etc.The particularly formation in beak district, lifting to the element integrated level counteracts, and in view of this, the element separation method that has other continues to be developed, and one of most widely used method now promptly is to utilize the method that forms isolation structure of shallow trench to make the isolation structure of element.
Figure 1A to Fig. 1 C describes known a kind of isolation structure of shallow trench manufacture craft, please refer to Figure 1A, provide a substrate 100 that is formed with pad oxide (pad oxide layer) 102 and silicon nitride layer 104 in regular turn, and definition etches both silicon nitride layer 104, pad oxide 102 and substrate 100 are to form raceway groove 106.
Then, please refer to Figure 1B, use thermal oxidation method on the inner surface of raceway groove 106, to carry out oxidation, obtain a lining oxide layer (liner oxide layer) 108, then deposit layer of oxide layer 110 again to fill up raceway groove 106 and to be covered on the silicon nitride layer 104.
Then, please refer to Fig. 1 C, to oxide layer 108 carry out cmp (chemicalmechanical polishing, CMP), with oxide layer 110 surface rubbings to exposing silicon nitride layer 104 to become an oxidation padding 110a.Then, use hot phosphoric acid (hot phosphoric acid) to remove silicon nitride layer 104, use hydrofluoric acid (HF) to remove pad oxide 102 then.
Yet, in known isolation structure of shallow trench manufacture craft, because lining oxide layer 108 forms by the silicon in the thermal oxidation raceway groove 106, that is to say that representative must consume the silicon of raceway groove 106 inner surfaces to form lining oxide layer 108, so will make the profile and the size of isolation structure of shallow trench become big, make actual available active area dwindle and increase variable on design, the layout, thereby be unfavorable for the downsizing of element.
And, owing in the process of removing silicon nitride layer 104, pad oxide 102, can corner erosion and the formation of oxidation padding 110a be coated sphering (wrap rounding) phenomenon and then cause depression 112.These depression 112 meeting stored charges, the inferior limit leakage current (sub-threshold leakage current) that faces that in integrated circuit, causes element that continues, this is so-called neck knot effect (kink effect), and then makes the reliability of element and yield reduce.
Summary of the invention
Therefore, purpose of the present invention is providing a kind of manufacture method of isolation structure of shallow trench, can avoid the profile of isolation structure of shallow trench and size to become big, to increase the utilized area of active area.
Another object of the present invention can be avoided coating the generation of sphering phenomenon, and then avoid the element leakage current in the manufacture method that proposes a kind of isolation structure of shallow trench.
The present invention proposes a kind of manufacture method of isolation structure of shallow trench, the method forms pad oxide and cover curtain layer in regular turn in substrate, define pad oxide more in regular turn, cover curtain layer and part substrate are to form raceway groove, then, form conformal resilient coating at raceway groove inner surface and cover curtain layer surface, with thermal oxidation method resilient coating is oxidized to oxide skin(coating) again, then, in shallow channel with in the substrate, form insulating barrier to fill up raceway groove, remove insulating barrier and oxide skin(coating) outside the raceway groove again, until exposing the cover curtain layer surface, remove cover curtain layer and pad oxide at last again to form isolation structure of shallow trench.
From the above, because the resilient coating oxidation that the present invention will form in addition is to form lining oxide layer (oxide skin(coating)), therefore the formation of lining oxide layer only can consume the few silicon of raceway groove inner surface, thereby make that the profile of isolation structure of shallow trench and the unlikely change of size are too many greatly, and then can access more known bigger active area.
And, because this oxide skin(coating) also is created on the sidewall of pad oxide and cover curtain layer, even, because this oxide skin(coating) formed with thermal oxidation method, so the comparatively densification and have preferable anti-etching (anti-etching) ability of the structure of oxide skin(coating).Therefore, even through removing the etching process of cover curtain layer and pad oxide, also can keep the integrality of preferable insulation padding.
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended graphicly, elaborate.
Description of drawings
Figure 1A to Fig. 1 C illustrate is the generalized section of the manufacturing process of known a kind of isolation structure of shallow trench;
Fig. 2 A to Fig. 2 G illustrate is according to the generalized section of the manufacturing process of a kind of isolation structure of shallow trench of a preferred embodiment of the present invention.
Indicate explanation:
100,200: substrate 102,202: pad oxide
104: silicon nitride layer 106,206: raceway groove
108: lining oxide layer 110: oxide layer
110a: oxidation filler 112: depression
204: cover curtain layer 208: resilient coating
208a: oxide skin(coating) 210: insulating barrier
210a: insulation padding
Embodiment
Fig. 2 A to Fig. 2 G illustrates the generalized section according to the manufacturing process of a kind of isolation structure of shallow trench of a preferred embodiment of the present invention.
At first, please refer to Fig. 2 A, semiconductor substrate 200 is provided, then on the semiconductor-based end 200, form pad oxide 202 and cover curtain layer 204 in regular turn.The method that wherein forms pad oxide 202 for example is to utilize thermal oxidation method.And the material of cover curtain layer 204 for example is a silicon nitride, and the method that forms cover curtain layer 204 for example is to use chemical vapour deposition technique, and (chemical vapor deposition CVD) forms a silicon nitride layer on pad oxide 202.
Then, please refer to Fig. 2 B, remove cover curtain layer 204, pad oxide 202 and substrate 200 partly to form raceway groove 206.The method that wherein forms raceway groove 206 for example is to form patterned light blockage layer (not icon) on cover curtain layer 204.Be the cover curtain again with the photoresist layer, remove cover curtain layer 204, pad oxide 202 and part substrate 200 to form raceway groove 206 with anisotropic etch process.
Then, please refer to Fig. 2 C, form a conformal resilient coating 208 in raceway groove 206 inner surfaces and cover curtain layer 204 surfaces, wherein the material of resilient coating 208 for example is to adopt oxidable material, be preferably the use polysilicon, the method that forms this resilient coating 208 for example is to use chemical vapour deposition technique, and deposition one deck polysilicon layer goes up in silicon base 200 surfaces that raceway groove 206 exposes, on the sidewall surfaces of pad oxide 202 and on the sidewall and surface of cover curtain layer 204.
Then, please refer to Fig. 2 D, this resilient coating 208 is transformed into oxide skin(coating) 208a, wherein make resilient coating 208 be transformed into the method for oxide skin(coating) 208a, for example be to use thermal oxidation method oxidation buffer layer 208 to form oxide skin(coating) 208a.This moment, oxide skin(coating) 208a was promptly in order to the lining oxide layer as this isolation structure of shallow trench.
In the step of above-mentioned Fig. 2 C, Fig. 2 D, owing to the oxide skin(coating) 208a as lining oxide layer is mainly got by resilient coating 208 oxidations that are formed at raceway groove 206 inner surfaces and cover curtain layer 204 surfaces, that is be that the formation of lining oxide layer only can consume silicon base few in the raceway groove 206 200 surfaces, therefore the profile of isolation structure of shallow trench and size thereby unlikely change are too many greatly, and then can access more known bigger active area.
Then, please refer to Fig. 2 E, in substrate 200, form a layer insulating 210 to fill up raceway groove 206 and to cover whole substrate 200, wherein the material of insulating barrier 210 for example is a silica, the method that forms this insulating barrier for example is to use the high density plasma CVD method, and (high densityplasma chemical vapor deposition is HDPCVD) to form one silica layer in substrate.
Then, please refer to Fig. 2 F, remove insulating barrier 210 and oxide skin(coating) 208a outside the raceway groove 206 till the surface of exposing cover curtain layer 204, to form a smooth insulation padding 210a.The method of wherein removing partial insulating layer 210 and oxide skin(coating) 208a for example is serve as the grinding stop layer with cover curtain layer 204, with the insulating barrier 210 and oxide skin(coating) 208a outside the chemical mechanical milling method removal raceway groove 206, also or with cover curtain layer 204 is etch stop layer, eat-backs (etchback) with anisotropic etch process and removes insulating barrier 210 and oxide skin(coating) 208a outside the raceway groove 206.
Then, please refer to Fig. 2 G, remove cover curtain layer 204 and pad oxide 202 in regular turn, to form isolation structure of shallow trench.Wherein, the method for removal cover curtain layer 204 for example is to use the wet etching of hot phosphoric acid etch.The method of removing pad oxide 202 for example is the wet etching with hydrofluoric acid (HF) etch.
Because the oxide skin(coating) 208a (lining oxide layer) that generated in the step of Fig. 2 D not only generates on the silicon base surface that shallow channel 206 exposed, also be created on the sidewall of pad oxide 202 and cover curtain layer 204, even, because this oxide skin(coating) 208a formed with thermal oxidation method, the comparatively densification and have preferable anti-etching (anti-etching) ability of the structure of oxide skin(coating) 208a.Therefore, even via the etching process of removing cover curtain layer 204 and pad oxide 202, the integrality of the padding 210a that also can keep preferably insulating and can not cause depressed phenomenon seriously.
In sum, the present invention has following advantage at least:
1, because the present invention forms one deck resilient coating on the inner surface and the cover curtain layer surface of raceway groove, this resilient coating of thermal oxidation is with as lining oxide layer again, therefore the formation of lining oxide layer also only can consume silicon face few in the raceway groove, thereby make that the profile of formed isolation structure of shallow trench and the unlikely change of size are too many greatly, and then can access more known bigger active area.
2, because on the aforementioned silicon base surface that not only generates shallow channel and exposed by the formed oxide skin(coating) of resilient coating thermal oxidation (lining oxide layer), also be created on the sidewall of pad oxide and cover curtain layer, even, owing to can comparatively fine and closely having preferable anti-etching ability with its structure of the formed lining oxide layer of thermal oxidation method.Therefore, even through removing the etching process of cover curtain layer and pad oxide, the integrality of the padding that also can keep preferably insulating and can not cause depressed phenomenon seriously.
Though the present invention with a preferred embodiment openly as above; right its is not in order to limiting the present invention, anyly is familiar with this skill person, without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (18)
1, a kind of manufacture method of isolation structure of shallow trench is characterized in that: comprise the following steps:
One substrate is provided;
In this substrate, form a pad oxide and a cover curtain layer in regular turn;
Define this pad oxide, this cover curtain layer and this substrate of part in regular turn to form a raceway groove;
Inner surface and this cover curtain layer surface at this raceway groove form a conformal resilient coating;
Change this resilient coating into the monoxide layer;
In this raceway groove with in this substrate, form an insulating barrier to fill up this raceway groove;
Remove this insulating barrier and this oxide skin(coating) outside this raceway groove, until exposing this cover curtain layer surface; And
Remove this cover curtain layer and this pad oxide.
2, the manufacture method of isolation structure of shallow trench as claimed in claim 1 is characterized in that: the material of this resilient coating comprises polysilicon.
3, the manufacture method of isolation structure of shallow trench as claimed in claim 1 is characterized in that: the method that this resilient coating is changed into this oxide skin(coating) comprises thermal oxidation method.
4, the manufacture method of isolation structure of shallow trench as claimed in claim 1 is characterized in that: the method that this pad oxide forms comprises thermal oxidation method.
5, the manufacture method of isolation structure of shallow trench as claimed in claim 1 is characterized in that: the method that forms this cover curtain layer comprises with chemical vapour deposition technique and forms a silicon nitride layer.
6, the manufacture method of isolation structure of shallow trench as claimed in claim 1 is characterized in that: this substrate that defines this pad oxide, this cover curtain layer and part comprises anisotropic etch process with the method that forms this raceway groove.
7, the manufacture method of isolation structure of shallow trench as claimed in claim 1 is characterized in that: the method that forms this insulating barrier comprises with high density chemistry vapour deposition process formation one silica layer.
8, the manufacture method of isolation structure of shallow trench as claimed in claim 1, it is characterized in that: remove this insulating barrier and this oxide skin(coating) outside this raceway groove, until the step that exposes this cover curtain layer surface, comprise with this cover curtain layer serving as to grind stop layer to implement a cmp step.
9, the manufacture method of isolation structure of shallow trench as claimed in claim 1, it is characterized in that: remove this insulating barrier and this oxide skin(coating) outside this raceway groove, until the step that exposes this cover curtain layer surface, comprise with this cover curtain layer being that etch stop layer is implemented an etchback step.
10, a kind of manufacture method of isolation structure of shallow trench is characterized in that: comprise the following steps:
One substrate is provided;
In this substrate, form a pad oxide and a cover curtain layer in regular turn;
Define this pad oxide, this cover curtain layer and this substrate of part to form a raceway groove;
Go up on the silicon base surface that this raceway groove exposes, on the sidewall surfaces of this pad oxide and the sidewall of this cover curtain layer and surface and to form a resilient coating;
Carry out a thermal-oxidative production process, so that this resilient coating is oxidized into the monoxide layer;
In this raceway groove, form an insulation padding to fill up this raceway groove;
Remove this cover curtain layer and this pad oxide.
11, the manufacture method of isolation structure of shallow trench as claimed in claim 10 is characterized in that: the material of this resilient coating comprises polysilicon.
12, the manufacture method of isolation structure of shallow trench as claimed in claim 10 is characterized in that: the method that this pad oxide forms comprises thermal oxidation method.
13, the manufacture method of isolation structure of shallow trench as claimed in claim 10 is characterized in that: the method that forms this cover curtain layer comprises with chemical vapour deposition technique and forms a silicon nitride layer.
14, the manufacture method of isolation structure of shallow trench as claimed in claim 10 is characterized in that: this substrate that defines this pad oxide, this cover curtain layer and part comprises anisotropic etch process with the method that forms this raceway groove.
15, the manufacture method of isolation structure of shallow trench as claimed in claim 10 is characterized in that: form an insulation filler in this raceway groove and also comprise the following steps: with the step of filling up this raceway groove
Deposit an insulating barrier to fill up this raceway groove and to be covered in this substrate;
Remove this insulating barrier and this oxide skin(coating) outside this raceway groove, till exposing this cover curtain layer.
16, the manufacture method of isolation structure of shallow trench as claimed in claim 15 is characterized in that: the method that forms this insulating barrier comprises with high density chemistry vapour deposition process formation one silica layer.
17, the manufacture method of isolation structure of shallow trench as claimed in claim 15, it is characterized in that: remove this insulating barrier and this oxide skin(coating) outside this raceway groove, until the step that exposes this cover curtain layer surface, comprise with this cover curtain layer serving as to grind stop layer to implement a cmp step.
18, the manufacture method of isolation structure of shallow trench as claimed in claim 15, it is characterized in that: remove this insulating barrier and this oxide skin(coating) outside this raceway groove, until the step that exposes this cover curtain layer surface, comprise with this cover curtain layer being that etch stop layer is implemented an etchback step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021555370A CN1299347C (en) | 2002-12-05 | 2002-12-05 | Process for making shallow trench isolation arrangement |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021555370A CN1299347C (en) | 2002-12-05 | 2002-12-05 | Process for making shallow trench isolation arrangement |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1505131A CN1505131A (en) | 2004-06-16 |
| CN1299347C true CN1299347C (en) | 2007-02-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB021555370A Expired - Lifetime CN1299347C (en) | 2002-12-05 | 2002-12-05 | Process for making shallow trench isolation arrangement |
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| Country | Link |
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| CN (1) | CN1299347C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120276707A1 (en) * | 2011-04-28 | 2012-11-01 | Nanya Technology Corporation | Method for forming trench isolation |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1232290A (en) * | 1998-04-15 | 1999-10-20 | 世大积体电路股份有限公司 | Shallow slot isolating method for avoiding dishing |
| US6180490B1 (en) * | 1999-05-25 | 2001-01-30 | Chartered Semiconductor Manufacturing Ltd. | Method of filling shallow trenches |
| JP2001210709A (en) * | 2000-01-27 | 2001-08-03 | Nec Corp | Manufacturing method of semiconductor device |
| US6291300B1 (en) * | 1999-09-14 | 2001-09-18 | Kabushiki Kaisha Toshiba | Manufacturing method of semiconductor devices |
| US6335259B1 (en) * | 2001-02-22 | 2002-01-01 | Macronix International Co., Ltd. | Method of forming shallow trench isolation |
-
2002
- 2002-12-05 CN CNB021555370A patent/CN1299347C/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1232290A (en) * | 1998-04-15 | 1999-10-20 | 世大积体电路股份有限公司 | Shallow slot isolating method for avoiding dishing |
| US6180490B1 (en) * | 1999-05-25 | 2001-01-30 | Chartered Semiconductor Manufacturing Ltd. | Method of filling shallow trenches |
| US6291300B1 (en) * | 1999-09-14 | 2001-09-18 | Kabushiki Kaisha Toshiba | Manufacturing method of semiconductor devices |
| JP2001210709A (en) * | 2000-01-27 | 2001-08-03 | Nec Corp | Manufacturing method of semiconductor device |
| US6335259B1 (en) * | 2001-02-22 | 2002-01-01 | Macronix International Co., Ltd. | Method of forming shallow trench isolation |
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| Publication number | Publication date |
|---|---|
| CN1505131A (en) | 2004-06-16 |
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Granted publication date: 20070207 |