CN1287382A - 半导体装置及其安装结构 - Google Patents

半导体装置及其安装结构 Download PDF

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CN1287382A
CN1287382A CN00118760A CN00118760A CN1287382A CN 1287382 A CN1287382 A CN 1287382A CN 00118760 A CN00118760 A CN 00118760A CN 00118760 A CN00118760 A CN 00118760A CN 1287382 A CN1287382 A CN 1287382A
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今村幸永
冈田圭介
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Mitsubishi Electric Engineering Co Ltd
Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

在本发明的半导体装置的安装结构中,在以引线引脚(9)从1个侧端面突出的方式设置的封装基板(13)的表面、背面这两侧的主表面上分别设置半导体芯片(12),使封装基板(13)的安装了引线引脚(9)的面朝向安装基板(3),垂直于安装基板(3)而被安装。按照该结构,可提供能高效率地安装半导体芯片的半导体装置。

Description

半导体装置及其安装结构
本发明涉及具备用于安装多个半导体芯片的封装基板和安装基板的半导体装置及其安装结构。
迄今为止，采用了在安装基板上设置封装基板来使用的半导体装置，在该封装基板上设置了半导体芯片。在现有的半导体装置中，如图14～图17中示出的QFP-LSI(四方扁平封装-大规模集成电路)101、102那样，通过管心底座107在封装基板108的一个主表面上设置了1个半导体芯片105。此外，连接到半导体芯片105内部的电极上的导线106与设置在封装基板108的侧端面上的引线引脚109连接。此外，引线引脚109和半导体芯片105被模塑材料104覆盖，被固定在封装基板108上。如图17中所示，该QFP-LSI 101、102的没有设置半导体芯片105的一侧的面朝向安装基板103而被安装。
每个上述QFP-LSI 101、102，如图17中所示，必须在安装基板103的上表面上占有a×b的面积。由此，为了在安装基板103上设置n个QFP-LSI，需要n×a×b的安装基板面积，为了将电信号送到QFP-LSI上，需要用于设置与QFP-LSI的引线引脚连接的布线的布线区域面积。
这样，在现有的QFP-LSI中，占有安装基板的面积随半导体芯片的个数的增加而增加。此外，随着被设置的QFP-LSI的增加，引线引脚的数目也增加，产生了在安装基板上的布线的混杂的问题。再者，在与半导体元件的高速化的同时被高集成化的半导体装置中，必须处理从半导体芯片排出的热，但在如上述那样的QFP-LSI的结构中，为了进一步的散热，必须附加散热片或风扇。
本发明的目的在于，为了解决上述问题而提供一种通过垂直于安装基板来安装封装基板，能高效率地安装半导体芯片的半导体装置及其安装结构。
为了达到上述目的的本发明的半导体装置具备：封装基板，具有互相成为表面、背面的第1和第2主表面及侧端面；半导体芯片，分别被设置在第1和第2主表面上；以及导电性地连接用的引线引脚，被设置在侧端面上，在与第1和第2主表面大致平行的一个方向上延伸。
按照该结构，通过使设置了封装基板的引线引脚的面朝向安装基板来安装，可垂直于安装基板来安装封装基板。由此，通过分别在封装基板的两面上安装半导体芯片，可在垂直于安装基板的方向上设置多个半导体装置。因此，在安装n个半导体芯片的情况下，封装基板在安装基板上占有的面积比如现有技术那样只在封装基板的一个主表面上设置半导体芯片、使没有设置半导体芯片的面朝向安装基板而被安装半导体装置的占有面积小。其结果，由于能在相同的安装基板面积上设置数目更多的半导体芯片，故可在平面上高集成化地安装半导体装置。
此外，通过在封装基板的第1和第2主表面的至少一方上设置多个半导体芯片，通过在垂直于安装基板的方向上使半导体芯片的安装个数增加，可在相同的安装基板面积上设置数目更多的半导体芯片。其结果，可在平面上更加高集成化地安装半导体装置。
此外，通过将传送共用信号的被设置在封装基板上的2个以上的半导体芯片的引线引脚归纳为1个，可削减整体的引线引脚的数目。
此外，在本发明的半导体装置中，通过直接在构成封装基板的主表面的表面和背面这两者上设置半导体芯片，没有必要作成在把只在主表面的一方上设有半导体芯片的封装基板设置到插座等中之后，设置到安装基板上的迄今被使用的安装结构。因此，可谋求降低部件数目，同时，可简化制造工序。
在本发明的半导体装置的优选实施例中，设置了半导体芯片的接地用平板，使其从侧端面中的设置了引线引脚的区域以外的规定的区域突出。
通过作成这样的结构，可利用接地用平板对在半导体芯片内产生的热进行散热。此外，由于通过使接地用平板实现大型化而扩大了接地面积，故可降低阻抗。其结果可减少在半导体装置的内部和外部产生的噪声的影响。
较为理想的是，在将封装基板安装到安装基板上的状态下，在与该安装基板相对的面与安装基板之间留下能***其它半导体装置的间隙的形态下，接地用平板从封装基板的侧端面突出。
通过作成这样的结构，由于能在上述间隙中在安装基板上与没有设置半导体芯片的面相接来设置迄今所使用那样的只在单面上设置了半导体芯片的其它封装基板，故可在相同的安装基板面积上设置数目更多的半导体芯片。其结果，可更加高集成化地安装半导体装置。
在本发明的半导体装置的其它优选实施例中，在侧端面中的设置了引线引脚的区域以外的区域中设置了半导体芯片的接地用引脚。
通过作成这样的结构，可作成垂直于安装基板的主表面安装多个半导体装置并利用接地用平板导电性地连接了多个半导体装置的接地用引脚相互间的安装结构。由此，可将接地用平板作为散热基板来使用，同时，利用因接地面积扩大可降低阻抗这一点，可减少在半导体装置的内部和外部产生的噪声的影响。
图1是示出在本发明的实施例1中的半导体装置中，在封装基板的第1主表面和第2主表面这两者上设置了半导体芯片的状态的剖面图。
图2是示出在本发明的实施例1中的半导体装置中，设置了半导体芯片的第1主表面的图。
图3是示出在本发明的实施例1中的半导体装置中，设置了半导体芯片的第2主表面的图。
图4是示出在本发明的实施例1中的半导体装置中，垂直于安装基板安装了封装基板的状态的斜视图。
图5是示出在本发明的实施例1中的半导体装置中，在封装基板的第1主表面和第2主表面这两者上设置了半导体芯片的状态下竖直地立起的状态的正视图。
图6是示出在本发明的实施例1中的半导体装置中，在封装基板的第1主表面上设置了多个半导体芯片的状态的图。
图7是示出在本发明的实施例1中的半导体装置中，在封装基板的第1主表面和第2主表面上设置了多个半导体芯片的状态的正视图。
图8是示出在本发明的实施例1中的半导体装置中，在封装基板的第2主表面上设置了多个半导体芯片的状态的图。
图9是示出在本发明的实施例2中的半导体装置中，在封装基板的侧端面上设置了接地用平板的状态的剖面图。
图10是示出在本发明的实施例2中的半导体装置中，在封装基板的侧端面上设置了接地用平板的状态的第1主表面的图。
图11是示出在本发明的实施例2中的半导体装置中，在封装基板的侧端面上设置了接地用平板的状态下竖直地立起封装基板的状态的正视图。
图12是示出在本发明的实施例2中的半导体装置中，在封装基板的侧端面上设置了接地用平板的状态的第2主表面的图。
图13是示出在本发明的实施例3中的半导体装置中，利用接地用平板导电性地连接垂直于安装基板安装的2个封装基板的接地用的引脚相互间的状态的图。
图14是示出在现有的半导体装置中，只在封装基板的一个主表面上设置了半导体芯片的状态的剖面的图。
图15是示出在只在封装基板的一个主表面上设置了半导体芯片的现有的半导体装置中，设置了半导体芯片的面的图。
图16是示出在只在封装基板的一个主表面上设置了半导体芯片的现有的半导体装置中，没有设置半导体芯片的面的图。
图17是示出在现有的半导体装置中，平行于安装基板设置了多个半导体芯片的状态的图。
以下，根据附图说明本发明的实施例。
(实施例1)
首先，使用图1～图8，说明本发明的实施例1中的半导体装置。在本实施例的半导体装置中，如图1～图3中所示，在只在一个侧端面上配置了引线引脚9的封装基板13的表面、背面这两侧的主表面上通过管心底座7设置了半导体芯片11、12。分别利用导线6把半导体芯片11、12与被设置在封装基板13上的封装基板焊区15连接起来。该封装基板焊区15与通过封装基板13内部的内部布线14连接。
此外，内部布线14与从封装基板13的一个侧端面向外部突出的引线引脚9连接。此外，上述半导体芯片11、12、管心底座7、导线6被覆盖封装基板13的表面的模塑材料4覆盖。
再者，如图4和图5中所示，图1～图3中示出的封装基板13使的具有引线引脚9的侧端面朝向并垂直于安装基板3的主面而被安装，封装基板13的在安装基板3上的从平面上看的占有面积为c×d。
在图6～图8中示出了在封装基板13的表面、背面这两侧的主表面上分别设置了各3个半导体芯片16、17、18和半导体芯片19、20、21的形态。在本实施例中，在封装基板13的主表面的表面、背面这两侧分别设置了各3个半导体芯片，但也可以是在封装基板13的表面、背面这两侧的主表面的至少一方上设置了多个半导体芯片的形态。
通过作成这样的结构，通过使封装基板13的设置了引线引脚9的面朝向安装基板3进行安装，可垂直于安装基板3来安装封装基板13。通过在封装基板13的主表面的表面、背面这两面上分别安装半导体芯片11、12，可在垂直于安装基板的方向上设置数目多的半导体装置。因此，在安装n个半导体芯片的情况下，封装基板13在安装基板上占有的面积n×c×d比现有技术中示出的只在一个面上设置半导体芯片的封装基板在安装基板上的占有面积n×a×b小。其结果，由于能在相同的安装基板面积上设置数目多的半导体芯片11、12，故可在平面上高集成化地安装半导体装置。
此外，如果如图6～图8中示出的半导体芯片16、17、18和半导体芯片19、20、21那样在封装基板13的至少一个面上设置多个半导体芯片，则可在相同的平面面积上设置数目多的半导体芯片5。
此外，通过将传送共用信号的被设置在封装基板13上的2个半导体芯片11、12的引线引脚归纳为1个，可削减整体的引线引脚9的数目。
此外，由于通过在封装基板13的表面和背面上直接设置半导体芯片11、12，即使不作成在把只在上述现有技术中的安装结构的一个面上设置了半导体芯片的封装基板设置到插座等中之后设置到安装基板上的现有那样的安装结构也可以解决，故可谋求降低部件数目，同时，可简化制造工序。
(实施例2)
其次，使用图9～图12，说明本发明的实施例2中的半导体装置。本实施例的半导体装置，如图9～图12中所示，在实施例1中已说明的半导体装置中，还设置了接地用平板22，使其分别从封装基板13的安装了引线引脚9的侧端面以外的3个侧端面突出。此外，在从封装基板13的左右的侧端面突出的接地用平板22的下端与安装基板3之间设置了规定的间隙e。通过设置这样的间隙e，可在该部分中***只在一个主表面上设置半导体芯片的、使封装基板的另一个主表面朝向安装基板而被设置的上述现有技术中示出的封装基板的端部。
通过作成这样的结构，可利用接地用平板22将在半导体芯片11、12中产生的热发散出去。此外，利用通过将接地用平板22引出到外部以使接地面积扩大可降低阻抗这一点，可减少在半导体装置的内部和外部产生的噪声的影响。
此外，由于能进一步设置成，使在上述现有技术中已示出的的封装基板108那样的只在一个主表面上设置了半导体芯片105的封装基板101、102的另一个主表面与安装基板3相接并在上述间隙e中***端部，故可在相同的安装基板面积上安装数目更多的半导体芯片。其结果，可进一步提高在平面上观察到的半导体装置的安装密度。
(实施例3)
其次，使用图13，说明本发明的实施例3中的半导体装置。本实施例的半导体装置，如图13中所示，其结构与在实施例1中示出的半导体装置大致相同，但在封装基板24、25在与被安装在安装基板3上的侧端面相反一侧的侧端面上还具有接地用引脚26这一点上不同。
该封装基板24、25大致互相平行地且大致垂直于安装基板3而被安装。此外，利用接地用平板23导电性地连接一方的封装基板24的与被安装在安装基板3上的一侧相反的一侧的全部接地用引脚26与在另一方的封装基板25的与被安装在安装基板3上的侧端面相反的一侧的侧端面上被设置的全部接地用引脚26。
通过作成这样的结构，利用将上述的接地用平板23作为散热基板来使用，同时，因接地面积的扩大可降低阻抗的功能，可减少在半导体装置的内部和外部产生的噪声的影响。
在本实施例中，在与设置了引线引脚9的侧端面相反一侧的封装基板24、25的侧端面上设置接地用引脚26并利用垂直地配置的接地用平板23连接起来，但也可采用其它的形态。
本发明的保护范围不限定于上述实施例中记载的内容，而是由后附的权利要求书来限定。在不偏离后附的权利要求书的精神和范围的情况下，可作各种变更来实施。

Claims (6)

1．一种半导体装置，其特征在于，具备：
封装基板(13)，具有互相成为表面、背面的第1和第2主表面及侧端面；
半导体芯片(11，12)，分别被设置在上述第1和第2主表面上；以及
导电性地连接用的引线引脚(9)，被设置在上述侧端面上，在与上述第1和第2主表面大致平行的一个方向上延伸。
2．如权利要求1中所述的半导体装置，其特征在于：
在上述第1和第2主表面的至少一方上设置多个上述半导体芯片(11，12)。
3．如权利要求1中所述的半导体装置，其特征在于：
设置了上述半导体芯片(11，12)的接地用平板(22，23)，使其从上述侧端面中的设置了上述引线引脚(9)的区域以外的规定的区域突出。
4．如权利要求3中所述的半导体装置，其特征在于：
在将上述封装基板(13)安装到安装基板(3)上的状态下，在与该上述安装基板(3)相对的面与上述安装基板(3)之间留下能***其它半导体装置的间隙的形态下，上述接地用平板(23)从上述封装基板(13)的上述侧端面突出。
5．如权利要求1中所述的半导体装置，其特征在于：
在上述侧端面中的设置了上述引线引脚(9)的区域以外的区域中设置了上述半导体芯片(11，12)的接地用引脚(26)。
6．一种半导体装置的安装结构，其中，在安装基板的主面上，以第1和第2主表面成为垂直于该主面的方式安装了多个包含具有互相成为表面、背面的上述第1和第2主表面及侧端面的封装基板(13)的半导体装置，其特征在于：
多个上述半导体装置分别具备：
半导体芯片(11，12)，分别被设置在上述第1和第2主表面上；以及
导电性地连接用的引线引脚(9)，被设置在上述侧端面上，在沿与上述第1和第2主表面大致平行的一个方向上延伸，
在上述多个半导体装置的每一个中的、在上述侧端面中的设置了上述引线引脚(9)的区域以外的区域中设置了上述半导体芯片(11，12)的接地用引脚(26)，
利用接地用平板(23)导电性地连接上述多个半导体装置的上述接地用引脚(26)相互间。
CN00118760A 1999-06-24 2000-06-26 半导体装置及其安装结构 Pending CN1287382A (zh)

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