CN1260577C - 测试存取端口的数据同步 - Google Patents
测试存取端口的数据同步 Download PDFInfo
- Publication number
- CN1260577C CN1260577C CNB01820709XA CN01820709A CN1260577C CN 1260577 C CN1260577 C CN 1260577C CN B01820709X A CNB01820709X A CN B01820709XA CN 01820709 A CN01820709 A CN 01820709A CN 1260577 C CN1260577 C CN 1260577C
- Authority
- CN
- China
- Prior art keywords
- data
- sign
- circuit
- register
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318572—Input/Output interfaces
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Description
Claims (23)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/738,405 | 2000-12-15 | ||
US09/738,405 US7168032B2 (en) | 2000-12-15 | 2000-12-15 | Data synchronization for a test access port |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1507567A CN1507567A (zh) | 2004-06-23 |
CN1260577C true CN1260577C (zh) | 2006-06-21 |
Family
ID=24967868
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB01820709XA Expired - Fee Related CN1260577C (zh) | 2000-12-15 | 2001-12-10 | 测试存取端口的数据同步 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7168032B2 (zh) |
JP (1) | JP3895278B2 (zh) |
KR (1) | KR100551546B1 (zh) |
CN (1) | CN1260577C (zh) |
TW (1) | TWI221976B (zh) |
WO (1) | WO2002048722A2 (zh) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
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US7017066B2 (en) * | 2003-04-10 | 2006-03-21 | International Business Machines Corporation | Method, system and synchronization circuit for providing hardware component access to a set of data values without restriction |
US7805638B2 (en) * | 2003-06-18 | 2010-09-28 | Nethra Imaging, Inc. | Multi-frequency debug network for a multiprocessor array |
JP2007526670A (ja) * | 2003-06-25 | 2007-09-13 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | クロックドメイン間のイベントの無損失転送 |
JP4494899B2 (ja) * | 2004-07-29 | 2010-06-30 | 富士通株式会社 | プロセッサデバッグ装置およびプロセッサデバッグ方法 |
US20060161818A1 (en) * | 2005-01-14 | 2006-07-20 | Ivo Tousek | On-chip hardware debug support units utilizing multiple asynchronous clocks |
US7511228B2 (en) * | 2005-09-14 | 2009-03-31 | Schmartboard, Inc. | Printed circuit board |
KR100727975B1 (ko) * | 2005-09-10 | 2007-06-14 | 삼성전자주식회사 | 시스템 온 칩의 고장 진단 장치 및 방법과 고장 진단이가능한 시스템 온 칩 |
US7665002B1 (en) * | 2005-12-14 | 2010-02-16 | Advanced Micro Devices, Inc. | Multi-core integrated circuit with shared debug port |
US7596719B2 (en) | 2006-02-14 | 2009-09-29 | Atmel Corporation | Microcontroller information extraction system and method |
WO2008024697A2 (en) * | 2006-08-20 | 2008-02-28 | Ambric, Inc. | Multi-frequency debug network for a multiprocessor array |
US7707448B1 (en) * | 2007-05-03 | 2010-04-27 | Oracle America, Inc. | Deterministic test strand unparking |
US7827391B2 (en) | 2007-06-26 | 2010-11-02 | International Business Machines Corporation | Method and apparatus for single-stepping coherence events in a multiprocessor system under software control |
US7984448B2 (en) * | 2007-06-26 | 2011-07-19 | International Business Machines Corporation | Mechanism to support generic collective communication across a variety of programming models |
US8108738B2 (en) | 2007-06-26 | 2012-01-31 | International Business Machines Corporation | Data eye monitor method and apparatus |
US8756350B2 (en) | 2007-06-26 | 2014-06-17 | International Business Machines Corporation | Method and apparatus for efficiently tracking queue entries relative to a timestamp |
US8458282B2 (en) | 2007-06-26 | 2013-06-04 | International Business Machines Corporation | Extended write combining using a write continuation hint flag |
US7886084B2 (en) | 2007-06-26 | 2011-02-08 | International Business Machines Corporation | Optimized collectives using a DMA on a parallel computer |
US7802025B2 (en) | 2007-06-26 | 2010-09-21 | International Business Machines Corporation | DMA engine for repeating communication patterns |
US8010875B2 (en) | 2007-06-26 | 2011-08-30 | International Business Machines Corporation | Error correcting code with chip kill capability and power saving enhancement |
US8032892B2 (en) * | 2007-06-26 | 2011-10-04 | International Business Machines Corporation | Message passing with a limited number of DMA byte counters |
US8468416B2 (en) | 2007-06-26 | 2013-06-18 | International Business Machines Corporation | Combined group ECC protection and subgroup parity protection |
US7877551B2 (en) * | 2007-06-26 | 2011-01-25 | International Business Machines Corporation | Programmable partitioning for high-performance coherence domains in a multiprocessor system |
US7793038B2 (en) | 2007-06-26 | 2010-09-07 | International Business Machines Corporation | System and method for programmable bank selection for banked memory subsystems |
US8140925B2 (en) * | 2007-06-26 | 2012-03-20 | International Business Machines Corporation | Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan |
US8103832B2 (en) * | 2007-06-26 | 2012-01-24 | International Business Machines Corporation | Method and apparatus of prefetching streams of varying prefetch depth |
US8509255B2 (en) | 2007-06-26 | 2013-08-13 | International Business Machines Corporation | Hardware packet pacing using a DMA in a parallel computer |
US8230433B2 (en) | 2007-06-26 | 2012-07-24 | International Business Machines Corporation | Shared performance monitor in a multiprocessor system |
US7882409B2 (en) * | 2007-09-21 | 2011-02-01 | Synopsys, Inc. | Method and apparatus for synthesis of augmented multimode compactors |
US20090260862A1 (en) * | 2008-04-16 | 2009-10-22 | Andrew Yaung | Circuit modification device for printed circuit boards |
US8572433B2 (en) * | 2010-03-10 | 2013-10-29 | Texas Instruments Incorporated | JTAG IC with commandable circuit controlling data register control router |
US8589714B2 (en) | 2009-12-18 | 2013-11-19 | Texas Instruments Incorporated | Falling clock edge JTAG bus routers |
US8423851B2 (en) * | 2010-09-16 | 2013-04-16 | Nanya Technology Corporation | Measured device and test system utilizing the same |
US9140754B2 (en) * | 2011-02-28 | 2015-09-22 | Texas Instruments Incorporated | Scan-based MCM interconnecting testing |
WO2013100976A1 (en) * | 2011-12-28 | 2013-07-04 | Intel Corporation | Data transfer between asynchronous clock domains |
US20150106660A1 (en) * | 2013-10-16 | 2015-04-16 | Lenovo (Singapore) Pte. Ltd. | Controller access to host memory |
US10495690B2 (en) | 2017-08-28 | 2019-12-03 | Stmicroelectronics International N.V. | Combinatorial serial and parallel test access port selection in a JTAG interface |
CN112462240A (zh) * | 2020-12-04 | 2021-03-09 | 国微集团(深圳)有限公司 | 支持跨芯片信号同步触发检测方法及装置 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63142437A (ja) | 1986-12-05 | 1988-06-14 | Hitachi Ltd | Cmos大規模集積回路装置のクロツク制御回路 |
US5602878A (en) | 1994-09-23 | 1997-02-11 | Intel Corporation | Method of delivering stable data across an asynchronous interface |
US6014752A (en) | 1995-01-27 | 2000-01-11 | Sun Mircosystems, Inc. | Method and apparatus for fully controllable integrated circuit internal clock |
US5838684A (en) * | 1996-02-22 | 1998-11-17 | Fujitsu, Ltd. | Low latency, high clock frequency plesioasynchronous packet-based crossbar switching chip system and method |
US6032271A (en) | 1996-06-05 | 2000-02-29 | Compaq Computer Corporation | Method and apparatus for identifying faulty devices in a computer system |
GB9622687D0 (en) | 1996-10-31 | 1997-01-08 | Sgs Thomson Microelectronics | An integrated circuit with tap controller |
GB9622686D0 (en) | 1996-10-31 | 1997-01-08 | Sgs Thomson Microelectronics | A test port controller and a method of effecting communication using the same |
GB9622685D0 (en) | 1996-10-31 | 1997-01-08 | Sgs Thomson Microelectronics | An integrated circuit device and method of communication therewith |
US5935266A (en) | 1996-11-15 | 1999-08-10 | Lucent Technologies Inc. | Method for powering-up a microprocessor under debugger control |
US6058255A (en) | 1996-12-17 | 2000-05-02 | Texas Instruments Incorporated | JTAG instruction decode test register and method |
US6112298A (en) | 1996-12-20 | 2000-08-29 | Texas Instruments Incorporated | Method for managing an instruction execution pipeline during debugging of a data processing system |
US5900753A (en) | 1997-03-28 | 1999-05-04 | Logicvision, Inc. | Asynchronous interface |
US6052808A (en) | 1997-10-31 | 2000-04-18 | University Of Kentucky Research Foundation | Maintenance registers with Boundary Scan interface |
US6145100A (en) | 1998-03-04 | 2000-11-07 | Advanced Micro Devices, Inc. | Debug interface including timing synchronization logic |
US6115763A (en) | 1998-03-05 | 2000-09-05 | International Business Machines Corporation | Multi-core chip providing external core access with regular operation function interface and predetermined service operation services interface comprising core interface units and masters interface unit |
US6041418A (en) | 1998-08-07 | 2000-03-21 | Lucent Technologies, Inc. | Race free and technology independent flag generating circuitry associated with two asynchronous clocks |
JP3888792B2 (ja) | 1998-12-25 | 2007-03-07 | 富士通株式会社 | クロック発生回路 |
US6327684B1 (en) * | 1999-05-11 | 2001-12-04 | Logicvision, Inc. | Method of testing at-speed circuits having asynchronous clocks and controller for use therewith |
US6321329B1 (en) | 1999-05-19 | 2001-11-20 | Arm Limited | Executing debug instructions |
US6535988B1 (en) * | 1999-09-29 | 2003-03-18 | Intel Corporation | System for detecting over-clocking uses a reference signal thereafter preventing over-clocking by reducing clock rate |
-
2000
- 2000-12-15 US US09/738,405 patent/US7168032B2/en not_active Expired - Lifetime
-
2001
- 2001-12-10 JP JP2002549976A patent/JP3895278B2/ja not_active Expired - Lifetime
- 2001-12-10 KR KR1020037007846A patent/KR100551546B1/ko active IP Right Grant
- 2001-12-10 CN CNB01820709XA patent/CN1260577C/zh not_active Expired - Fee Related
- 2001-12-10 WO PCT/US2001/047625 patent/WO2002048722A2/en active IP Right Grant
- 2001-12-14 TW TW090131094A patent/TWI221976B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CN1507567A (zh) | 2004-06-23 |
TWI221976B (en) | 2004-10-11 |
WO2002048722A3 (en) | 2003-05-15 |
JP3895278B2 (ja) | 2007-03-22 |
US20020078420A1 (en) | 2002-06-20 |
KR100551546B1 (ko) | 2006-02-13 |
JP2004515787A (ja) | 2004-05-27 |
KR20030060990A (ko) | 2003-07-16 |
WO2002048722A2 (en) | 2002-06-20 |
US7168032B2 (en) | 2007-01-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20090206 Address after: Massachusetts, USA Patentee after: ANALOG DEVICES, Inc. Address before: California, USA Co-patentee before: ANALOG DEVICES, Inc. Patentee before: INTEL Corp. |
|
ASS | Succession or assignment of patent right |
Owner name: ANALOG DEVICES, INC. Free format text: FORMER OWNER: INTEL CORP Effective date: 20090206 |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20060621 Termination date: 20201210 |