CN1225773C - Surface treating method for low dielectric constant material - Google Patents
Surface treating method for low dielectric constant material Download PDFInfo
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- CN1225773C CN1225773C CN 02145828 CN02145828A CN1225773C CN 1225773 C CN1225773 C CN 1225773C CN 02145828 CN02145828 CN 02145828 CN 02145828 A CN02145828 A CN 02145828A CN 1225773 C CN1225773 C CN 1225773C
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Abstract
The present invention relates to a surface treating method for materials with low dielectric constant, which comprises the following steps: depositing material with low dielectric constant on a semiconductor substrate in order to form a dielectric layer; performing an electric slurry processing program of hydrogen gas in order to decrease the dielectric constant of the dielectric layer.
Description
Technical field
The present invention relates to semiconductor fabrication, and particularly relates to a kind of surface treatment method of dielectric materials, and it can improve breakdown voltage and preferable Reliability is arranged, and can reduce dielectric constant.
Background technology
Along with integrated circuit is accurate day by day and complicated, in order on limited wafer surface, to make enough metal interconnectings, adopt the comprehensive architecture mode of multiple layer inner connection line at present mostly, finishing the connection of each element, and be used as isolating the dielectric material of each metal interconnecting with metal intermetallic dielectric layer (IMD:Inter-Metal Dielectrics).The material that is used as metal intermetallic dielectric layer in the prior art includes: electric slurry oxide silicon (PE-OX; Plasma enhanced oxide), electricity slurry tetraethoxy silex glass (PE-TEOS; Plasma enhanced tetraethyl orthosilicate glass), the dielectric material of spin-on glasses, low-k is (as the FO of Dow-Coring company production
x-15) etc.
In recent years, be the development of co-operating member size downsizing and the demand that improves element operation speed, have the copper metal of low resistance constant and high electron mobility impedance, be used to material gradually, replace aluminium technology for making in the past as metal interconnecting.Wherein cooperate inserted (Cu damascene) intraconnections technology of copper metal not only can reach the downsizing of intraconnections, also solved the problem that the metallic copper etching is difficult for simultaneously, therefore become the main development trend of multiple internal connecting lines now.On the other hand, for the electric capacity with metal intermetallic dielectric layer reduces as much as possible, used at present as fluorine doping oxide layer (FSQ), hydrogen doping oxide layer (HSQ, hydrogert silses-quioxane), a methyl doping gasification layer (MSQ; Methylsilsesquioxane) etc. the material of low-k is used as metal intermetallic dielectric layer, to reduce cross-talk (crosstalk) and RC time delay.
Generally have now on the advanced low-k materials dielectric layer on substrate or the semiconductor element, can be with ammonia (NH
3) electricity slurry handling procedure, removing the issuable cupric oxide of subsequent step (CuO), yet this kind processing can make advanced low-k materials be subjected to the damage of ammonia electricity slurry simultaneously, even has the relatively poor problem of adhesive force and take place.
Above-mentioned ammonia electricity slurry handling procedure makes advanced low-k materials dielectric layer surface that the problem of damage take place, and demands proposing the effectively road of improvement urgently.
Summary of the invention
Main purpose of the present invention just provides a kind of surface treatment method of advanced low-k materials, not only can reach the effect of ammonia electricity slurry handling procedure, remove cupric oxide, impurity is reduced and the breakdown voltage (breakdown volrage) of raising metal intermetallic dielectric layer, therefore shorten the time-dependence dielectric collapse (time-dependent dielectric breakdown) relevant, also have the advantage of the dielectric constant that reduces the dielectric constant material dielectric layer with production reliability (reliability).
For reaching above-mentioned purpose, the invention provides a kind of surface treatment method of advanced low-k materials, its step mainly comprises: deposit an advanced low-k materials in the semiconductor substrate and form a dielectric layer; And the electricity slurry handling procedure of implementing a hydrogen.Above-mentioned electricity slurry handling procedure is to implement with electric pulp vapour deposition process or high density plasma enhanced chemical vapor deposition method.
The present invention also proposes a kind of surface treatment method of advanced low-k materials, it is characterized in that removing cupric oxide by above-mentioned electricity slurry handling procedure, improve breakdown voltage, obtain the high product of reliability, this manufacturing technology comprises the following steps: to deposit an advanced low-k materials in the semiconductor substrate and form a dielectric layer; Definition one is opened in the dielectric layer; Deposit a copper metal layer on dielectric layer, and fill up above-mentioned opening; Remove above-mentioned opening copper metal layer in addition with chemical mechanical milling method; And the electricity slurry handling procedure of implementing a hydrogen, removing the cupric oxide on dielectric layer or copper metal layer surface, and reduce the dielectric constant of dielectric layer.
Present embodiment is that the method according to this invention is applied on the copper metal interconnecting manufacturing technology of mosaic texture, below is that example describes with single damascene fabrication techniques only, also can be applicable on the dual damascene manufacturing technology but be familiar with this operator.
Description of drawings
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. is described in detail below:
Figure 1A-1F is a series of profiles, in order to the mosaic copper manufacturing technology of explanation a preferred embodiment of the present invention.
Embodiment
Please refer to Figure 1A, it shows the initial step of present embodiment.The part of label 100, can comprise several layers of metal interconnecting and several electrical interconnective semiconductor elements, as MUS electric crystal, resistance, logic element etc., for the purpose of simplifying accompanying drawing, the semiconductor-based end and the integrated circuit elements of metal intermetallic dielectric layer below 102 only represented with label 100.
Please refer to Figure 1B,, utilize little shadow and etching program in dielectric layer 102, to define the interlayer hole of metal interconnecting earlier then according to the inserted manufacturing technology of tradition.
Please refer to Fig. 1 C, define the raceway groove of metal interconnecting once again with little shadow and etching program, carry out comprehensive deposition then, form a metal barrier layer 104 with bottom and sidewall at intraconnections raceway groove and interlayer hole.This barrier layer 104 can help adhering to of follow-up metal and prevent its diffusion, and for copper, suitable diffusion barrier layer material comprises: tantalum (Ta), and tantalum nitride (TaN), tungsten nitride (WN), or the titanium nitride of using always in the existing manufacturing technology (TiN) etc.
Please refer to Fig. 1 D, then, with chemical vapour deposition technique (CVD), physical vaporous deposition (PVD), or electroplating deposition method (Electroplating) deposited copper metal level 106 on barrier layer 104, and make it fill up aforesaid intraconnections raceway groove and interlayer hole.The preferably can utilize ionized metal electricity slurry (IMP) crystal seed layer of the about 300-1500 dust of deposition one bed thickness in substrate earlier, and then finishes the deposition of copper conductive layer with galvanoplastic.Usually barrier layer can be finished in the different cavity of multi-cavity reative cell (cluster chamber) in regular turn with the deposition program of crystal seed layer and vacuum breaker not, so as to the reliability and the production capacity of raising manufacturing technology.
Next, please refer to Fig. 1 E, after finishing the deposition of barrier layer 104 and copper metal layer 106, carry out planarization with chemical mechanical milling method, copper metal layer beyond the intraconnections raceway groove 106 and barrier layer 104 are removed, the process of grinding comprises: the formality of the grinding of copper metal, the grinding of barrier layer and last one oxide cmp (oxide buffing), wherein each stage is to use different grinding milks.The electricity slurry handling procedure 107 of a hydrogen is implemented on dielectric layer 102 surfaces of the low-k of the present invention behind cmp, and the treatment conditions of above-mentioned electricity slurry handling procedure are as follows: the processing time between second, was good with 10 seconds between 1-40; Treatment temperature is good with 400 ℃ between 20-500 ℃; Gas flow rate during processing is good with 660sccm between 100-2000sccm; Processing pressure is good with 4T between 1T-7T; Operand power is good with 600W between 50-3000W.And above-mentioned electricity slurry handling procedure is to implement with electric pulp vapour deposition process or high density plasma enhanced chemical vapor deposition method.
Afterwards, again coated with loam cake nitration case 108, can obtain the structure shown in Fig. 1 F.
The hydrogen electricity slurry handling procedure of the inventive method has the following advantages, 1) reducing power of hydrogen electricity slurry handling procedure is better than the electricity slurry handling procedure of ammonia, can reductive copper oxide and obtain comparatively pure copper, 2) owing to make the copper oxide reduction of metal intermetallic dielectric layer and copper conductor, simultaneously can improve breakdown voltage, cause, collapsed (time-dependentdielectric breakdown) and shorten the time-dependence dielectric relevant with production reliability (reliability), production reliability is better, 3) though the processing on dielectric layer surface not can with surface reaction, it only is reductive copper oxide, adhesive force for the dielectric layer surface of advanced low-k materials is also helpful, simultaneously, 4) dielectric layer of above-mentioned advanced low-k materials also can reduce dielectric constant.
Though the present invention is open with preferred embodiment; right its is not in order to qualification the present invention, any those of ordinary skill in the art, without departing from the spirit and scope of the present invention; can do some equivalence and change and modification, so protection scope of the present invention is as the criterion with claim.
Claims (5)
1. the surface treatment method of an advanced low-k materials is characterized in that, comprises the following steps:
Deposit an advanced low-k materials in the semiconductor substrate and form a dielectric layer;
Definition one is opened in this dielectric layer;
Deposit a copper metal layer on this dielectric layer, and fill up above-mentioned opening;
Remove this opening copper metal layer in addition with chemical mechanical milling method; And
Implement the electricity slurry handling procedure of a hydrogen, removing the cupric oxide on dielectric layer and copper metal layer surface, and the dielectric constant of reduction dielectric layer.
2. the surface treatment method of advanced low-k materials as claimed in claim 1 is characterized in that described advanced low-k materials is to be deposited in the substrate with chemical vapour deposition technique or spin coating mode.
3. the surface treatment method of advanced low-k materials as claimed in claim 1 is characterized in that described electricity slurry handling procedure is to implement with electric pulp vapour deposition process or high density plasma enhanced chemical vapor deposition method.
4. the surface treatment method of advanced low-k materials as claimed in claim 1 is characterized in that also comprising before this copper metal layer of described deposition:
Bottom and side wall deposition one barrier layer in above-mentioned opening.
5. the surface treatment method of advanced low-k materials as claimed in claim 4, the material that it is characterized in that described barrier layer is to select the group that forms from following: titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), and tungsten nitride (WN).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02145828 CN1225773C (en) | 2002-10-14 | 2002-10-14 | Surface treating method for low dielectric constant material |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02145828 CN1225773C (en) | 2002-10-14 | 2002-10-14 | Surface treating method for low dielectric constant material |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1490852A CN1490852A (en) | 2004-04-21 |
| CN1225773C true CN1225773C (en) | 2005-11-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02145828 Expired - Lifetime CN1225773C (en) | 2002-10-14 | 2002-10-14 | Surface treating method for low dielectric constant material |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102339786A (en) * | 2010-07-16 | 2012-02-01 | 中芯国际集成电路制造(上海)有限公司 | Method for processing copper-plated layers in trenches |
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2002
- 2002-10-14 CN CN 02145828 patent/CN1225773C/en not_active Expired - Lifetime
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Granted publication date: 20051102 |