CN118138071A - Short wave receiver with high near-end interference resistance - Google Patents
Short wave receiver with high near-end interference resistance Download PDFInfo
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Abstract
The embodiment of the invention provides a short wave receiver with high near-end interference resistance, which comprises the following components: the power divider is used for receiving an input radio frequency signal; the hardware circuit I comprises an analog-to-digital converter electrically connected with the power divider and an I-path digital down-conversion processing module electrically connected with the analog-to-digital converter; the hardware circuit Q comprises an analog primary mixer electrically connected with the power divider, an analog narrow-band-pass filter electrically connected with the analog primary mixer, and a Q-path digital down-conversion processing module electrically connected with the analog narrow-band-pass filter and the analog-to-digital converter; and the audio DAC module is electrically connected with the I-path digital down-conversion processing module and the Q-path digital down-conversion processing module. The invention improves the reciprocal mixing of the receiver by utilizing the filtering performance of the analog narrow-band-pass filter at the rear end of the mixer, reduces the distance between interference sources and carrier frequencies when measuring the desensitization range index, and improves the anti-interference capability of the short-wave receiver.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a short wave receiver with high near-end interference resistance.
Background
Short-wave long-distance communication is mainly carried out by taking an ionosphere as a medium, the quality of communication is limited by factors such as communication time, geographic position, interference of surrounding electromagnetic environment and the like, the frequency of the two-place communication-capable short wave can be dynamically changed, and the communication-capable frequency range is narrow.
Besides the contracted frequency points of shipping, rescue and the like, the use of the short-wave working frequency point is not limited internationally, so that further complicating the short-wave electromagnetic environment is caused. When the useful signal received by the short wave receiver is weak and a strong interference source exists at the near end, in order to improve the communication quality, the following measures can be taken: 1) Enhancing the transmitting power of the transmitting side; 2) Switching the working frequency point; 3) The capacity of anti-interference of the near end of the short wave receiver is enhanced; 4) The reception gain is enhanced using a hierarchical reception technique. In view of the fact that short wave communication is affected by an ionosphere, the available frequency points are limited, handshake notification is also obtained, and frequency switching is not suggested easily; increasing the transmit power of the sender is also subject to the commitment of both parties of the communication, which is not desirable; the diversity receiving technology is used to enhance the receiving effect, if frequency diversity is used, more than two frequency points of signals need to be transmitted, and if space diversity is used, space distance between short wave receiver antennas needs to be limited. Thus, improving the capability of the short wave receiver to resist near-end interference is a brief and effective optimal solution.
When receiving weak useful signals, gain is required to be brought by a low noise amplifier, and when strong interference signals exist, the radio frequency analog signals are required to be attenuated. The existing short wave receiver architecture is mainly divided into a superheterodyne receiver and a radio frequency direct sampling receiver, and the two receivers have advantages and disadvantages.
The traditional short wave superheterodyne receiver is processed through twice mixing, processes outside the normal low noise amplification circuit, because the low noise amplification circuit that the compensation gain was all needed to increase after every stage mixing processing to the plug loss of mixer self, two-stage mixing circuit needs two local oscillation circuit, leads to two-stage superheterodyne hardware circuit structure complicacy.
The short-wave radio frequency direct sampling receiver mainly utilizes an analog-to-digital converter (ADC) with hundred megalevel sampling rate to perform data acquisition and conversion on short-wave signals of 2 MHz-30 MHz, and the effective bit number of the existing 16bit-ADC is about 12 bits, so that the dynamic range of the short-wave radio frequency direct sampling receiver is mainly limited by the spurious-free dynamic range of the ADC.
In order to enhance the receiving dynamic range of the short-wave radio frequency direct acquisition, the industry has the technical scheme that the short-wave frequency of 2 MHz-30 MHz is divided into more than ten wave bands (the passband range of a band-pass filter is more than 1000 kHz), working carrier frequency points pass through corresponding band-pass analog filters, distant interference sources can be filtered, and the near-end strong interference sources can not be filtered and suppressed while the receiving intensity of weak useful signals is not influenced.
The short wave superheterodyne receiver generally performs frequency conversion twice, the bandwidth of the received signal is relatively narrow, the intensity of the near-end strong interference source and the interval distance between the near-end strong interference source and the working carrier frequency are not easy to identify, the sliding offset of the local oscillation frequency cannot be automatically given, the strong interference source is filtered and suppressed by means of a band-pass filter after a mixer, and the sliding offset of the local oscillation frequency is manually modified by the existing radio station.
The short wave superheterodyne receiver has narrower receiving bandwidth and can not support different service requirements of broadband and multipath reception; the superheterodyne receiver has a narrow received signal bandwidth, is difficult to evaluate the intensity of a near-end strong interference source, has a relatively wide passband of an analog filter after multistage mixing, needs to manually change the local oscillation frequency of the mixer by means of manpower, lacks instantaneity, and has a less obvious effect of filtering and suppressing the near-end interference source.
The short-wave radio frequency direct sampling receiver is designed and developed based on a software radio technology, and has the advantages that multipath short-wave signals can be received and processed simultaneously in parallel, but the dynamic range of the short-wave radio frequency direct sampling receiver is mainly limited by the spurious-free dynamic range of the ADC, an analog filter after an analog mixer is absent, and in order to avoid that the ADC is in an overflow state due to a strong interference source, weak useful signals containing the strong interference source are required to be attenuated. Compared with a short wave superheterodyne receiver, the anti-interference capability of the weak signal on the near-end strong interference signal is not improved.
Disclosure of Invention
Accordingly, it is an object of the present invention to provide a short wave receiver with high near-end interference resistance, so as to improve the above-mentioned problems.
The embodiment of the invention provides a short wave receiver with high near-end interference resistance, which comprises the following components:
The power divider is used for receiving an input radio frequency signal;
The hardware circuit I with the broadband radio frequency direct acquisition architecture comprises an analog-to-digital converter electrically connected with the power divider and an I-path digital down-conversion processing module electrically connected with the analog-to-digital converter;
the hardware circuit Q based on the first-stage mixing superheterodyne comprises an analog first-stage mixer electrically connected with the power divider, an analog narrowband band-pass filter electrically connected with the analog first-stage mixer, and a Q-path digital down-conversion processing module electrically connected with both the analog narrowband band-pass filter and the analog-to-digital converter;
and the audio DAC module is electrically connected with the I-path digital down-conversion processing module and the Q-path digital down-conversion processing module.
Preferably, the hardware circuit I further includes an I-path adjustable attenuator and an I-path LNA fixed gain amplifier, the I-path adjustable attenuator and the I-path LNA fixed gain amplifier are connected in series between the power divider and the analog-to-digital converter, and an output end of the I-path digital down-conversion processing module is connected with the I-path adjustable attenuator.
Preferably, the I-channel digital down-conversion processing module comprises an I-channel radio frequency AGC controller, an I-channel down-converter and a near-end width evaluation unit, wherein the output end of the analog-to-digital converter is respectively connected with the I-channel radio frequency AGC controller and the I-channel down-converter, and the output end of the I-channel radio frequency AGC controller is connected with the I-channel adjustable attenuator; the I-path down converter is connected to the Q-path digital down conversion processing module through the near-end width evaluation unit.
Preferably, the hardware circuit Q further includes a Q-way adjustable attenuator and a first Q-way LNA fixed gain amplifier, where the Q-way adjustable attenuator and the first Q-way LNA fixed gain amplifier are connected in series between the power divider and the analog primary mixer, and an output end of the Q-way digital down-conversion processing module is connected with the Q-way adjustable attenuator.
Preferably, the hardware circuit Q further includes a second Q-way LNA fixed gain amplifier, where an input end of the second Q-way LNA fixed gain amplifier is connected to the analog narrowband bandpass filter, and an output end of the second Q-way LNA fixed gain amplifier is connected to the analog-to-digital converter.
Preferably, the Q-channel digital down-conversion processing module includes a Q-channel radio frequency AGC controller, a Q-channel down-converter, a Q-channel baseband AGC, and a frequency offset control unit, where an output end of the analog-to-digital converter is connected to the Q-channel radio frequency AGC controller and the Q-channel down-converter, and an output end of the Q-channel radio frequency AGC controller is connected to the Q-channel adjustable attenuator; the Q-channel down converter is connected to the audio DAC module through the Q-channel baseband AGC, and the near-end width signal evaluation unit is connected to the Q-channel down converter through the frequency offset control unit; the output end of the frequency offset control unit is also connected to the analog primary mixer through a local oscillation circuit.
Preferably, the frequency of the useful signal output by the first Q-path fixed gain amplifier is f s,fs＝fc+fSSB, where f c is the carrier frequency and f SSB is the frequency of the useful signal of the single sideband; the output fixed frequency of the analog primary mixer is f MIX_OUT, and the local oscillation frequency of the analog primary mixer is f LO,fLO＝fMIX_OUT+fc;
The center frequency of the analog narrow-band-pass filter is f MIX_OUT, and the passband frequency range of the analog narrow-band-pass filter is [ f MIX_OUT-fBW,fMIX_OUT+fBW],fBW is half of the bandwidth of the analog narrow-band-pass filter.
Preferably, the near-end broadband signal evaluation unit is configured to dynamically evaluate the spectral characteristics of the electromagnetic signal near the carrier frequency f c in real time through signal amplitude energy detection and frequency spectrum analysis of the FFT within the bandwidth of 150kHz, and provide a parameter factor to the frequency offset control module according to the spectral characteristics of the electromagnetic signal.
Preferably, during normal reception, when the receiver in the hardware circuit Q is in an upper sideband operating state, the useful signal is f s＝fc+fUSB, if the output of the analog primary mixer is a fixed frequency point f MIX_OUT, the corresponding local oscillator frequency is f LO＝fMIX_OUT+fc, and the sampling frequency corresponding to the analog-to-digital converter of the hardware circuit Q is (2*F s-fMIX_OUT), the carrier frequency corresponding to the digital lower sideband in the hardware circuit Q is (2*F s-fMIX_OUT -1 kHz), so as to perform signal deceleration processing according to the digital down-conversion method of the hardware circuit Q;
The near-end broadband signal evaluation unit is specifically configured to modify a local oscillator source of a mixer in the hardware circuit Q to be a moving frequency value f LO_1＝fMIX_OUT+fc-fmove,fmove when a frequency ratio carrier frequency of a strong interference signal is greater than f BW and less than 150kHz, and if a precondition is that a useful signal is ensured to fall within a passband of a narrowband filter after frequency movement, a center frequency of the strong interference source from the narrowband filter is far away from fmove, a useful signal frequency output by the mixer is (f LO_1-(fc+fUSB))＝(fMIX_OUT-fmove-fUSB), and a carrier frequency in corresponding digital down-conversion is ((f MIX_OUT-fmove-fUSB) -1 kHz).
Preferably, the frequency offset control unit is configured to, according to a filtering characteristic of an analog narrowband bandpass filter used in the hardware circuit Q, take a principle that the corrected local oscillation frequency does not cause attenuation of a useful radio frequency signal, and when a center frequency of the transition band away from the analog narrowband bandpass filter is not less than 4kHz, bring about an analog filtering suppression effect greater than 15dB, thereby effectively performing analog filtering suppression on a nearby strong interference source; in the Q-channel digital down-conversion process, the useful radio frequency signal is subjected to digital down-conversion by modifying the offset of the corresponding digital carrier mixing frequency.
In summary, in this embodiment, aiming at the disadvantage that the working frequency point of the short-wave receiver is often interfered by the nearby strong interference electromagnetic signal, and the strength of the useful signal is weaker at this time, in order to improve the capability of the short-wave receiver for resisting near-end interference, a new hardware architecture design and corresponding software algorithm processing are performed.
In terms of hardware, a receiving circuit of a radio frequency direct sampling architecture supporting broadband reception and a receiving circuit of a first-stage mixing superheterodyne structure supporting narrowband reception are built in a system, so that a newly built receiver can collect strong interference signals at the near end of a carrier frequency point, provide original data for monitoring near-end electromagnetic signals of a working carrier frequency point in real time, and effectively inhibit near-end radio frequency interference through a built narrowband filter;
In the aspect of software, the software radio technology is used, two paths of independent short wave radio frequency digital signals after analog-to-digital conversion are processed in a single chip FPGA to replace a traditional superheterodyne analog mixing and analog filtering circuit, digital down conversion and digital filtering are realized, automatic spectral analysis and evaluation of a near-end broadband signal and automatic control of carrier frequency offset of a digital mixer used in analog primary mixer local oscillation frequency and Q paths of digital down conversion are realized, and a short wave receiver can automatically restrain near-end strong interference electromagnetic signals through analog filtering.
In this embodiment, the inverse mixing of the receiver is improved by using the filtering performance of the analog narrowband band-pass filter at the rear end of the mixer, and the distance between the interference sources and the carrier frequency when the index of the desensitization range is measured is reduced, so that the anti-interference capability of the short wave receiver is improved in two aspects.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a short wave receiver with high near-end interference resistance according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
For a better understanding of the technical solution of the present invention, the following detailed description of the embodiments of the present invention refers to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
The invention is described in further detail below with reference to the attached drawings and detailed description:
referring to fig. 1, an embodiment of the present invention provides a short wave receiver with high near-end interference resistance, which includes:
The power divider 10 is configured to receive an input radio frequency signal.
In this embodiment, the power divider 10 is configured to receive an input rf signal, divide the rf signal into two paths, and send the two paths of the rf signal to the hardware circuit I with the wideband rf direct acquisition architecture and the hardware circuit Q based on the first-stage mixing superheterodyne.
The hardware circuit I comprises an analog-digital converter 20 electrically connected with the power divider 10 and an I-path digital down-conversion processing module 30 electrically connected with the analog-digital converter 20.
In the present embodiment, the analog circuit between the power divider 10 and the analog-to-digital converter 20 (ADC) of the hardware circuit I is designed as a broadband radio frequency direct sampling architecture. Wherein, in particular, the analog-to-digital converter 20 is a 16-Bit analog-to-digital converter.
In addition, in order to ensure that the receiver can receive small signals and can receive normally when a large interference source exists, an I-path low-noise fixed gain amplifying circuit 21 and an I-path adjustable attenuator circuit 22 are connected in series between the power divider 10 and the analog-to-digital converter 20 (ADC).
In this embodiment, the I-channel digital down-conversion processing module 30 includes an I-channel radio frequency AGC controller 31, an I-channel down-converter 32, and a near-end width evaluation unit 33, wherein an output end of the analog-to-digital converter 20 is connected to the I-channel radio frequency AGC controller 31 and the I-channel down-converter 32, and an output end of the I-channel radio frequency AGC controller 32 is connected to the I-channel adjustable attenuator 22; the I-channel down-converter 32 is connected to the Q-channel digital down-conversion processing module 60 via the near-end width evaluation unit 33.
The hardware circuit Q based on the first-stage mixing superheterodyne comprises an analog first-stage mixer 40 electrically connected with the power divider 10, an analog narrow-band bandpass filter 50 electrically connected with the analog first-stage mixer 40, and a Q-path digital down-conversion processing module 60 electrically connected with both the analog narrow-band bandpass filter 50 and the analog-to-digital converter 20.
In this embodiment, similarly, the hardware circuit Q further includes a Q-path adjustable attenuator 41 and a first Q-path LNA fixed gain amplifier 42, where the Q-path adjustable attenuator 41 and the first Q-path LNA fixed gain amplifier 42 are connected in series between the power divider 10 and the analog primary mixer 40, and an output terminal of the Q-path digital down-conversion processing module 60 is connected to the first Q-path adjustable attenuator 41.
In this embodiment, the hardware circuit Q further includes a second Q-LNA fixed gain amplifier 43, where an input terminal of the second Q-LNA fixed gain amplifier 43 is connected to the analog narrowband bandpass filter 50, and an output terminal of the second Q-LNA fixed gain amplifier is connected to the analog-to-digital converter 20.
In this embodiment, in particular, the Q-digital down-conversion processing module 60 includes a Q-radio frequency AGC controller 61, a Q-radio frequency down-converter 62, a Q-base band AGC 63, and a frequency offset control unit 64, where an output end of the analog-to-digital converter 20 is connected to the Q-radio frequency AGC controller 61 and the Q-radio frequency down-converter 62, and an output end of the Q-radio frequency AGC controller 61 is connected to the Q-adjustable attenuator 41; the Q-channel down-converter 62 is connected to the audio DAC module 40 through the Q-channel baseband AGC 63, and the near-end width signal evaluation unit 33 is connected to the Q-channel down-converter 62 through the frequency offset control unit 64; the output of the frequency offset control unit 64 is also coupled to the analog primary mixer 40 via a local oscillator circuit 44.
The audio DAC module 70 is electrically connected to the I-path digital down-conversion processing module 30 and the Q-path digital down-conversion processing module 60.
The working principle of the invention is described in detail below:
In this embodiment, the sensitivity of the short wave receiver is related to factors such as the system noise factor of the short wave receiver, the amplification factor of the low noise amplifier, the effective bit number of the analog-to-digital converter, and the like. In order to be able to receive smaller signals, in this embodiment, low noise amplification gain processing is performed separately, so that the design requirement of the receiver sensitivity can be satisfied.
Specifically, in the superheterodyne receiving circuit in the hardware circuit Q, the frequency of the useful signal output by the first Q-path LNA fixed gain amplifier 42 is f s,fs＝fc+fSSB, where f c is the carrier frequency and f SSB is the frequency of the useful signal of the single sideband. The analog primary mixer 40 outputs a fixed frequency f MIX_OUT, the local oscillator frequency of the analog primary mixer 40 is f LO, and the mixer outputs a fixed frequency f MIX_OUT, f LO＝fMIX_OUT+fc.
The center frequency of the analog primary mixer 40 is f MIX_OUT, the passband frequency range is (f MIX_OUT-fBW)≤fMIX_OUT≤(fMIX_OUT+fBW),fBW is half the passband of the narrowband bandpass filter, f BW is selected according to the bandwidth of communication service, such as the bandwidth of useful signal of analog voice communication (3 kHz), when f BW is set to 8kHz, the stop band rejection realized at the interval of 21kHz from the center frequency f MIX_OUT of the analog narrowband bandpass filter is f inhibition of _1, the stop band rejection at the interval of 100kHz from f MIX_OUT is f inhibition of _2, the rejection effect of f inhibition of _2 in the narrowband analog filter with the passband of hundred mega is 40dB higher than the rejection effect of f inhibition of _1.
For a radio frequency direct sampling receiving circuit in the hardware circuit I, the data sampling rate of the analog-to-digital converter 20 is F s, the received I-path short wave radio frequency analog signal is subjected to analog-to-digital conversion, a software radio technology is adopted, a digital frequency synthesizer (DDS) is used for generating orthogonal carrier frequency in an FPGA chip, an analog mixer circuit is replaced, and the hardware design is simplified. After digital multi-stage extraction and multi-stage filtering, the radio frequency signal with the sampling rate of F s (such as F s is 76.8 MSPS) is subjected to down-conversion treatment to convert the baseband data rate into 600KSPS (the corresponding extraction multiple is 76800/600=128), and the useful signal bandwidth is 150kHz.
In the near-end broadband signal evaluation unit 33 in the hardware circuit I, through signal amplitude energy detection within 150kHz in bandwidth and spectrum analysis of FFT, the spectrum characteristics of the electromagnetic signal near the carrier frequency f c are dynamically evaluated in real time, so as to provide a parameter factor for the frequency offset control module in the Q path.
In normal receiving, when the receiver in the hardware circuit Q is in an upper sideband working state, the useful signal is f s＝fc+fUSB,fUSB which is the useful signal frequency of the upper sideband; if the output of the analog primary mixer 40 is a fixed frequency point f MIX_OUT, the corresponding local oscillation frequency is f LO＝fMIX_OUT+fc, the sampling frequency corresponding to the ADC in the hardware circuit Q is (2*F s-fMIX_OUT), the carrier frequency corresponding to the digital lower edge frequency in the Q path is (2*F s-fMIX_OUT -1 kHz), so as to perform signal down-conversion according to the digital down-conversion method of the I path.
In the near-end wideband signal evaluation unit 33 in the hardware circuit I, when the frequency ratio carrier frequency of the strong interference signal is greater than f BW and less than 150kHz, the local oscillator source in the analog primary mixer 40 in the hardware circuit I is modified to be f LO_1＝fMIX_OUT+fc-fmove(kHz),fmove as a moving frequency value, and the precondition is that the strong interference source is far from the center frequency of the narrowband filter by f move (kHz) after the useful signal is moved in frequency and the useful signal frequency output by the analog primary mixer 40 is (f LO_1-(fc+fUSB))＝(fMIX_OUT-fmove(kHz)-fUSB), and the carrier frequency in the corresponding digital down-conversion is (f MIX_OUT-fmove(kHz)-fUSB -1 kHz).
In the frequency offset control unit 64, according to the filtering characteristic of the narrow-band filter used in the hardware circuit Q, on the principle that the corrected local oscillation frequency does not cause attenuation of the useful radio frequency signal, when the center frequency far from the band-pass filter in the transition band is not less than 4kHz, an analog filtering suppression effect of more than 15dB is brought, so that the nearby strong interference source is effectively analog filtered and suppressed; in the Q-channel digital down-conversion process, only the shift of the corresponding digital carrier mixing frequency is modified, and the digital down-conversion process is performed on the useful radio frequency signal by using the digital signal processing technology.
One of the requirements of the desensitization range of the short wave receiver is that the distance between the interference sources and the carrier frequency is not less than 5 percent of the carrier frequency, and the distance between the interference sources and the useful signals is not less than 100 kHz-1500 kHz because the carrier frequency range is 2 MHz-30 MHz; the short wave receiver of the embodiment can meet the requirement that the distance between interference sources and carrier frequencies is uniformly not smaller than 100kHz, and can reach the requirement of the desensitization range of the long and medium short wave receiver.
In summary, in this embodiment, aiming at the disadvantage that the working frequency point of the short-wave receiver is often interfered by the nearby strong interference electromagnetic signal, and the strength of the useful signal is weaker at this time, in order to improve the capability of the short-wave receiver for resisting near-end interference, a new hardware architecture design and corresponding software algorithm processing are performed.
In terms of hardware, a receiving circuit of a radio frequency direct sampling architecture supporting broadband reception and a receiving circuit of a first-stage mixing superheterodyne structure supporting narrowband reception are built in a system, so that a newly built receiver can collect strong interference signals at the near end of a carrier frequency point, provide original data for monitoring near-end electromagnetic signals of a working carrier frequency point in real time, and effectively inhibit near-end radio frequency interference through a built narrowband filter;
in terms of software, the two paths of independent short-wave radio frequency digital signals after analog-to-digital conversion are subjected to software radio technology, a traditional superheterodyne analog mixing and analog filtering circuit is replaced by digital signal processing in a single-chip FPGA, digital down conversion and digital filtering are realized, automatic spectral analysis and evaluation of a near-end broadband signal, and automatic control of carrier frequency offset of a digital mixer used in the process of simulating local oscillation frequency of the primary mixer 40 and Q paths of digital down conversion are realized, so that a short-wave receiver can automatically inhibit near-end strong interference electromagnetic signals through analog filtering.
In this embodiment, the inverse mixing of the receiver is improved by using the filtering performance of the analog narrowband band-pass filter at the rear end of the mixer, and the distance between interference sources and carrier frequencies when the index of the desensitization range is measured is reduced, so that the anti-interference capability of the short wave receiver is improved in two aspects.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A short wave receiver with high near-end interference immunity, comprising:
The power divider is used for receiving an input radio frequency signal;
The hardware circuit I with the broadband radio frequency direct acquisition architecture comprises an analog-to-digital converter electrically connected with the power divider and an I-path digital down-conversion processing module electrically connected with the analog-to-digital converter;
the hardware circuit Q based on the first-stage mixing superheterodyne comprises an analog first-stage mixer electrically connected with the power divider, an analog narrowband band-pass filter electrically connected with the analog first-stage mixer, and a Q-path digital down-conversion processing module electrically connected with both the analog narrowband band-pass filter and the analog-to-digital converter;
and the audio DAC module is electrically connected with the I-path digital down-conversion processing module and the Q-path digital down-conversion processing module.
2. The short wave receiver with high near-end interference resistance according to claim 1, wherein the hardware circuit I further comprises an I-way adjustable attenuator and an I-way LNA fixed gain amplifier, the I-way adjustable attenuator and the I-way LNA fixed gain amplifier are connected in series between the power divider and the analog-to-digital converter, and an output end of the I-way digital down-conversion processing module is connected to the I-way adjustable attenuator.
3. The short wave receiver with high near-end interference resistance according to claim 2, wherein the I-channel digital down-conversion processing module comprises an I-channel radio frequency AGC controller, an I-channel down-converter and a near-end width evaluation unit, wherein an output end of the analog-to-digital converter is respectively connected with the I-channel radio frequency AGC controller and the I-channel down-converter, and an output end of the I-channel radio frequency AGC controller is connected with the I-channel adjustable attenuator; the I-path down converter is connected to the Q-path digital down conversion processing module through the near-end width evaluation unit.
4. A short-wave receiver with high near-end interference resistance according to claim 3,
The hardware circuit Q further comprises a Q-channel adjustable attenuator and a first Q-channel LNA fixed gain amplifier, the Q-channel adjustable attenuator and the first Q-channel LNA fixed gain amplifier are connected in series between the power divider and the analog primary mixer, and the output end of the Q-channel digital down-conversion processing module is connected with the Q-channel adjustable attenuator.
5. The short wave receiver with high near-end interference rejection according to claim 4, wherein said hardware circuit Q further comprises a second Q-LNA fixed gain amplifier having an input connected to an analog narrowband bandpass filter and an output connected to an analog-to-digital converter.
6. The short wave receiver with high near-end interference resistance according to claim 5, wherein the Q-channel digital down-conversion processing module comprises a Q-channel radio frequency AGC controller, a Q-channel down-converter, a Q-channel baseband AGC and a frequency offset control unit, wherein an output end of the analog-to-digital converter is respectively connected with the Q-channel radio frequency AGC controller and the Q-channel down-converter, and an output end of the Q-channel radio frequency AGC controller is connected with the Q-channel adjustable attenuator; the Q-channel down converter is connected to the audio DAC module through the Q-channel baseband AGC, and the near-end width signal evaluation unit is connected to the Q-channel down converter through the frequency offset control unit; the output end of the frequency offset control unit is also connected to the analog primary mixer through a local oscillation circuit.
7. The short wave receiver with high near-end interference rejection according to claim 6, wherein the first Q-path fixed gain amplifier outputs a useful signal having a frequency f s,fs＝fc+fSSB, where f c is a carrier frequency and f SSB is a single sideband useful signal frequency; the output fixed frequency of the analog primary mixer is f MIX_OUT, and the local oscillation frequency of the analog primary mixer is f LO,fLO＝fMIX_OUT+fc;
The center frequency of the analog narrow-band-pass filter is f MIX_OUT, and the passband frequency range of the analog narrow-band-pass filter is [ f MIX_OUT-fBW,fMIX_OUT+fBW],fBW is half of the bandwidth of the analog narrow-band-pass filter.
8. The short wave receiver with high near-end interference rejection capability according to claim 7,
The near-end broadband signal evaluation unit is used for dynamically evaluating the frequency spectrum characteristics of the electromagnetic signal near the carrier frequency f c in real time through signal amplitude energy detection and FFT spectrum analysis within the bandwidth of 150kHz, and providing parameter factors for the frequency offset control module according to the frequency spectrum characteristics of the electromagnetic signal.
9. The short wave receiver with high near-end interference rejection according to claim 8, wherein the useful signal is f s＝fc+fUSB,fUSB which is the upper sideband useful signal frequency when the receiver in the hardware circuit Q is in the upper sideband operational state during normal reception; if the output of the analog primary mixer is a fixed frequency point f MIX_OUT, the corresponding local oscillation frequency is f LO＝fMIX_OUT+fc, and the sampling frequency corresponding to the analog-to-digital converter of the hardware circuit Q is (2*F s-fMIX_OUT), the carrier frequency corresponding to the digital lower side frequency of the hardware circuit Q is (2*F s-fMIX_OUT -1 kHz), so that signal deceleration processing is performed according to the digital down-conversion method of the hardware circuit Q; wherein F s is the data sampling rate of the analog-to-digital converter;
The near-end broadband signal evaluation unit is specifically configured to modify a local oscillator source of a mixer in the hardware circuit Q to be a moving frequency value f LO_1＝fMIX_OUT+fc-fmove,fmove when a frequency ratio carrier frequency of a strong interference signal is greater than f BW and less than 150kHz, and if a precondition is that a useful signal is ensured to fall within a passband of a narrowband filter after frequency movement, a center frequency of the strong interference source from the narrowband filter is far away from fmove, a useful signal frequency output by the mixer is (f LO_1-(fc+fUSB))＝(fMIX_OUT-fmove-fUSB), and a carrier frequency in corresponding digital down-conversion is ((f MIX_OUT-fmove-fUSB) -1 kHz).
10. The short-wave receiver with high near-end interference resistance according to claim 9, wherein the frequency offset control unit is configured to, according to a filtering characteristic of an analog narrowband bandpass filter used in the hardware circuit Q, bring about an analog filtering suppression effect greater than 15dB when a transition band is far from a center frequency of the analog narrowband bandpass filter by not less than 4kHz on a principle that the corrected local oscillation frequency does not cause attenuation of a useful radio frequency signal, thereby effectively analog filtering suppressing a nearby strong interference source; in the Q-channel digital down-conversion process, the useful radio frequency signal is subjected to digital down-conversion by modifying the offset of the corresponding digital carrier mixing frequency.
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