CN118118008A - Digital input circuit with self-checking function and self-checking method of digital input circuit - Google Patents

Digital input circuit with self-checking function and self-checking method of digital input circuit Download PDF

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Publication number
CN118118008A
CN118118008A CN202410304826.0A CN202410304826A CN118118008A CN 118118008 A CN118118008 A CN 118118008A CN 202410304826 A CN202410304826 A CN 202410304826A CN 118118008 A CN118118008 A CN 118118008A
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China
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circuit
voltage
self
operational amplifier
digital input
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CN202410304826.0A
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Inventor
许杰
杨凯
郑萃萃
章洪铨
王淼
祝李静
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Trina Energy Storage Solutions Jiangsu Co Ltd
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Trina Energy Storage Solutions Jiangsu Co Ltd
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Priority to CN202410304826.0A priority Critical patent/CN118118008A/en
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Abstract

The invention provides a digital input circuit with self-checking function and a self-checking method of the digital input circuit, the digital input circuit comprises: a surge protection circuit; the optical coupling isolation circuit comprises an optical coupler and a signal input circuit; the overvoltage protection circuit comprises a first voltage division circuit, a push-pull circuit, a first-order filter circuit and a first switch circuit which are sequentially connected, wherein the other end of the first voltage division circuit is connected with the surge protection circuit, the first switch circuit is connected with the photoelectric coupler in parallel, the first voltage division circuit is used for dividing the input voltage passing through the surge protection circuit to obtain a first voltage, the first voltage flows into the first-order filter circuit through the push-pull circuit, the output end of the first-order filter circuit is connected with the first switch circuit, and the first switch circuit is used for being conducted when detecting that the first voltage is larger than a voltage threshold value, so that the photoelectric coupler is short-circuited.

Description

Digital input circuit with self-checking function and self-checking method of digital input circuit
Technical Field
The invention mainly relates to the technical field of integrated circuits, in particular to a digital input circuit with a self-checking function and a self-checking method of the digital input circuit.
Background
Because the energy storage system is required to bear the influence of electromagnetic interference, electric power, and other factors, the input circuit is easy to be interfered, and the input circuit is easy to be connected with a wrong line in the actual use process, so that the circuit is abnormal. The digital input circuit with the self-checking function provided by the application realizes the voltage and current detection of the power supply of the input end, so that the input end is safer and more reliable.
Disclosure of Invention
The invention aims to provide a digital input circuit with a self-checking function and a self-checking method of the digital input circuit.
In order to solve the above technical problems, the present invention provides a digital input circuit with a self-checking function, including: a surge protection circuit; the optical coupling isolation circuit comprises an optical coupler and a signal input circuit; the overvoltage protection circuit comprises a first voltage division circuit, a push-pull circuit, a first-order filter circuit and a first switch circuit which are sequentially connected, wherein the other end of the first voltage division circuit is connected with the surge protection circuit, the first switch circuit is connected with the photoelectric coupler in parallel, the first voltage division circuit is used for dividing the input voltage passing through the surge protection circuit to obtain a first voltage, the first voltage flows into the first-order filter circuit through the push-pull circuit, the output end of the first-order filter circuit is connected with the first switch circuit, and the first switch circuit is used for being conducted when detecting that the first voltage is larger than a voltage threshold value, so that the photoelectric coupler is short-circuited.
Optionally, the first switching circuit includes an NMOS tube V1, and an output end of the first-order filtering circuit is connected to a gate of the NMOS tube V1.
Optionally, the first voltage dividing circuit includes resistors R14 and R24, the push-pull circuit includes resistor R17, triode V5, triode V6, and the first-order filter circuit includes resistor R2 and capacitor C1; the resistors R14 and R24 divide the input voltage to obtain a first voltage, bases of the triode V5 and the triode V6 are connected with the first voltage, an emitter of the triode V5 is connected with an emitter of the triode V6 and the resistor R2, and the other end of the resistor R2 is connected with the capacitor C1 and a gate of the NMOS V1.
Optionally, the overvoltage protection circuit further includes a bidirectional voltage regulator D2, one end of the bidirectional voltage regulator D2 is connected to the gate of the NMOS tube V1, and the other end is connected to the source of the NMOS tube V1.
Optionally, the device further comprises an overcurrent protection circuit, wherein the overcurrent protection circuit comprises: the circuit comprises a current sampling circuit, a reference voltage circuit, an operational amplifier circuit and a second switch circuit; the second switching circuit comprises a first current switching circuit and a second current switching circuit, the first current switching circuit is connected with the first switching circuit in parallel, and the first current switching circuit is connected with the second current switching circuit and the current sampling circuit in series; the inverting terminal of the operational amplifier circuit is connected with the current sampling circuit, the non-inverting terminal of the operational amplifier circuit is connected with the reference voltage circuit, the output terminal of the operational amplifier circuit is connected with the second current switching circuit, the operational amplifier circuit is used for judging whether the sampling voltage output by the current sampling circuit is higher than the reference voltage provided by the reference voltage circuit, if so, the second current switching circuit is controlled to be disconnected, and the sampling voltage is equal to the input current multiplied by the sampling resistor.
Optionally, the reference voltage circuit includes a first operational amplifier unit, a second operational amplifier unit and a selection unit, where the first operational amplifier unit is configured to calculate a first candidate voltage according to the input voltage, the second operational amplifier unit is configured to calculate a second candidate voltage according to the input voltage, and the selection unit is configured to select a larger one of the first candidate voltage and the second candidate voltage as the reference voltage.
Optionally, the same-phase end of the first operational amplifier unit is connected with a power supply voltage, the opposite-phase end of the first operational amplifier unit is connected with the input voltage, and the output end of the first operational amplifier unit is connected with the selection unit; and the in-phase end of the second operational amplifier unit is connected with the power supply voltage through a second voltage dividing circuit, the opposite-phase end of the second operational amplifier unit is connected with the input voltage, and the output end of the second operational amplifier unit is connected with the selection unit.
Optionally, the first current switching circuit includes resistance R1, resistance R5 and triode V2, the second current switching circuit includes NMOS tube V3, the current sampling circuit includes sampling resistor R10, photoelectric coupler is connected to resistance R1's one end, and the other end is connected triode V2's collecting electrode, triode V2's base is connected resistance R5 with photoelectric coupler's the other end, triode V2's projecting pole is connected NMOS tube V3's drain electrode with resistance R5, NMOS tube V3's grid connection operational amplifier's output, NMOS tube V3's source connection sampling resistor R10, sampling resistor R10's the other end is connected ground.
Optionally, a voltage conversion circuit is further included for converting the input voltage to a constant supply voltage.
Optionally, the voltage conversion circuit includes an NMOS V4, an NPN triode V7, resistors R16, R18, R25, and a zener diode D7, where a drain electrode of the NMOS V4 is connected to the input voltage, a gate electrode of the NMOS V4 is connected to a collector electrode of the triode V7, a source electrode of the NMOS V4 is connected to the resistor R16 and then to the zener diode D7, and another end of the zener diode D7 is connected to a base electrode of the triode V7 and the resistor R25, and an emitter electrode of the triode V7 is grounded.
Optionally, the over-current protection circuit further includes a second-order filter circuit, and the second-order filter circuit is used for reducing noise of an output signal of the operational amplifier circuit.
In order to solve the technical problems, the invention provides a self-checking method of a digital input circuit with a self-checking function, which comprises the following steps: and detecting whether the voltage of the output end of the first-order filter circuit is larger than the voltage threshold value of the first switch circuit, if so, judging that the digital input circuit needs overvoltage protection, and controlling the first switch circuit to be conducted so that the photoelectric coupler is short-circuited.
Optionally, the self-checking method further includes detecting whether the sampling voltage output by the current sampling circuit is higher than the reference voltage provided by the reference voltage circuit, if so, judging that the digital input circuit needs to be over-current protected, and controlling the second current switching circuit to be turned off.
Compared with the prior art, the invention has the following advantages:
According to the digital input circuit with the self-checking function, the first switch circuit is arranged and connected with the photoelectric coupler in parallel, and the first switch circuit is conducted when detecting that the first voltage is larger than the voltage threshold value, so that the photoelectric coupler is short-circuited and cannot output high level, and the MCU control unit judges that DI is not input; and judging whether the input current exceeds the limit or not through the overcurrent protection circuit, if so, disconnecting the second switch circuit, and further, enabling the photoelectric coupler to be incapable of outputting high level, so that the MCU control unit judges that DI is not input.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. In the accompanying drawings:
FIG. 1 is a system block diagram of a digital input circuit with self-test functionality according to one embodiment of the invention.
Fig. 2 is a system block diagram of the digital input circuit with self-test function of the preferred embodiment of fig. 1.
FIG. 3 is a circuit diagram of an embodiment of the digital input circuit with self-test function of FIG. 2.
Detailed Description
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are used in the description of the embodiments will be briefly described below. It is apparent that the drawings in the following description are only some examples or embodiments of the present application, and it is apparent to those of ordinary skill in the art that the present application may be applied to other similar situations according to the drawings without inventive effort. Unless otherwise apparent from the context of the language or otherwise specified, like reference numerals in the figures refer to like structures or operations.
FIG. 1 is a system block diagram of a digital input circuit with self-test functionality according to one embodiment of the invention. As shown in fig. 1, the digital input circuit 100 with self-checking function includes a surge protection circuit 11, an overvoltage protection circuit 12, and an optocoupler isolation circuit 13. The overvoltage protection circuit 12 includes a first voltage dividing circuit 121, a push-pull circuit 122, a first order filter circuit 123, and a first switching circuit 124, which are connected in this order. The optocoupler isolation circuit 13 includes a photocoupler 131 and a signal input circuit 132. The first voltage dividing circuit 121 is connected to the surge protection circuit 11, and the first switching circuit 124 is connected in parallel to the photocoupler 131. The first voltage dividing circuit 121 is configured to divide an input voltage passing through the surge protection circuit to obtain a first voltage, the first voltage flows into the first-order filter circuit 123 through the push-pull circuit 122, an output end of the first-order filter circuit 123 is connected to the first switch circuit 124, and the first switch circuit 124 is configured to be turned on when detecting that the first voltage is greater than a voltage threshold, so that the photocoupler 131 is shorted, and the signal input circuit 132 cannot output a signal.
Fig. 2 is a system block diagram of the digital input circuit with self-test function of the preferred embodiment of fig. 1. As shown in fig. 2, the digital input circuit 200 with self-test function further includes the overcurrent protection circuit 14. The overcurrent protection circuit 14 includes a current sampling circuit 141, a reference voltage circuit 142, an operational amplifier circuit 143, and a second switching circuit 144. The inverting terminal of the operational amplifier circuit 143 is connected with the current sampling circuit 141, the non-inverting terminal of the operational amplifier circuit 143 is connected with the reference voltage circuit 142, and the output terminal of the operational amplifier circuit 143 is connected with the second switch circuit 144. The operational amplifier circuit 143 is configured to determine whether the sampled voltage output by the current sampling circuit 141 is higher than the reference voltage provided by the reference voltage circuit 142, and if so, control the second switch circuit 144 to be turned off, where the sampled voltage is equal to the input current multiplied by the sampling resistor. That is, when the input current is excessive, the second switch circuit 144 is turned off, the photocoupler 131 cannot be turned on, and the signal input circuit 132 cannot output a signal.
FIG. 3 is a circuit diagram of an embodiment of the digital input circuit with self-test function of FIG. 2. As shown in fig. 3, the optocoupler isolation circuit 13 includes an optocoupler U1 and a signal input circuit 132.
When the DI signal is input, the support_pow and the DI signal are shorted, if the DI input current is I, the photo coupler U1 (hereinafter abbreviated as photo coupler U1) is turned on, and the triode on the photo side of the photo coupler is turned on, so that the di_mcu signal is at high level, and R3 and C2 form a first-order low-pass filter circuit. The MCU control unit receives the high level signal and judges that the DI signal is input.
When the SUPPLY_POW and the DI signals are disconnected or not connected, i.e. the DI signal is not input, the optocoupler U1 is not connected, at the moment, the triode on the photosensitive side of the optocoupler is cut off, the DI_MCU signal is low level due to the pull-down resistor R6, and the MCU control unit receives the low level signal to judge that the DI signal is not input.
Optionally, the surge protection circuit includes a first surge protection circuit 111 and a second surge protection circuit 112. The first surge protection circuit 111 includes a varistor R4, a filter capacitor C3, and an anti-reflection diode D1. The second surge protection circuit 112 includes a varistor R15, a filter capacitor C7, and an anti-reflection diode D4. The power supply end and the DI input end of the application are respectively provided with a surge protection circuit for high voltage protection, reverse connection prevention and filtering so as to realize the normal input of the positive and negative ends of the circuit and the enhancement of the anti-interference capability.
As shown in fig. 3, the first voltage dividing circuit 121 includes resistors R14 and R24, the push-pull circuit 122 includes a resistor R17, a transistor V5, and a transistor V6, and the first-order filter circuit includes a resistor R2 and a capacitor C1. The resistors R14 and R24 divide the input voltage to obtain a first voltage U1, bases of the triode V5 and the triode V6 are connected with the first voltage U1, an emitter of the triode V5 is connected with an emitter of the triode V6 and the resistor R2, and the other end of the resistor R2 is connected with the capacitor C1 and a grid electrode of the NMOS tube V1.
When the power SUPPLY input terminals supply_pow and supply_gnd are connected with the power SUPPLY U, the voltage U1 is obtained through the voltage dividing circuit formed by R14 and R24 after passing through the second surge protection circuit 112. U1 outputs a push-pull circuit formed by current limiting resistors R17 to V5 and V6, flows into a first-order filter circuit formed by R2 and C1, and then outputs the first-order filter circuit to the grid electrode of an NMOS tube V1.
When U1> U D, the NMOS tube V1 is conducted; when U1 is less than or equal to U D, the NMOS tube V1 is cut off, wherein U D is the on voltage of the transistor,
In other words, when the input power voltage U is higher, the voltage division U1 is larger, so that V1 is promoted to be turned on, and at this time, the optocoupler U1 is shorted, so that a high level cannot be output, and the MCU control unit determines that DI has no input.
Optionally, the overvoltage protection circuit further includes a bi-directional voltage regulator D2, one end of the bi-directional voltage regulator D2 is connected to the gate of the NMOS tube V1, and the other end is connected to the source of the NMOS tube V1.
As shown in fig. 3, the current sampling circuit includes a sampling resistor R10, and the second switching circuit includes a first current switching circuit 1441 and a second current switching circuit, which in this embodiment is an NMOS tube V3. The first current switching circuit is connected in parallel with 1441NMOS tube V1, and the first current switching circuit 1441 is connected in series with NMOS tube V3 and sampling resistor R10. The first current switching circuit 1441 includes resistance R1, resistance R5 and triode V2, the second current switching circuit includes NMOS pipe V3, the current sampling circuit includes sampling resistor R10, opto-coupler U1 is connected to resistance R1's one end, triode V2's collecting electrode is connected to the other end, triode V2's base connecting resistance R5 and opto-coupler U1's the other end, NMOS pipe V3's drain electrode and resistance R5 are connected to triode V2's projecting pole, operational amplifier circuit AIC's output is connected to NMOS pipe V3's grid, sampling resistor R10 is connected to NMOS pipe V3's source electrode, sampling resistor R10's the other end is connected to ground.
The DI signal is input to the light emitting side of the optocoupler U1 after passing through the piezoresistor R4, the filter capacitor C3 and the anti-reflection diode D1, and is connected to the drain electrode of the NMOS tube V3 through the protection resistor R5. And the gate of the NMOS tube V3 is connected with a current limiting resistor R8. The resistor R10 is used as a sampling resistor of the circuit, the inverting terminal of the operational amplifier A1C is a low level signal at the beginning, the non-inverting terminal of the operational amplifier A1C is a high level signal, U4 is a reference voltage output by the reference voltage circuit 142, and the NMOS transistor V3 is turned on. If a current I flows in the circuit at this time, the sampling voltage u5=i×r10 across the sampling resistor R10.
If U5> U4, the operational amplifier A1C outputs a low level, and the NMOS transistor V3 is turned off. In addition, when the input power supply current I is larger, the current flowing through the optocoupler is increased, the triode V2 is promoted to be conducted, and at the moment, the optocoupler U1 is short-circuited and cannot output a high level, so that the MCU control unit judges that DI is not input.
If U5 is less than or equal to U4, the operational amplifier A1C outputs a high level to enable the NMOS tube V3 to be conducted, at the moment, the optocoupler U1 is conducted, the MCU control unit receives a high level signal, and whether DI signal input exists is judged.
Since current input circuits often need to be compatible with different input voltages, for example, input circuits need to be compatible with high voltage 110V and low voltage 24V. Therefore, the reference voltage of the input op-amp circuit AIC cannot be set to a constant value, and the reference voltage needs to be adjusted according to the input voltage. Alternatively, the reference voltage circuit 142 includes a first operational amplifier unit A1B, a second operational amplifier unit A1D, and a selection unit D5, where the first operational amplifier unit A1B is configured to calculate a first candidate voltage according to an input voltage, the second operational amplifier unit A1D is configured to calculate a second candidate voltage according to the input voltage, and the selection unit D5 is configured to select a larger one of the first candidate voltage and the second candidate voltage as the reference voltage.
As shown in fig. 3, after passing through a first-order filter circuit formed by R20 and C9, the supply voltage VDD is output to the in-phase end of the op-amp A1B to obtain a voltage U2; the other path is divided by resistors R21 and R26 and output to the non-inverting terminal of the operational amplifier A1D to obtain the voltage U3.
Wherein the method comprises the steps ofIt is apparent that U2> U3.
The reverse phase terminating resistor R13, R11 of the operational amplifier A1B is connected to the same phase end of the operational amplifier A1C, the reverse phase terminating resistor R22, R19 of the operational amplifier A1D is also connected to the same phase end of the operational amplifier A1C, the output ends of the operational amplifiers A1B and A1D are connected to the diode D5, and the obtained voltage is U4.
A1B operational amplifier, according to the principle of virtual short and virtual break, A1B operational amplifierObtain/>
A1D operational amplifier, according to the principle of virtual short and virtual break, A1D operational amplifierObtain/>
According to the difference of the input voltage U, different U4 voltage values can be obtained, and because D5 is a homodromous diode, the calculated value U4 of the two operational amplifiers takes the maximum value as the input reference voltage of the operational amplifier A1C.
The reference voltage circuit receives the supply voltage VDD from an external power source or from a voltage conversion circuit inside the digital input circuit. As shown in fig. 3, the digital input circuit further includes a voltage conversion circuit 15. The voltage conversion circuit 15 is configured to convert an input voltage U into a constant power supply voltage VDD. The voltage conversion circuit 15 comprises an NMOS tube V4, an NPN triode V7, resistors R16, R18 and R25 and a zener diode D7, wherein the drain electrode of the NMOS tube V4 is connected with an input voltage, the grid electrode is connected with the collector electrode of the triode V7, the source electrode is connected with the resistor R16 and then is connected with the zener diode D7, the other end of the zener diode D7 is connected with the base electrode of the triode V7 and the resistor R25, and the emitter electrode of the triode V7 is grounded. When the current flowing through D7 becomes large, V7 is turned on, the gate potential of V4 is changed to 0, and V4 is turned on and off, so that the current flowing through D7 becomes small, and the power supply voltage is kept constant at VDD, and C8 is used as a filter capacitor of VDD. According to the application, the constant voltage source circuit is designed, so that the circuit is self-powered, normal operation of internal elements is ensured, resources are saved, the power supply is constant, and the improvement of detection precision is facilitated.
Optionally, the overcurrent protection circuit further includes resistors R9, R10, R7, and capacitors C4, C5 form a second-order low-pass filter circuit, where the second-order low-pass filter circuit is used for noise reduction of an output signal of the operational amplifier circuit.
In summary, the digital input circuit with the self-checking function performs voltage and current detection on the power supply end of the digital input signal, ensures that the power supply input is controlled within a reasonable range, ensures the safety of signal input, realizes internal and external electrical separation through optical coupling isolation of input and output, and ensures that the system circuit design is safer and more reliable. The circuit has expansibility, can be copied into a standard module circuit, and is favorable for popularization and application.
The invention also provides a self-checking method of the digital input circuit with the self-checking function. The self-checking method comprises the following steps: and detecting whether the voltage of the output end of the first-order filter circuit is larger than the voltage threshold value of the first switch circuit, if so, judging that the digital input circuit needs overvoltage protection, and controlling the first switch circuit to be conducted so that the photoelectric coupler is short-circuited.
Optionally, the self-checking method further includes detecting whether the sampling voltage output by the current sampling circuit is higher than the reference voltage provided by the reference voltage circuit, if so, judging that the digital input circuit needs to be over-current protected, and controlling the second current switching circuit to be turned off.
Optionally, the self-checking method further comprises detecting whether the input voltage in the surge protection circuit exceeds the surge voltage, detecting whether the input current in the surge protection circuit exceeds the surge current, and detecting whether the input voltage in the surge protection circuit is reversely connected.
As used in the specification and in the claims, the terms "a," "an," "the," and/or "the" are not specific to a singular, but may include a plurality, unless the context clearly dictates otherwise. In general, the terms "comprises" and "comprising" merely indicate that the steps and elements are explicitly identified, and they do not constitute an exclusive list, as other steps or elements may be included in a method or apparatus.
The relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present application unless it is specifically stated otherwise. Meanwhile, it should be understood that the sizes of the respective parts shown in the drawings are not drawn in actual scale for convenience of description. Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate. In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of the exemplary embodiments may have different values. It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
In addition, the terms "first", "second", etc. are used to define the components, and are only for convenience of distinguishing the corresponding components, and the terms have no special meaning unless otherwise stated, and therefore should not be construed as limiting the scope of the present application. Furthermore, although terms used in the present application are selected from publicly known and commonly used terms, some terms mentioned in the present specification may be selected by the applicant at his or her discretion, the detailed meanings of which are described in relevant parts of the description herein. Furthermore, it is required that the present application is understood, not simply by the actual terms used but by the meaning of each term lying within.
While the basic concepts have been described above, it will be apparent to those skilled in the art that the foregoing disclosure is by way of example only and is not intended to be limiting. Although not explicitly described herein, various modifications, improvements and adaptations of the application may occur to one skilled in the art. Such modifications, improvements, and modifications are intended to be suggested within the present disclosure, and therefore, such modifications, improvements, and adaptations are intended to be within the spirit and scope of the exemplary embodiments of the present disclosure.
Meanwhile, the present application uses specific words to describe embodiments of the present application. Reference to "one embodiment," "an embodiment," and/or "some embodiments" means that a particular feature, structure, or characteristic is associated with at least one embodiment of the application. Thus, it should be emphasized and should be appreciated that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various positions in this specification are not necessarily referring to the same embodiment. Furthermore, certain features, structures, or characteristics of one or more embodiments of the application may be combined as suitable.
Similarly, it should be noted that in order to simplify the description of the present disclosure and thereby aid in understanding one or more inventive embodiments, various features are sometimes grouped together in a single embodiment, figure, or description thereof. This method of disclosure does not imply that the subject application requires more features than are set forth in the claims. Indeed, less than all of the features of a single embodiment disclosed above.
In some embodiments, numbers describing the components, number of attributes are used, it being understood that such numbers being used in the description of embodiments are modified in some examples by the modifier "about," approximately, "or" substantially. Unless otherwise indicated, "about," "approximately," or "substantially" indicate that the number allows for a 20% variation. Accordingly, in some embodiments, numerical parameters set forth in the specification and claims are approximations that may vary depending upon the desired properties sought to be obtained by the individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and employ a method for preserving the general number of digits. Although the numerical ranges and parameters set forth herein are approximations in some embodiments for use in determining the breadth of the range, in particular embodiments, the numerical values set forth herein are as precisely as possible.
While the application has been described with reference to the specific embodiments presently, it will be appreciated by those skilled in the art that the foregoing embodiments are merely illustrative of the application, and various equivalent changes and substitutions may be made without departing from the spirit of the application, and therefore, all changes and modifications to the embodiments are intended to be within the scope of the appended claims.

Claims (13)

1. A digital input circuit with self-test function, comprising:
A surge protection circuit;
The optical coupling isolation circuit comprises an optical coupler and a signal input circuit;
The overvoltage protection circuit comprises a first voltage division circuit, a push-pull circuit, a first-order filter circuit and a first switch circuit which are sequentially connected, wherein the other end of the first voltage division circuit is connected with the surge protection circuit, the first switch circuit is connected with the photoelectric coupler in parallel, the first voltage division circuit is used for dividing the input voltage passing through the surge protection circuit to obtain a first voltage, the first voltage flows into the first-order filter circuit through the push-pull circuit, the output end of the first-order filter circuit is connected with the first switch circuit, and the first switch circuit is used for being conducted when detecting that the first voltage is larger than a voltage threshold value, so that the photoelectric coupler is short-circuited.
2. The digital input circuit with self-checking function according to claim 1, wherein the first switch circuit comprises an NMOS tube V1, and the output end of the first-order filter circuit is connected to the gate of the NMOS tube V1.
3. The digital input circuit with self-checking function according to claim 2, wherein the first voltage dividing circuit comprises resistors R14 and R24, the push-pull circuit comprises a resistor R17, a triode V5, a triode V6, and the first-order filter circuit comprises a resistor R2 and a capacitor C1;
The resistors R14 and R24 divide the input voltage to obtain a first voltage, bases of the triode V5 and the triode V6 are connected with the first voltage, an emitter of the triode V5 is connected with an emitter of the triode V6 and the resistor R2, and the other end of the resistor R2 is connected with the capacitor C1 and a gate of the NMOS V1.
4. The digital input circuit with self-checking function according to claim 2, wherein the overvoltage protection circuit further comprises a bidirectional voltage regulator tube D2, one end of the bidirectional voltage regulator tube D2 is connected to the gate of the NMOS tube V1, and the other end is connected to the source of the NMOS tube V1.
5. The self-test digital input circuit of claim 1, further comprising an over-current protection circuit, the over-current protection circuit comprising: the circuit comprises a current sampling circuit, a reference voltage circuit, an operational amplifier circuit and a second switch circuit;
The second switching circuit comprises a first current switching circuit and a second current switching circuit, the first current switching circuit is connected with the first switching circuit in parallel, and the first current switching circuit is connected with the second current switching circuit and the current sampling circuit in series;
The inverting terminal of the operational amplifier circuit is connected with the current sampling circuit, the non-inverting terminal of the operational amplifier circuit is connected with the reference voltage circuit, the output terminal of the operational amplifier circuit is connected with the second current switching circuit, the operational amplifier circuit is used for judging whether the sampling voltage output by the current sampling circuit is higher than the reference voltage provided by the reference voltage circuit, if so, the second current switching circuit is controlled to be disconnected, and the sampling voltage is equal to the input current multiplied by the sampling resistor.
6. The digital input circuit with self-test function according to claim 5, wherein the reference voltage circuit comprises a first operational amplifier unit for calculating a first candidate voltage from the input voltage, a second operational amplifier unit for calculating a second candidate voltage from the input voltage, and a selection unit for selecting a larger one of the first candidate voltage and the second candidate voltage as the reference voltage.
7. The digital input circuit with self-test function as set forth in claim 6, wherein,
The non-inverting terminal of the first operational amplifier unit is connected with a power supply voltage, the inverting terminal of the first operational amplifier unit is connected with the input voltage, and the output terminal of the first operational amplifier unit is connected with the selection unit;
And the in-phase end of the second operational amplifier unit is connected with the power supply voltage through a second voltage dividing circuit, the opposite-phase end of the second operational amplifier unit is connected with the input voltage, and the output end of the second operational amplifier unit is connected with the selection unit.
8. The digital input circuit with self-checking function according to claim 5, wherein the first current switching circuit comprises a resistor R1, a resistor R5 and a triode V2, the second current switching circuit comprises an NMOS tube V3, the current sampling circuit comprises a sampling resistor R10, one end of the resistor R1 is connected with the photocoupler, the other end is connected with a collector of the triode V2, a base of the triode V2 is connected with the resistor R5 and the other end of the photocoupler, an emitter of the triode V2 is connected with a drain of the NMOS tube V3 and the resistor R5, a gate of the NMOS tube V3 is connected with an output end of the operational amplifier circuit, a source of the NMOS tube V3 is connected with the sampling resistor R10, and the other end of the sampling resistor R10 is connected with the ground.
9. The self-test digital input circuit of claim 5, further comprising a voltage conversion circuit for converting the input voltage to a constant supply voltage.
10. The digital input circuit with self-checking function according to claim 9, wherein the voltage conversion circuit comprises an NMOS V4, an NPN V7, resistors R16, R18, R25 and a zener diode D7, wherein the drain of the NMOS V4 is connected to the input voltage, the gate is connected to the collector of the V7, the source is connected to the resistor R16 and then to the zener diode D7, the other end of the zener diode D7 is connected to the base of the V7 and the resistor R25, and the emitter of the V7 is grounded.
11. The digital input circuit with self-test function as set forth in claim 5, wherein the over-current protection circuit further comprises a second-order filter circuit for noise reduction of the output signal of the op-amp circuit.
12. A self-checking method for a digital input circuit with self-checking function according to any one of claims 1 to 11, comprising:
And detecting whether the voltage of the output end of the first-order filter circuit is larger than the voltage threshold value of the first switch circuit, if so, judging that the digital input circuit needs overvoltage protection, and controlling the first switch circuit to be conducted so that the photoelectric coupler is short-circuited.
13. The self-test method of claim 12, further comprising:
Detecting whether the sampling voltage output by the current sampling circuit is higher than the reference voltage provided by the reference voltage circuit, if so, judging that the digital input circuit needs to be subjected to overcurrent protection, and controlling the second current switching circuit to be disconnected.
CN202410304826.0A 2024-03-18 2024-03-18 Digital input circuit with self-checking function and self-checking method of digital input circuit Pending CN118118008A (en)

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CN202410304826.0A CN118118008A (en) 2024-03-18 2024-03-18 Digital input circuit with self-checking function and self-checking method of digital input circuit

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Application Number Priority Date Filing Date Title
CN202410304826.0A CN118118008A (en) 2024-03-18 2024-03-18 Digital input circuit with self-checking function and self-checking method of digital input circuit

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CN118118008A true CN118118008A (en) 2024-05-31

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