CN118074848A

CN118074848A - Domain controller time synchronization method, device, equipment and storage medium

Info

Publication number: CN118074848A
Application number: CN202410246992.XA
Authority: CN
Inventors: 吴友鹏; 胡鑫; 吴博; 汪余
Original assignee: Chongqing Selis Phoenix Intelligent Innovation Technology Co ltd
Current assignee: Chongqing Selis Phoenix Intelligent Innovation Technology Co ltd
Priority date: 2024-03-05
Filing date: 2024-03-05
Publication date: 2024-05-24

Abstract

The application relates to a time synchronization method, a device, computer equipment and a storage medium of a domain controller, wherein the method is applied to the domain controller with a combined inertial navigation module, and the domain controller comprises a microcontroller, wherein the microcontroller is in communication connection with a real-time clock, an external clock source, at least one system on a chip and at least one sensor; the method comprises the steps that the microcontroller obtains a time value of a real-time clock as a system time initial value of the microcontroller; updating the initial value of the system time based on the driving of the crystal oscillator in the microcontroller to obtain the system time; acquiring a time value provided by an external clock source; obtaining a time difference, synchronizing the system time and the time difference to the system on chip to obtain a management plane time; synchronizing the system time to the sensor and the combined inertial navigation module as a data plane time; the method of the application can solve the problem of time jump of the system in the prior art.

Description

Domain controller time synchronization method, device, equipment and storage medium

Technical Field

The present application relates to the field of vehicle communications technologies, and in particular, to a domain controller time synchronization method, apparatus, computer device, and storage medium.

Background

In intelligent driving, a domain controller is a system for centrally managing and controlling intelligent driving vehicles, and is responsible for coordinating and synchronizing the operation of each component in the vehicles, the intelligent driving vehicles need to acquire and process a large amount of sensor data in real time, and in order to improve the performances of automatic driving such as sensor fusion, decision planning, fusion positioning and the like, the domain controller needs to do time synchronization.

In the current time synchronization scheme, the combined inertial navigation system is used as a domain control time service clock source to synchronize the sensor and the chip, and the method has the advantages of good signal, high time precision in a clear place, uniformity maintenance with the real world and good instantaneity. However, in places with poor signals, such as underground parking garages and tunnels, inaccurate precision and time jump or loss can occur, so that the intelligent driving function is affected.

Disclosure of Invention

Based on the above, a domain controller time synchronization method, a device, a computer device and a storage medium are provided, which solve the problem of system time jump in the prior art.

In one aspect, a method for time synchronization of a domain controller is provided, which is applied to a domain controller with a combined inertial navigation module, wherein the domain controller comprises a microcontroller, and the microcontroller is communicatively connected with a real-time clock, an external clock source, at least one system on a chip and at least one sensor;

the method comprises the following steps:

In response to powering up of the domain controller, the microcontroller acquires a time value of a real-time clock as a system time initial value of the microcontroller;

updating the initial value of the system time based on the driving of the crystal oscillator in the microcontroller to obtain the system time;

The microcontroller acquires a time value provided by the external clock source;

Obtaining a time difference according to the system time and a time value provided by the external clock source;

synchronizing the system time and the time difference to the system on chip to obtain a management plane time;

Synchronizing the system time to the sensor and the combined inertial navigation module as a data plane time.

In one embodiment, before the microcontroller obtains the time value of the real-time clock in response to the power-up of the domain controller, the method further comprises:

and the microcontroller acquires a time value provided by the external clock source and updates the time value of the real-time clock.

In one embodiment, after the microcontroller obtains the time value of the real-time clock, the method further includes:

And periodically updating the time value of the real-time clock according to the time value provided by the external clock source, and updating the time difference according to the time value of the real-time clock.

In one embodiment, the sensor includes a camera module, at least one of the system-on-chip is electrically connected to the camera module;

synchronizing the system time to the sensor and the combined inertial navigation module as a data plane time, comprising:

The system on a chip acquires a pull-up signal of the camera module, wherein the pull-up signal is generated when the camera module is exposed;

The system on chip uses the system time when the pull-up signal is acquired as an exposure time to determine a data time of the camera module.

In one embodiment, the sensor comprises a lidar;

The synchronizing the system time to the sensor and the combined inertial navigation module as data plane time includes:

Based on a generalized accurate clock synchronization protocol, the microcontroller sends the system time to a switch, which forwards the system time to the lidar and the combined inertial navigation module.

In one embodiment, the sensor comprises an ultrasonic radar controller and/or a millimeter wave radar;

based on a controller area network clock synchronization protocol, the microcontroller transmits the system time to the ultrasonic radar controller and/or millimeter wave radar.

In one embodiment, the microcontroller obtains a time value provided by the external clock source, comprising:

The microcontroller acquires world standard time provided by the remote communication terminal to obtain a time difference according to the system time and the world standard time.

In another aspect, a domain controller time synchronization device is provided, and is applied to a domain controller with a combined inertial navigation module, wherein the domain controller comprises a microcontroller, and the microcontroller is communicatively connected with a real-time clock, an external clock source, at least one system on a chip and at least one sensor; the device comprises:

The acquisition module is used for responding to the power-on of the domain controller, acquiring a time value of a real-time clock as a system time initial value of the microcontroller and acquiring a time value provided by the external clock source;

The crystal oscillator driving module is used for updating the initial value of the system time to obtain the system time;

The management plane time synchronization module is used for obtaining a time difference according to the system time and a time value provided by the external clock source, and synchronizing the system time and the time difference to the system on chip so as to obtain management plane time;

And the data plane time synchronization module is used for synchronizing the system time to the sensor and the combined inertial navigation module as data plane time.

In yet another aspect, a computer device is provided comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method when executing the computer program.

There is also provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method.

The domain controller time synchronization method, the device, the computer equipment and the storage medium adopt the microcontroller as a domain control time service clock source, after the initial system time is obtained, the time accumulation is carried out based on the driving of the internal crystal oscillator, the local time synchronized by the microcontroller is used by each sensor, the jump condition is avoided, and the algorithm, the regulation and the positioning related fusion are facilitated.

Drawings

FIG. 1 is a block diagram of a prior art connection of a domain controller to related components;

FIG. 2 is a block diagram showing the connection of a domain controller to related components in one embodiment of the present application;

FIG. 3 is a flow chart of a domain controller time synchronization method in one embodiment;

FIG. 4 is a timing diagram of a combined inertial navigation module in one embodiment;

FIG. 5 is a time synchronization schematic of an ultrasonic radar controller in one embodiment;

FIG. 6 is a schematic diagram of time synchronization of millimeter wave radar in one embodiment;

FIG. 7 is a schematic diagram of time synchronization of a lidar in one embodiment;

FIG. 8 is a timing diagram of a camera module in one embodiment;

FIG. 9 is a communication timing diagram of a real-time clock, a microcontroller, and a system on a chip in one embodiment;

FIG. 10 is a block diagram of a domain controller time synchronization device in one embodiment;

FIG. 11 is an internal block diagram of a computer device in one embodiment.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

At present, an automatic driving system adopts various sensors such as a multi-laser radar, a multi-millimeter wave radar, a multi-camera and the like to realize environment sensing, and the sensors are in delay from data acquisition to processing to sending to the inside of a domain controller, and the time length of the delay is unstable. In order to improve the performance of automatic driving sensor fusion, decision planning, fusion positioning and the like, the domain controller and the associated sensors thereof all need to be time synchronized.

At present, as shown in fig. 1, the scheme based on INS (inertial navigation, inertial navigation System) as a domain control time service clock source is that INS carries out time service on System on Chip (SoC) soc#1, soc#2, microcontroller (Microcontroller Unit, MCU) and the like through an ethernet gPTP protocol, and the sensor is hung down on the MCU, so that the time service is carried out according to the System time of the MCU. However, in places with poor signals, such as underground parking garages and tunnels, problems of inaccurate precision, position jump and the like may occur due to poor navigation signals.

The application provides a time synchronization method of a domain controller, which takes MCU as a time service clock source, and the time is continuously accumulated without jump.

In one embodiment, as shown in fig. 2, a connection block diagram of an MCU and a sensor in the domain controller is shown, the MCU is used as a master clock, and by using an internal crystal oscillator, the time can be accumulated independently, and an external RTC (Real time clock) module is required to be attached to the MCU, so that the external RTC can provide accurate time record, and is not affected by shutdown, reset or power supply interference of the microcontroller. This is important for applications requiring accurate time stamping, and RTCs typically use low power crystal oscillators to keep the time count, without the involvement of a master microcontroller, greatly reducing power consumption.

The MCU is connected with a plurality of sensors through a controller local area network (Controller Area Network, CAN), such as millimeter wave Radar (Radar) in front of and behind a vehicle, an ultrasonic Radar controller (Ultrasonic Sensor System Controller, USSC) and the like, the ultrasonic Radar (Ultrasonic Sensor System) is connected with the USSC and used for sensing obstacle information around the vehicle and outputting the result to the USSC, the USSC is used for outputting the sensing result of the ultrasonic Radar, and data are inserted into the intelligent driving domain controller through the CAN.

Some sensors or socs need to be connected to the MCU in an ethernet manner, specifically, the MCU is connected to a Switch (SW), and the Switch is communicatively connected to soc#1, soc#2, and Lidar (Lidar), and INS is connected to the Switch through a GateWay (GW).

Based on the above connection manner, in this embodiment, two time synchronization manners are adopted: the two synchronization modes of the generalized accurate clock synchronization protocol (GENERAL PRECISE TIME protocol, gPTP) based on the Ethernet and the controller local area network clock synchronization protocol (CanTSync) based on the CAN CAN meet the synchronization requirements of sensors or functional modules under different scenes, and gPTP CAN realize nanosecond time synchronization and support a flexible network topological structure, so that the method is suitable for application with very high time synchronization requirements, and CAN be applied to complex network environments, such as SoCs, lidar and INSs (in the embodiment, the INS adopts a combined inertial navigation module); the CanTSync can be used in the field of automobile electronics and other scenes with low bandwidth and low real-time requirements, has low cost, is relatively simple to implement and configure, is easy to deploy and maintain, is used for scenes with low real-time requirements, and can meet the time synchronization requirements of most common applications, such as Radar and USSC in the embodiment.

In this embodiment, the domain controller time synchronization method is shown in fig. 3, and includes the following steps:

Step 100, in response to the power-up of the domain controller, the microcontroller acquires a time value of the real-time clock as a system time initial value of the microcontroller.

In this embodiment, during the sleep period, the RTC scrolls to update the time value, and after the domain control is powered on, the MCU reads the current time value of the RTC, and uses the current time value as the initialization value of the system time.

Step 200, updating the initial value of the system time based on the driving of the crystal oscillator in the microcontroller to obtain the system time.

The MCU is provided with a crystal oscillator, the crystal oscillator uses the inherent property of the crystal to generate an oscillation signal with a specific frequency, and has high frequency stability, so that an accurate clock signal can be provided.

Step 300, time synchronization is performed based on system time, including data plane time synchronization and management plane time synchronization.

Time synchronization in domain controllers falls into two main categories: the data plane time synchronization and the management plane time synchronization are mainly used for algorithm use, and the time continuity and stability of the algorithm are ensured. In many algorithms, temporal continuity is critical, especially in cases where time series analysis, prediction or backtracking is required. By using the data plane time, the algorithm can operate and calculate on a continuous time axis, and the accuracy and reliability of the result are ensured.

The management plane time is mainly used for time stamping in log records and data storage. In system management and logging, it is often desirable to record the time of occurrence of an event for subsequent tracking and analysis. By time stamping the log and the data storage, the events can be conveniently sequenced, screened and analyzed so as to perform the works of fault detection, performance optimization and the like. In addition, the timestamp may also be used for data backup and recovery to ensure the integrity and consistency of the data, and in this embodiment, the management plane time synchronization includes the management plane time of the MCU and the management plane time of the SoC.

In this embodiment, the process of managing the plane time synchronization includes:

In step 311, the microcontroller obtains a time value provided by an external clock source.

The external clock source is a clock source that the domain controller is connected through a network or hardware, for example, the domain controller may be connected to a public internet time server through the network, and synchronously acquire accurate time, in this embodiment, the external clock source may be a remote communication terminal (TELEMATICS BOX, T-BOX), and the MCU acquires world standard time (Universal Time Coordinated, UTC) from the T-BOX end.

Step 312, obtaining a time difference according to the system time and the time value provided by the external clock source.

Specifically, the MCU obtains the T-BOX time and then calculates the difference value offset with the system time.

Step 313, synchronizing the system time and the time difference to the system on chip to obtain a management plane time.

The MCU sends the system time to each SoC to complete the time synchronization between internal chips, and also sends the offset to the SoC, and the SOC calculates the management plane time = SoC SYSTEM TIME + offset according to the system time SoC SYSTEM TIME in the SOC, and the management plane time is applied to the application layer of the SoC to record log data.

When all time synchronization of the SoC and the MCU is completed, the combined inertial navigation, USSC, radar, lidar, camera (camera module), etc. all need to perform the operation of time synchronization.

The process of data plane time synchronization comprises:

Step 321, synchronizing the system time to the sensor and the combined inertial navigation module as a data plane time.

Wherein, the combined inertial navigation and Lidar all need to carry out time service through gptp.

USSC and Radar time service via CanTSync of the Can bus.

Illustratively, the synchronization process of the INS is illustrated in fig. 4, where the MCU sends the system time to SW, which is forwarded to the INS via gPTP.

As shown in fig. 5, illustrating the time synchronization procedure of USSC, the MCU sends the system time synchronization to USSC through CanTSync, and the USS data is time stamped in the current USSC after being transferred to USSC, where USS may have multiple USSs.

As shown in fig. 6, illustrating the process of time synchronization of Radar, the MCU sends the MCU system time to Radar through CanTSync, and after Radar detects that the clustering of the obstacle information is completed, the current Radar is time-stamped.

As shown in fig. 7, illustrating the time synchronization process of Lidar, the MCU sends the system time to SW through gPTP, the SW forwards to Lidar, and the point cloud data in the laser point cloud and the Lidar frame data are time stamped after time service in the Lidar.

As shown in fig. 8, to illustrate the time synchronization process of Camera, there is no timing module inside Camera, and triggering needs to be performed on SOC, specifically, gpio (General Purpose Input/Output Port) is added to the Camera module and connected to SOC, when exposure is started, the SOC is notified to record the exposure time of the Camera by pulling gpio, and when the first line image data of each frame of Camera reaches SOC, the system timestamp of SOC is marked.

By adopting the time synchronization mode, each sensor adopts the same system time, the system time is accumulated by the MCU according to the internal crystal oscillator, and the local time is used, so that compared with the previous time according to INS, the time synchronization mode is not affected by navigation signal intensity, the time continuity is ensured, jump condition can not occur, and the algorithm, regulation and positioning related fusion is facilitated. On the other hand, decoupling of system time, RTC time and T-BOX time is also realized, and time separation of a data plane and a management plane is realized.

In another embodiment, after power-up, the MCU acquires the time of the T-BOX from the T-BOX terminal, updates the RTC time for the first time, and updates the RTC time periodically afterwards, and the system time of the MCU is updated again after the RTC is updated for the first time, and only once, and then is not updated by the RTC, but uses the crystal oscillator inside the MCU to perform cumulative timing, and the data plane time synchronization is updated periodically as well, so that the timing diagram is shown in fig. 9.

The updating period of the time difference offset is the same as the time signal receiving frequency of the T-box, the system time of the MCU and the plug-in RTC time of the MCU are subjected to difference operation, and the obtained updated offset value is transmitted to each SOC through an application layer.

It should be understood that, although the steps in the flowchart of fig. 3 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in fig. 3 may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, nor do the order in which the sub-steps or stages are performed necessarily performed in sequence, but may be performed alternately or alternately with at least a portion of the sub-steps or stages of other steps or other steps.

In one embodiment, as shown in fig. 10, a domain controller time synchronization device is provided, and is applied to a domain controller with a combined inertial navigation module, wherein the domain controller comprises a microcontroller, and the microcontroller is communicatively connected with a real-time clock, an external clock source, at least one system on a chip and at least one sensor; the device is deployed in a microcontroller, and comprises an acquisition module 1000, a crystal oscillator driving module 2000, a management plane time synchronization module 3000 and a data plane time synchronization module 4000, wherein:

An obtaining module 1000, configured to obtain, in response to power-up of the domain controller, a time value of a real-time clock as a system time initial value of the microcontroller, and obtain a time value provided by the external clock source;

the crystal oscillator driving module 2000 is configured to update the initial value of the system time to obtain the system time;

a management plane time synchronization module 3000, configured to obtain a time difference according to the system time and a time value provided by the external clock source, and synchronize the system time and the time difference to the system on chip to obtain a management plane time;

and the data plane time synchronization module 4000 is used for synchronizing the system time to the sensor and the combined inertial navigation module as data plane time.

The domain controller time synchronization device provided by the application adopts the microcontroller as a domain control time service clock source, and after the initial system time is obtained, the time is accumulated based on the driving of the internal crystal oscillator, and the local time is used, so that the jump condition can not occur, and the algorithm, the regulation and the positioning related fusion are facilitated.

In one embodiment, in the time synchronization apparatus, the obtaining module 1000 further updates the time value of the real-time clock periodically when obtaining the time value provided by the external clock source.

The management plane time synchronization module 3000 calculates a difference value with the system time according to the time value of the periodically updated real-time clock, thereby updating the time difference and synchronizing the updated time difference to each system on chip.

In the time synchronization process of the data surface, the system on a chip acquires a pull-up signal of a camera module, wherein the pull-up signal is generated when the camera module is exposed; the system on chip uses the system time when the pull-up signal is acquired as an exposure time to determine a data time of the camera module.

In addition, in the data plane time synchronization process, based on a generalized accurate clock synchronization protocol, the data plane time synchronization module 4000 transmits the system time to a switch, and the switch forwards the system time to a laser radar and a combined inertial navigation module, wherein the laser radar and the combined inertial navigation module are in communication connection with a microcontroller through an Ethernet; based on the controller area network clock synchronization protocol, the data plane time synchronization module 4000 sends the system time to an ultrasonic radar controller and/or a millimeter wave radar, wherein the ultrasonic radar controller and the millimeter wave radar are in communication connection with a microcontroller through a CAN network.

The external time acquired by the acquisition module 1000 is world standard time, and is provided by a remote communication terminal.

For specific limitations of the domain controller time synchronization device, reference may be made to the above limitation of the domain controller time synchronization method, and no further description is given here. The modules in the domain controller time synchronization device described above may be implemented in whole or in part by software, hardware, or a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a computer device is provided, which may be a terminal, and the internal structure thereof may be as shown in fig. 11. The computer device includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a domain controller time synchronization method of the foregoing embodiments. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, can also be keys, a track ball or a touch pad arranged on the shell of the computer equipment, and can also be an external keyboard, a touch pad or a mouse and the like.

It will be appreciated by those skilled in the art that the structure shown in FIG. 11 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.

In one embodiment, a computer device is provided comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the steps of when executing the computer program:

in response to power-up of the domain controller, the microcontroller acquires a time value of a real-time clock as a system time initial value of the microcontroller;

In one embodiment, the processor when executing the computer program further performs the steps of:

And the microcontroller acquires the time value provided by the external clock source and updates the time value of the real-time clock.

And periodically updating the time value of the real-time clock according to the time value provided by the external clock source so as to update the time difference.

the method comprises the steps that a system on a chip obtains a pull-up signal of the camera module, wherein the pull-up signal is generated when the camera module is exposed;

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:

The microcontroller acquires a time value provided by an external clock source;

Synchronizing the system time and the time difference to a system on chip to obtain a management plane time;

synchronizing the system time to the sensor and combining the inertial navigation module as a data plane time.

In one embodiment, the computer program when executed by the processor further performs the steps of:

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (SYNCHLINK) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims

1. The time synchronization method for the domain controller is characterized by being applied to the domain controller with the combined inertial navigation module, wherein the domain controller comprises a microcontroller, and the microcontroller is in communication connection with a real-time clock, an external clock source, at least one system on chip and at least one sensor;

the method comprises the following steps:

2. The domain controller time synchronization method of claim 1, wherein the microcontroller further comprises, before obtaining the time value of the real-time clock in response to power-up of the domain controller:

3. The domain controller time synchronization method of claim 2, wherein after the microcontroller obtains the time value of the real-time clock, further comprising:

4. The domain controller time synchronization method of claim 1, wherein the sensor comprises a camera module, at least one of the system-on-chip being electrically connected to the camera module;

5. The domain controller time synchronization method of claim 1, wherein the sensor comprises a lidar;

6. The domain controller time synchronization method according to claim 1, wherein the sensor comprises an ultrasonic radar controller and/or a millimeter wave radar;

7. The domain controller time synchronization method of claim 1, wherein the microcontroller obtaining a time value provided by the external clock source comprises:

8. The domain controller time synchronization device is characterized by being applied to a domain controller with a combined inertial navigation module, and comprises a microcontroller, wherein the microcontroller is in communication connection with a real-time clock, an external clock source, at least one system on chip and at least one sensor; the device comprises:

9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any one of claims 1 to 7 when the computer program is executed by the processor.

10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 7.