CN118074667A

CN118074667A - Surface acoustic wave filter and radio frequency front end module

Info

Publication number: CN118074667A
Application number: CN202410472050.3A
Authority: CN
Inventors: 李阳; 杜波; 王华磊; 刘旻俊; 倪建兴
Original assignee: Ruishi Chuangxin Chongqing Technology Co ltd; Radrock Shenzhen Technology Co Ltd
Current assignee: Ruishi Chuangxin Chongqing Technology Co ltd; Radrock Shenzhen Technology Co Ltd
Priority date: 2024-04-19
Filing date: 2024-04-19
Publication date: 2024-05-24

Abstract

The application is suitable for the field of radio frequency filtering, and discloses a surface acoustic wave filter and a radio frequency front end module, wherein the surface acoustic wave filter comprises a piezoelectric substrate, a conductive pattern, a dielectric layer and an accessory circuit, the conductive pattern is formed on the piezoelectric substrate, the conductive pattern comprises a plurality of resonance units and wires, and the resonance units are electrically connected through the wires; the dielectric layer is formed on the piezoelectric substrate and covers the conductive pattern; the auxiliary circuit is used for improving the performance of the surface acoustic wave filter, is formed on the dielectric layer, and is positioned outside the orthographic projection of the resonance unit at least partially along the thickness direction of the piezoelectric substrate; the accessory circuit is electrically connected with the conductive pattern. The surface acoustic wave filter of the embodiment can reduce the packaging size, improve the stability of the characteristic of an accessory circuit, improve the yield, stability and performance of the filter, reduce the space occupied by a packaging substrate and reduce the cost of packaging materials.

Description

Surface acoustic wave filter and radio frequency front end module

Technical Field

The application relates to the technical field of radio frequency filtering, in particular to a surface acoustic wave filter and a radio frequency front end module.

Background

With the development of communication technology, the performance requirements of a Surface Acoustic Wave (SAW) filter are higher and higher, and the performance of the SAW filter is mainly determined by the acoustic resonator/transducer, the circuit layout, the packaging structure and the accessory circuit inside the SAW filter. Among other things, the ancillary circuits are generally used to improve filter performance, such as passband flatness, rectangularity, out-of-band rejection, etc., which include internal ancillary circuits and external ancillary circuits.

The external accessory circuit is usually manufactured by a third party and can be connected to the connection terminal of the filter chip on which the internal accessory circuit is manufactured. The integration of the internal accessory circuit is high compared to the external accessory circuit.

Currently, there are two main ways to manufacture the internal accessory circuit, the first way is to manufacture the internal accessory circuit in the filter in the same plane with the resonator and to perform integral packaging, but this way increases the packaging size. The second mode is to arrange on the substrate, this mode is poor in substrate process accuracy on one hand, and the accessory circuit characteristic is unstable, on the other hand can occupy the space of encapsulation substrate, leads to the substrate layer number to increase, thereby increases the cost.

Disclosure of Invention

In view of the above-mentioned shortcomings of the prior art, an object of the present application is to provide a surface acoustic wave filter and a radio frequency front end module, which aims to reduce the package size, improve the stability of the accessory circuit characteristics, improve the yield, stability and performance of the filter, and reduce the space occupied by the package substrate, thereby reducing the number of substrate layers and reducing the cost of the package material.

To solve the above technical problem, an embodiment of the present application provides a surface acoustic wave filter, including:

A piezoelectric substrate;

the conductive pattern is formed on the piezoelectric substrate and comprises a plurality of resonance units and wires, and the resonance units are electrically connected through the wires;

the dielectric layer is formed on the piezoelectric substrate and covers the conductive pattern;

an auxiliary circuit for improving the performance of the surface acoustic wave filter, the auxiliary circuit being formed on the dielectric layer, and an orthographic projection of the auxiliary circuit being located at least partially outside an orthographic projection of the resonance unit in a thickness direction of the piezoelectric substrate;

the accessory circuit is electrically connected with the conductive pattern.

In some embodiments, the accessory circuit includes an element portion and a connection portion, the element portion being electrically connected to the conductive pattern through the connection portion;

At least one of the orthographic projection of the element portion and the orthographic projection of the connecting portion is located outside the orthographic projection of the resonance unit in the thickness direction of the piezoelectric substrate.

In some embodiments, the resonant unit comprises an interdigital transducer and two reflective gratings positioned on both sides of the interdigital transducer, the reflective gratings having an outer region remote from the interdigital transducer;

The orthographic projection of the element portion is located outside the orthographic projection of the resonance unit, a portion of the orthographic projection of the connecting portion is located outside the orthographic projection of the resonance unit, and another portion of the orthographic projection of the connecting portion extends into at least a portion of the orthographic projection of the outer region.

In some embodiments, the reflective grating includes a plurality of reflective fingers, the plurality of reflective fingers are arranged at intervals along the arrangement direction of the two reflective gratings, and at least ten reflective fingers are spaced between the orthographic projection of the connection portion and the orthographic projection of the interdigital transducer.

In some embodiments, the element portion includes at least one capacitor electrically connected in series or parallel with the conductive pattern and/or at least one inductor electrically connected in series or parallel with the conductive pattern.

In some embodiments, the dielectric layer is provided with an opening through which the connection portion is electrically connected to the conductive pattern.

In some embodiments, the inner diameter of the opening decreases gradually from the dielectric layer toward the piezoelectric substrate.

In some embodiments, the plurality of resonating units includes a first resonating unit and a second resonating unit including any of the resonating units of the plurality of resonating units other than the first resonating unit;

defining the distance between the orthographic projection of the auxiliary circuit and the orthographic projection of the first resonance unit as h1, and defining the distance between the orthographic projection of the auxiliary circuit and the orthographic projection of the second resonance unit as h2, wherein h1 is less than h2 or h1 is more than h2;

The accessory circuit is electrically connected with the first resonance unit in a serial or parallel manner.

In some embodiments, the dielectric layer has a thickness greater than or equal to 100nm.

In some embodiments, the auxiliary circuit at least partially overlaps the trace in a thickness direction of the piezoelectric substrate, and a distance between a portion where the auxiliary circuit and the trace overlap each other is 200 nm or more; and/or the number of the groups of groups,

And the auxiliary circuit is arranged opposite to the piezoelectric substrate along the thickness direction of the piezoelectric substrate, and the distance between the auxiliary circuit and the piezoelectric substrate is greater than or equal to 100nm.

In some embodiments, a space is formed between the orthographic projection of the accessory circuit and the orthographic projection of the resonance unit along the thickness direction of the piezoelectric substrate.

In some embodiments, the distance between the front projection of the accessory circuit and the front projection of the resonant cell is greater than 1 μm.

In some embodiments, the dielectric layer includes a temperature compensation layer, and the accessory circuit is disposed on the temperature compensation layer.

In some embodiments, a side of the dielectric layer remote from the piezoelectric substrate has a planar region on which the accessory circuit is disposed.

In some embodiments, the piezoelectric substrate includes a substrate and a piezoelectric layer disposed on the substrate, the conductive pattern is formed on the piezoelectric layer, and the dielectric layer is formed on the piezoelectric layer.

The embodiment of the application also provides a radio frequency front end module which comprises the surface acoustic wave filter.

The surface acoustic wave filter provided by the application has the following beneficial effects:

According to the surface acoustic wave filter provided by the embodiment of the application, the conductive patterns and the dielectric layers are formed on the piezoelectric substrate, the dielectric layers cover the conductive patterns, and the auxiliary circuits are formed on the dielectric layers instead of the piezoelectric substrate of the filter, so that the packaging size can be reduced, and the complexity and cost of an integrated process can be reduced. Meanwhile, compared with the method that the auxiliary circuit is manufactured on the packaging substrate, the stability of the characteristics of the auxiliary circuit can be improved, so that the yield and stability of the filter are improved, the occupation of the space of the packaging substrate can be reduced, the number of layers of the substrate is reduced, and the cost of packaging materials is reduced.

In addition, in the thickness direction of the piezoelectric substrate, the orthographic projection of the auxiliary circuit is at least partially positioned outside the orthographic projection of the resonant unit, so that more flexible auxiliary circuit layout can be realized, compared with the scheme that the auxiliary circuit is manufactured right above the resonant unit, the influence of the auxiliary circuit on the acoustic performance of the resonant unit can be reduced, the performance of the filter is improved, and meanwhile, the area of the filter chip can be reduced compared with the scheme that the auxiliary circuit is manufactured on the surface of the piezoelectric substrate.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a surface acoustic wave filter according to an embodiment of the present application;

fig. 2 is a schematic diagram of another structure of a surface acoustic wave filter according to an embodiment of the present application;

Fig. 3 is a schematic view of a structure in which a conductive pattern is formed on a piezoelectric substrate in a surface acoustic wave filter according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a structure of the resonant cell of FIG. 3;

Fig. 5 is a schematic diagram of a layout structure of a conductive pattern in a surface acoustic wave filter according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a first layout structure of an accessory circuit connected to a conductive pattern according to an embodiment of the present application;

FIG. 7 is a schematic diagram of a second layout structure of an accessory circuit connected to a conductive pattern according to an embodiment of the present application;

FIG. 8 is a schematic diagram of a third layout structure of an accessory circuit connected to a conductive pattern according to an embodiment of the present application;

FIG. 9 is an enlarged partial schematic view at a in FIG. 8;

FIG. 10 is a schematic diagram of a fourth layout structure of an accessory circuit connected to a conductive pattern according to an embodiment of the present application;

FIG. 11 is an enlarged partial schematic view at b in FIG. 10;

FIG. 12 is a schematic diagram of a fifth layout structure of an accessory circuit connected to a conductive pattern according to an embodiment of the present application;

FIG. 13 is an enlarged partial schematic view of FIG. 12 at c;

FIG. 14 is a schematic diagram of a first circuit for connecting an accessory circuit to a conductive pattern according to an embodiment of the present application;

FIG. 15 is a schematic diagram of a second circuit for connecting an accessory circuit to a conductive pattern according to an embodiment of the present application;

FIG. 16 is a schematic diagram of a third circuit for connecting an accessory circuit to a conductive pattern according to an embodiment of the present application;

FIG. 17 is a fourth schematic circuit diagram of an accessory circuit connected to a conductive pattern according to an embodiment of the present application;

Fig. 18 is a schematic diagram of a fifth circuit for connecting an accessory circuit with a conductive pattern according to an embodiment of the present application.

Reference numerals illustrate:

1. A surface acoustic wave filter; RX, a first terminal; TX, second terminal; an ANT, third terminal; A. an outer region; B. an inner region; 10. a piezoelectric substrate; 11. a substrate; 12. a piezoelectric layer; 20. a conductive pattern; 21. a resonance unit; 211. an interdigital transducer; 2111. a bus bar; 2112. a first finger; 2113. a second finger; 212. a reflective grating; 2121. a reflective finger; 2122. a cross bar; 22. routing; 30. a dielectric layer; 31. opening holes; 32. a temperature compensation layer; 33. a protective layer; 40. an accessory circuit; 41. an element section; 42. a connection part; 421. and (5) a lead wire.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

It should be noted that all directional indicators (such as up, down, left, right, front, and rear … …) in the embodiments of the present application are merely used to explain the relative positional relationship between the components, the movement condition, etc. in a specific posture, and if the specific posture is changed, the directional indicators are correspondingly changed.

It will also be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or be indirectly connected to the other element through intervening elements.

Furthermore, the description of "first," "second," etc. in this disclosure is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present application.

In some related art, the internal accessory circuits are fabricated within the filter, i.e., on the filter chip, specifically on the surface of the piezoelectric substrate of the filter along with the interdigital transducers, and are disposed on the same layer. Internal accessory circuits are fabricated on the piezoelectric substrate of the filter, which increases the package size and only supports electrical connections to adjacent resonators. If the internal accessory circuit is arranged on the packaging substrate of the filter, the electrical performance stability of the accessory circuit is poor due to the limitation of the ceramic substrate process or the PCB substrate process, and the space of the packaging substrate is occupied, so that the number of substrate layers is increased, and the cost is increased.

In view of this, as shown in fig. 1,3 and 5, the embodiment of the present application provides a surface acoustic wave filter 1, which is formed on a dielectric layer 30 by disposing an auxiliary circuit 40 (i.e., the above-mentioned internal auxiliary circuit), and disposed on a thickness direction of a piezoelectric substrate 10, wherein at least a portion of a front projection of the auxiliary circuit 40 is located outside a front projection of a resonance unit 21 in a conductive pattern 20, so that not only a package size can be reduced, but also stability of characteristics of the auxiliary circuit 40 can be improved, a yield and stability of the filter can be improved, occupation of space of a package substrate can be reduced, number of package substrate layers can be reduced, cost of a package material can be reduced, a flexibility in position setting of the auxiliary circuit 40 can be improved, an influence of the auxiliary circuit 40 on acoustic performance of the resonance unit 21 can be reduced, and performance of the filter can be improved.

Some embodiments of the present application are described in detail below with reference to fig. 1 to 18. The following embodiments and features of the embodiments may be combined with each other without collision.

It should be noted that, in the drawings, fig. 1 to fig. 18 are only exemplary, in which fig. 1 and fig. 2 are each exemplary showing a schematic structure of the filter of the present embodiment, fig. 3 and fig. 5 are each exemplary showing a schematic structure layout of the conductive pattern 20 in the filter of the present embodiment, fig. 4 is each exemplary showing a schematic structure of the resonance unit 21 in the filter of the present embodiment, fig. 6 to fig. 8, fig. 10 and fig. 12 are each exemplary showing a schematic structure of the filter of the present embodiment, an auxiliary circuit 40 is connected to the conductive pattern 20, fig. 9, fig. 11 and fig. 13 are each enlarged schematic views of a part of fig. 8, fig. 10 and fig. 12, fig. 14 to fig. 18 are each corresponding to fig. 6 to fig. 8, fig. 10 and fig. 12, respectively, and are each exemplary showing a schematic circuit diagram of connecting the auxiliary circuit 40 to the conductive pattern 20, and the above drawings do not limit the configuration of the filter of the present embodiment, and the drawings may be combined with each other without collision.

As shown in fig. 1 and 5, a surface acoustic wave filter 1 of an embodiment of the present application includes a piezoelectric substrate 10, a conductive pattern 20, a dielectric layer 30, and an accessory circuit 40, the conductive pattern 20 being formed on the piezoelectric substrate 10, the conductive pattern 20 including a plurality of resonance units 21 and wirings 22, the plurality of resonance units 21 being electrically connected by the wirings 22; a dielectric layer 30 formed on the piezoelectric substrate 10 and covering the conductive pattern 20; the auxiliary circuit 40 is used for improving the performance of the surface acoustic wave filter 1, the auxiliary circuit 40 is formed on the dielectric layer 30, and the orthographic projection of the auxiliary circuit 40 is at least partially positioned outside the orthographic projection of the resonance unit 21 along the thickness direction of the piezoelectric substrate 10; the subsidiary circuit 40 is electrically connected to the conductive pattern 20.

In this embodiment, the saw filter 1 is formed on the piezoelectric substrate 10 by disposing the conductive pattern 20 and the dielectric layer 30, and the dielectric layer 30 covers the conductive pattern 20, and disposing the sub-circuit 40 on the dielectric layer 30 instead of disposing the sub-circuit 40 on the piezoelectric substrate 10 of the filter, so that the package size can be reduced, and the complexity and cost of the integrated process can be reduced, and at the same time, compared with the case that the sub-circuit 40 is fabricated on the package substrate, the stability of the electrical performance of the sub-circuit 40 can be improved, so as to improve the uniformity of the sub-circuit 40, thereby improving the yield and stability of the filter, and also reducing the occupation of the space of the package substrate, thereby reducing the number of package substrate layers, and reducing the cost of the package material.

Moreover, in the thickness direction of the piezoelectric substrate 10, the front projection of the auxiliary circuit 40 is at least partially located outside the front projection of the resonance unit 21, and it is understood that the front projection of the resonance unit 21 includes the front projection of the piezoelectric substrate 10 and/or the trace 22, that is, the front projection of the auxiliary circuit 40 is at least the piezoelectric substrate 10 and/or the trace 22 when seen in a top view, that is, when seen from the dielectric layer 30 toward the piezoelectric substrate 10. In this way, a more flexible layout of the auxiliary circuit 40 can be realized, and compared with the scheme of manufacturing the auxiliary circuit 40 directly above the resonance unit 21, the influence of the auxiliary circuit 40 on the acoustic performance of the resonance unit 21 can be reduced, the performance of the filter can be improved, and at the same time, compared with the scheme of manufacturing the auxiliary circuit 40 on the surface of the piezoelectric substrate 10, the area of the filter chip can be reduced. The orthographic projection of the auxiliary circuit 40 is a projection of the auxiliary circuit 40 perpendicular to the surface of the piezoelectric substrate 10, and the orthographic projection of the resonance unit 21 is a projection of the resonance unit 21 perpendicular to the surface of the piezoelectric substrate 10.

Referring to fig. 1 and 5, in some embodiments, the conductive pattern 20 further includes a pad region, which may be connected to the resonance unit 21 through the trace 22, and the orthographic projection of the subsidiary circuit 40 does not overlap with the orthographic projection of the pad region in the thickness direction of the piezoelectric substrate 10, so that the performance of the filter may be improved.

As shown in fig. 1 and 6, in some embodiments, the accessory circuit 40 includes a component part 41 and a connection part 42, the component part 41 being electrically connected with the conductive pattern 20 through the connection part 42; at least one of the orthographic projection of the element portion 41 and the orthographic projection of the connecting portion 42 is located outside the orthographic projection of the resonance unit 21 in the thickness direction of the piezoelectric substrate 10.

In the present embodiment, the element portion 41 is used as a main portion in the auxiliary circuit 40, for example, the element portion 41 may be a core circuit in the auxiliary circuit 40, the filter performance may be improved to some extent, the connection portion 42 functions to conduct the element portion 41 and the conductive pattern 20, and for example, the connection portion 42 may be a lead circuit in the auxiliary circuit 40. In some embodiments, the connection portion 42 includes a lead 421, such as a metal line, for connecting the element portion 41 and the conductive pattern 20.

It will be appreciated that placement of the accessory circuit 40 directly over the resonant cell 21 (including the interdigital transducer 211 and the reflective grating 212) can result in a degradation of the performance of the resonant cell 21. Therefore, in this embodiment, the front projection of the element portion 41 and the front projection of the connection portion 42 may be disposed entirely outside the front projection of the resonance unit 21 in the direction from the dielectric layer 30 to the piezoelectric substrate 10, and the front projection of the element portion 41 and the front projection of the connection portion 42 may not overlap with the front projection of the resonance unit 21; alternatively, one of the front projection of the element portion 41 and the front projection of the connecting portion 42 may be entirely outside the front projection of the resonance unit 21, and the other may be partially outside the front projection of the resonance unit 21, and partially overlap the front projection of the resonance unit 21.

Specifically, in some embodiments, in the thickness direction of the piezoelectric substrate 10, the orthographic projection of the element portion 41 is disposed outside the orthographic projection of the resonance unit 21, a portion of the orthographic projection of the connection portion 42 is disposed outside the orthographic projection of the resonance unit 21, and another portion of the orthographic projection of the connection portion 42 overlaps the orthographic projection of the resonance unit 21. In a specific application, from the dielectric layer 30 toward the piezoelectric substrate 10, the wiring 22 and/or the piezoelectric substrate 10 may be disposed directly under the element portion 41, and the wiring 22 and/or the piezoelectric substrate 10 and a part of the resonance unit 21 may be disposed under the connection portion 42.

In some embodiments, the front projection of the element portion 41 in the thickness direction of the piezoelectric substrate 10 and the front projection of the connection portion 42 in the thickness direction of the piezoelectric substrate 10 are both located outside the front projection of the resonance unit 21 in the thickness direction of the piezoelectric substrate 10, and in specific applications, from the dielectric layer 30 toward the piezoelectric substrate 10, the wiring 22 and/or the piezoelectric substrate 10 may be disposed directly under the element portion 41, while the wiring 22 and/or the piezoelectric substrate 10 may be disposed directly under the connection portion 42, and in this case, the resonance unit 21 is not disposed under both the element portion 41 and the connection portion 42 in the direction from the dielectric layer 30 to the piezoelectric substrate 10. The above arrangement of the element portion 41 and the connection portion 42 in the accessory circuit 40 of the present embodiment can reduce the influence of the accessory circuit 40 on the acoustic performance of the resonance unit 21 to some extent, and can minimize the influence of the accessory circuit 40 on the acoustic performance of the resonance unit 21, compared to the arrangement of the accessory circuit 40 directly above the resonance unit 21.

As shown in fig. 1, 3 and 5, and in combination with fig. 6, 8 and 9, in some embodiments, the resonant cell 21 includes an interdigital transducer 211 and two reflective gratings 212 located on either side of the interdigital transducer 211, the reflective gratings 212 having an outer region a remote from the interdigital transducer 211; the orthographic projection of the element portion 41 is located outside the orthographic projection of the resonance unit 21, and a part of the orthographic projection of the connection portion 42 is located outside the orthographic projection of the resonance unit 21, and another part of the orthographic projection of the connection portion 42 extends into at least a part of the orthographic projection of the outer area a.

In this embodiment, the resonant unit 21 includes an interdigital transducer 211 and two reflective gratings 212 located on both sides of the interdigital transducer 211, and it is understood that in the resonant unit 21, the reflective gratings 212 have limited functions, and the farther the reflective gratings 212 are from the area of the interdigital transducer 211, the weaker the functions or even the functions of the reflective gratings 212 are disabled. If the sub-circuit 40 covers the area on the reflective grating 212 closer to the interdigital transducer 211, the sub-circuit 40 has a greater influence on the performance of the interdigital transducer 211, and particularly if the element portion 41 is provided in the reflective grating 212 area, the acoustic performance of the interdigital transducer 211 is greatly affected, resulting in deterioration of the performance of the interdigital transducer 211. Therefore, in the thickness direction of the piezoelectric substrate 10, the orthographic projection of the element portion 41 may be disposed so as not to overlap with the orthographic projection of the resonant unit 21, for example, the element portion 41 is disposed so as not to cover the trace 22 and/or the piezoelectric substrate 10, and a portion of the orthographic projection of the connection portion 42 is disposed so as not to overlap with the orthographic projection of the resonant unit 21, for example, a portion of the connection portion 42 is disposed so as to cover the trace 22 and/or the piezoelectric substrate 10, while another portion of the orthographic projection of the connection portion 42 is disposed so as to extend into at least a portion of the orthographic projection of the outside area a, for example, another portion of the connection portion 42 is disposed so as to cover a portion or all of the outside area a, whereby reasonable layout of the accessory circuit 40 under a limited filter chip space can be achieved and the influence of the accessory circuit 40 on the acoustic performance of the interdigital transducer 211 can be reduced. In which another portion of the connection portion 42 covers part or all of the outer side region a, it is understood that in the thickness direction of the piezoelectric substrate 10, a portion of the connection portion 42 orthographic projection may pass through the orthographic projection of the outer side region a and intersect or entirely overlap with the orthographic projection of the outer side region a.

In some embodiments, in conjunction with fig. 3 and fig. 6, the front projection of the element portion 41 is located outside the front projection of the interdigital transducer 211 along the thickness direction of the piezoelectric substrate 10, and further, there is a space between the front projection of the element portion 41 and the front projection of the interdigital transducer 211, and it can be understood that, when viewed from the direction of the dielectric layer 30 toward the piezoelectric substrate 10, the projection of the element portion 41 does not overlap with the projection of the interdigital transducer 211, so that the influence of the element portion 41 on the acoustic performance of the interdigital transducer 211 can be effectively reduced, and the performance of the filter can be improved.

In the embodiment where the reflective grating 212 has the outer area a, the reflective grating 212 further has the inner area B near the interdigital transducer 211, and the portion where the front projection of the connection portion 42 is disposed extends into the outer area a, instead of the portion where the front projection of the connection portion 42 is disposed extends into the inner area B, so that the auxiliary circuit 40 can be reasonably arranged under the condition that the space size of the filter chip is limited, the influence of the auxiliary circuit 40 on the acoustic performance of the interdigital transducer 211 is reduced, and the performance degradation of the interdigital transducer 211 is effectively avoided.

The materials of the interdigital transducer 211 and the reflective grating 212 may be a single metal material or a composite or alloy material of different metals, and optionally, the above materials may be one of aluminum, molybdenum, copper, gold, platinum, silver, nickel, chromium, tungsten, etc., or a composite or alloy thereof, etc. The materials of interdigital transducer 211 and reflective grating 212 can be the same or different. The interdigital transducer 211 and the reflective grating 212 may be a single-layer metal film or a laminated metal film in which a plurality of metal layers are laminated. It should be understood that the interdigital transducer 211 may be in the shape of an interdigital transducer 211 in the related art for realizing the acousto-electric transduction, and in combination with fig. 3 and 4, for example, the interdigital transducer 211 includes two bus bars 2111 disposed opposite to each other, and a plurality of first finger bars 2112 and a plurality of second finger bars 2113, the plurality of first finger bars 2112 and the plurality of second finger bars 2113 being alternately arranged in sequence at intervals along the arrangement direction of the two reflection grids 212, the first finger bars 2112 being connected to one of the bus bars 2111, the second finger bars 2113 being connected to the other bus bar 2111.

As shown in fig. 3 and 4, and in conjunction with fig. 8 and 9, in some embodiments, the reflective grating 212 includes a plurality of reflective fingers 2121, the plurality of reflective fingers 2121 being spaced apart along the direction of arrangement of the two reflective gratings 212, at least ten reflective fingers 2121 being spaced apart between the front projection of the connection 42 and the front projection of the interdigital transducer 211.

In the present embodiment, in the thickness direction of the piezoelectric substrate 10, the front projection of the element portion 41 is disposed outside the front projection of the resonance unit 21, and at least ten reflective fingers 2121 are disposed between the front projection of the connection portion 42 and the front projection of the interdigital transducer 211, for example, ten, eleven or twelve or more reflective fingers 2121 are disposed between the front projection of the connection portion 42 and the front projection of the interdigital transducer 211, and the specific number of reflective fingers 2121 are not particularly limited in the present embodiment. In this case, the influence of the auxiliary circuit 40 on the acoustic performance of the interdigital transducer 211 is almost negligible, so that the influence of the auxiliary circuit 40 on the acoustic performance of the resonant unit 21 is reduced, thereby improving the performance of the filter. In some embodiments, the reflective grating 212 further includes two opposite rails 2122, the arrangement direction of the two rails 2122 is perpendicular to the arrangement direction of the two reflective gratings 212, and two ends of the plurality of reflective fingers 2121 are respectively connected to the two rails 2122.

As shown in fig. 1, 6 and 7, in some embodiments, the element portion 41 includes at least one capacitor and/or at least one inductor, the capacitor is electrically connected to the conductive pattern 20 in series or parallel, and the inductor is electrically connected to the conductive pattern 20 in series or parallel. In this embodiment, the element portion 41 may be configured to include one or more capacitors and conduct the capacitors and the conductive patterns 20, or the element portion 41 may be configured to include one or more inductors and conduct the inductors and the conductive patterns 20, or the element portion 41 may be configured to include one or more capacitors and one or more inductors and conduct the capacitors and the inductors respectively with the conductive patterns 20, and the above configuration may be configured to adjust the electrical characteristics of the resonant unit 21, thereby improving the performance of the filter. It should be understood that the number of capacitances and inductances in the element portion 41 is not particularly limited in this embodiment. In some embodiments, the capacitance may be that formed by interdigital transducer 211, and the inductance may be a thin film type inductance, which may be formed by a thin metal film upon fabrication.

As shown in fig. 1 and 6, in some embodiments, the dielectric layer 30 is provided with an opening 31, and the connection portion 42 is electrically connected to the conductive pattern 20 through the opening 31. In this embodiment, the openings 31 are formed in the dielectric layer 30, so that the connection portions 42 and the conductive patterns 20 are conveniently conducted. In some embodiments, the leads 421 in the connection portions 42 may pass through the openings 31 and electrically connect with the conductive patterns 20, thereby eliminating the need to additionally fill the openings 31 with metal to electrically connect the connection portions 42 with the conductive patterns 20 for a specific application. Specifically, when the filter is manufactured, the conductive pattern 20 and the dielectric layer 30 may be manufactured on the piezoelectric substrate 10, then the opening 31 is opened on the dielectric layer 30 for connecting the auxiliary circuit 40 and the conductive pattern 20, and finally the required auxiliary circuit 40 is manufactured on the dielectric layer 30 through photolithography, film plating and other processes.

Referring to fig. 1 and 6, in some embodiments, the inner diameter of the opening 31 gradually decreases from the dielectric layer 30 toward the piezoelectric substrate 10. In this embodiment, the inner sidewall of the opening 31 is inclined, and the connection portion 42 can extend along the inclined direction of the sidewall toward the direction close to the conductive pattern 20, so as to facilitate the conduction between the device portion 41 and the conductive pattern 20. In some embodiments, the connection portion 42 extends on an inner sidewall of the aperture 31, which may support the connection portion 42.

Referring to fig. 1,3 and 5, in some embodiments, the plurality of resonance units 21 includes a first resonance unit and a second resonance unit including any resonance unit 21 other than the first resonance unit among the plurality of resonance units 21; defining a distance between the orthographic projection of the auxiliary circuit 40 and the orthographic projection of the first resonance unit as h1, and defining a distance between the orthographic projection of the auxiliary circuit 40 and the orthographic projection of the second resonance unit as h2, wherein h1 is less than h2 or h1 is more than h2; the accessory circuit 40 is electrically connected in series or parallel with the first resonant cell.

In this embodiment, the front projection of the first resonant cell may be understood as the projection of the first resonant cell perpendicular to the surface of the piezoelectric substrate 10, and the front projection of the second resonant cell may be understood as the projection of the second resonant cell perpendicular to the surface of the piezoelectric substrate 10. In some embodiments, the distance h1 between the front projection of the auxiliary circuit 40 and the front projection of the first resonant unit is smaller than the distance h2 between the front projection of the auxiliary circuit 40 and the front projection of the second resonant unit, in which case the auxiliary circuit 40 may be accessed at a position adjacent to the first resonant unit, in which case the front projection of the auxiliary circuit 40 may not overlap or overlap with the front projection of the resonant unit 21 or abut the front projection of the resonant unit 21, and the electrical properties of the resonant unit 21 may be adjusted, thereby improving the performance of the filter. In other embodiments, the distance h1 between the orthographic projection of the auxiliary circuit 40 and the orthographic projection of the first resonant unit is greater than the distance h2 between the orthographic projection of the auxiliary circuit 40 and the orthographic projection of the second resonant unit, in which case the auxiliary circuit 40 may be accessed at a position far from the first resonant unit, at which time the orthographic projection of the connection portion 42 in the thickness direction of the piezoelectric substrate 10 may pass through the orthographic projection of the reflective grating 212, specifically, the orthographic projection portion of the connection portion 42 may overlap with the orthographic projection of the area a outside the reflective grating 212, and the electrical properties of the resonant unit 21 may be adjusted, thereby improving the performance of the filter.

In some embodiments, as shown in fig. 6 and 14, fig. 14 may be understood as a schematic circuit diagram of a serial connection of an accessory circuit 40 in a filter circuit, in fig. 14, a first terminal RX located at the leftmost side is a receiving end, a second terminal TX located at the rightmost side is a transmitting end, a third terminal ANT between the first terminal RX and the second terminal TX is an antenna end, in conjunction with fig. 6, a plurality of resonant units 21 are disposed between the receiving end and the antenna end and connected by a trace 22, and a plurality of resonant units 21 are also disposed between the transmitting end and the antenna end and connected by a trace 22, and the structure of each resonant unit 21 may be the same or different. Wherein, between the receiving end and the antenna end, two resonance units 21a connected in parallel and a resonance unit 21b with one end grounded are included, one end of the element portion 41 is connected with a common end of the two resonance units 21a through a connection portion 42, the other end of the element portion 41 is connected with the resonance unit 21b through the connection portion 42 to adjust the electrical performance of the resonance unit 21, specifically, the element portion 41 may be a capacitor or an inductor, and the connection portion 42 may be a lead 421.

Fig. 6 illustrates an exemplary layout projection of the conductive pattern 20, and also illustrates the relative positions of the front projection of the accessory circuit 40 and the front projection of the resonant cell 21, in conjunction with fig. 1, without the dielectric layer 30. In this example, to connect the element portion 41 in series in the conductive pattern shown in fig. 6, for example, to connect a capacitor or an inductor in series, it can be seen from fig. 6 that a region where the auxiliary circuit 40 covers is left on one side of the resonant unit 21b, and in this region, the trace 22 occupies most of the area of the piezoelectric substrate 10, so the element portion 41 may be disposed above the trace 22 adjacent to the resonant unit 21b from the dielectric layer 30 toward the piezoelectric substrate 10, the trace 22 is directly under the element portion 41, the trace 22 is partially under the connection portion 42, the trace 22 is partially under the piezoelectric substrate 10, the trace 22 is under the opening 31, and the opening 31 realizes electrical communication above and below the dielectric layer 30, so that the element portion 41 may be electrically connected to the conductive pattern 20 through the connection portion 42.

In some embodiments, as shown in fig. 7 and 15, fig. 15 may be understood as a schematic circuit diagram of the auxiliary circuit 40 connected in parallel in the filter circuit, in fig. 15, the first terminal RX located at the leftmost side is a receiving end, the second terminal TX located at the rightmost side is a transmitting end, the third terminal ANT between the first terminal RX and the second terminal TX is an antenna end, in combination with fig. 7, a plurality of resonant units 21 are disposed between the receiving end and the antenna end and connected by the trace 22, and a plurality of resonant units 21 are also disposed between the transmitting end and the antenna end and connected by the trace 22, and the structure of each resonant unit 21 may be the same or different. Between the receiving end and the antenna end, two resonant units 21a connected in parallel and a resonant unit 21b with one end grounded are included, and the element portion 41 is connected in parallel to the resonant unit 21b to adjust the electrical performance of the resonant unit 21, specifically, the element portion 41 may be a capacitor or an inductor, and the connection portion 42 may be a lead 421.

Fig. 7 illustrates an exemplary layout projection of the conductive pattern 20, and also illustrates the relative positions of the front projection of the accessory circuit 40 and the front projection of the resonant cell 21, in conjunction with fig. 1, without the dielectric layer 30. In this example, in combination with the schematic circuit diagram of fig. 15, the element portion 41 is connected in parallel in the conductive pattern 20 as shown in fig. 7, for example, a capacitor or an inductor is connected in parallel, and as can be seen from fig. 7, a region which can be covered by the auxiliary circuit 40 is left on the side adjacent to the resonant unit 21b, and in this region, the trace 22 occupies most of the area of the piezoelectric substrate 10, so that, from the direction of the dielectric layer 30 toward the piezoelectric substrate 10, the element portion 41 may be disposed above the trace 22 adjacent to the resonant unit 21b, the trace 22 is directly under the element portion 41, the trace 22 is partially under the connecting portion 42, the piezoelectric substrate 10 is partially under the opening 31, and the opening 31 realizes the electrical interconnection above and below the dielectric layer 30, so that the element portion 41 may be electrically connected to the conductive pattern 20 through the connecting portion 42.

In some embodiments, as shown in fig. 8,9 and 16, fig. 16 may be understood as a schematic circuit diagram of a filter circuit in which an accessory circuit 40 is connected in parallel, in fig. 16, a first terminal RX located at the leftmost side is a receiving end, a second terminal TX located at the rightmost side is a transmitting end, a third terminal ANT between the first terminal RX and the second terminal TX is an antenna end, and in connection with fig. 8, a plurality of resonant units 21 are disposed between the receiving end and the antenna end and connected by a trace 22, and a plurality of resonant units 21 are also disposed between the transmitting end and the antenna end and connected by a trace 22, and the structure of each resonant unit 21 may be the same or different. Wherein, between the transmitting end and the antenna end, a plurality of resonance units 21c connected in series between the transmitting end and the antenna end, and a resonance unit 21d having one end connected between the antenna end and the resonance unit 21c, the other end of the resonance unit 21d is grounded, one end of the element portion 41 is connected between the two resonance units 21c connected in series, the other end of the element portion 41 is commonly connected with the resonance unit 21d, specifically, the element portion 41 may be a capacitor or an inductor, and the connection portion 42 may be a lead 421.

Fig. 8 illustrates an exemplary layout projection of the conductive pattern 20, and also illustrates the relative positions of the front projection of the accessory circuit 40 and the front projection of the resonant cell 21, in conjunction with fig. 1, without the dielectric layer 30. This example is to be combined with the schematic circuit diagram of fig. 16, in which the element portion 41 is connected in parallel in the conductive pattern 20 shown in fig. 8, for example, a capacitor or an inductor is connected in parallel, and as can be seen from fig. 8, the resonant unit 21c and the ground port are present around the resonant unit 21d, and it is not suitable to arrange the accessory circuit 40 at a position adjacent to the resonant unit 21 d. From fig. 8, a region, which is left to be covered by the auxiliary circuit 40, is left away from the resonance unit 21d, in which region the trace 22 occupies a part of the surface area of the piezoelectric substrate 10, a part of the piezoelectric substrate 10 may be exposed, and the auxiliary circuit 40 may be disposed on the trace 22 and/or the piezoelectric substrate 10. Specifically, in this example, the direction from the dielectric layer 30 to the piezoelectric substrate 10 is directly below the element portion 41, the trace 22, the piezoelectric substrate 10 and the partial reflective grating 212 are located below the connection portion 42, the portion of the front projection of the connection portion 42 extends toward the direction of the resonant unit 21d and passes through the front projection of the reflective grating 212, more specifically, referring to fig. 8 and 9, the lead 421 on one side of the element portion 41 is below the piezoelectric substrate 10 and the trace 22, the lead 421 on the other side of the element portion 41 is below the piezoelectric substrate and the partial reflective grating 212, the lead 421 has a certain width, the front projection of the lead 421 is stacked on the front projection of the area a outside the reflective grating 212, the trace 22 is below the opening 31, and the opening 31 realizes the electrical interconnection above and below the dielectric layer 30, so that the element portion 41 can be electrically connected to the conductive pattern 20 through the connection portion 42.

It should be appreciated that, in connection with the specific conductive pattern 20 and the corresponding schematic circuit diagram, the connection portion 42 may not pass through the reflective grating 212, for example, the reflective grating 212 may have enough space outside the side far from the interdigital transducer 211, or the space between two adjacent reflective gratings 212 may be enough for the orthographic projection of the connection portion 42 to pass. The connection 42 may also abut the reflective grating 212, in particular the side of the outer region a remote from the interdigital transducer 211.

In some embodiments, as shown in fig. 10, 11 and 17, fig. 17 may be understood as a schematic circuit diagram of the auxiliary circuit 40 connected in series in the filter circuit, in fig. 17, the first terminal RX located at the leftmost side is a receiving end, the second terminal TX located at the rightmost side is a transmitting end, the third terminal ANT between the first terminal RX and the second terminal TX is an antenna end, in conjunction with fig. 10, a plurality of resonant units 21 are disposed between the receiving end and the antenna end and connected by the trace 22, and a plurality of resonant units 21 are also disposed between the transmitting end and the antenna end and connected by the trace 22, and the structure of each resonant unit 21 may be the same or different, which is not limited by this embodiment, and it should be understood that this embodiment does not limit the specific structure of the filter circuit. Wherein, between the transmitting end and the antenna end, a plurality of resonance units 21e connected in series between the transmitting end and the antenna end, and a resonance unit 21f having one end connected between the two resonance units 21e connected in series, the other end of the resonance unit 21f is grounded, the element portion 41 is connected in series with the resonance unit 21f through a connection portion 42, the element portion 41 is connected between the two resonance units 21e connected in series and the resonance unit 21f, specifically, the element portion 41 may be a capacitance or an inductance, and the connection portion 42 may be a lead 421.

Fig. 10 illustrates an exemplary layout projection of the conductive pattern 20, and also illustrates the relative positions of the front projection of the accessory circuit 40 and the front projection of the resonant cell 21, in conjunction with fig. 1, without the dielectric layer 30. In this example, in conjunction with the schematic circuit diagram of fig. 17, an element portion 41 is connected in series in the conductive pattern 20 shown in fig. 10, for example, a capacitor or an inductor is connected in series, and as can be seen from fig. 10, the positions (positions on the right in the drawing) near the two series resonant cells 21e and the resonant cell 21f are relatively narrow, but the orthographic projection of the opening 31 is laminated on the position area, and there is a larger area for covering the auxiliary circuit 40 away from the position area, in which the trace 22 occupies a part of the surface area of the piezoelectric substrate 10, a part of the piezoelectric substrate 10 can be exposed, and the auxiliary circuit 40 can be disposed on the trace 22 and/or the piezoelectric substrate 10. Specifically, in this example, the direction from the dielectric layer 30 to the piezoelectric substrate 10 is directly below the element portion 41, the trace 22, the piezoelectric substrate and the partial reflective grating 212 are located below the connection portion 42, the portion of the front projection of the connection portion 42 extends in the direction close to the front projection of the opening 31 and passes through the front projection of the reflective grating 212, more specifically, the piezoelectric substrate 10 and the trace 22 are located below the lead 421 on one side of the element portion, the piezoelectric substrate 10 and the partial reflective grating 212 are located below the lead 421 on the other side of the element portion 41, the lead 421 has a certain width, the front projection of the lead 421 is stacked on the front projection of the area a outside the reflective grating 212, the trace 22 is located below the opening 31, and the opening 31 realizes electrical communication between the upper and lower sides of the dielectric layer 30, so that the element portion 41 can be electrically connected to the conductive pattern 20 through the connection portion 42.

In some embodiments, the dielectric layer 30 has a thickness greater than or equal to 100nm, in conjunction with fig. 1, to achieve an insulating effect.

Referring to fig. 1, 5 to 9, in some embodiments, along the thickness direction of the piezoelectric substrate 10, the auxiliary circuit 40 at least partially overlaps the trace 22, and a distance between a portion where the auxiliary circuit 40 and the trace 22 overlap each other is 200 nm or more; and/or, the auxiliary circuit 40 is disposed opposite to the piezoelectric substrate 10 in the thickness direction of the piezoelectric substrate 10, and a distance between the auxiliary circuit 40 and the piezoelectric substrate 10 is greater than or equal to 100nm.

In this embodiment, on the one hand, when the dielectric layer 30 is located above the trace 22, a part or all of the auxiliary circuit 40 may be located above the trace 22, and when the part of the auxiliary circuit 40 is located above the trace 22, a part of the auxiliary circuit 40 and the trace 22 overlap each other, a distance between the part of the auxiliary circuit 40 and the trace 22 is greater than or equal to 200 nm, and another part of the auxiliary circuit 40 may be located above the piezoelectric substrate 10, and a distance between the other part of the auxiliary circuit 40 and the piezoelectric substrate 10 may be greater than or equal to 100nm, or greater than or equal to 200 nm. When all of the auxiliary circuit 40 is located above the trace 22, the distance between the auxiliary circuit 40 and the trace 22 is set to be greater than or equal to 200 nm. The above arrangement can achieve a better insulation effect, and effectively reduce the influence of the accessory circuit 40 on the acoustic performance of the resonance unit 21.

On the other hand, when the dielectric layer 30 is arranged in the direction toward the piezoelectric substrate 10, all the auxiliary circuit 40 may be arranged above the piezoelectric substrate 10, and the conductive pattern 20 is not arranged below the auxiliary circuit 40, and at this time, the distance between the auxiliary circuit 40 and the piezoelectric substrate 10 is greater than or equal to 100nm, so that a better insulating effect can be achieved, and the influence of the auxiliary circuit 40 on the acoustic performance of the resonant unit 21 can be effectively reduced.

As shown in fig. 1 and 6, in some embodiments, a space is formed between the orthographic projection of the accessory circuit 40 and the orthographic projection of the resonance unit 21 in the thickness direction of the piezoelectric substrate 10. In this embodiment, the front projection of the auxiliary circuit 40 is not overlapped with the front projection of the resonant unit 21, in this case, the auxiliary circuit 40 may be disposed on the dielectric layer 30 at other positions not covering the resonant unit 21, so as to reduce the influence of the auxiliary circuit 40 on the acoustic performance of the resonant unit 21 and improve the performance of the filter.

In some embodiments, where the front projection of the secondary circuit 40 does not overlap the front projection of the reflective grating 212, it should be appreciated that the secondary circuit 40 front projection is located at least partially outside the front projection of the resonant cell 21, and may include situations where the secondary circuit 40 abuts the reflective grating 212 of the resonant cell 21, particularly in conjunction with fig. 12 and 13, where the secondary circuit 40 abuts the side of the reflective grating 212 remote from the interdigital transducer 211.

As shown in fig. 12, 13 and 18, in some embodiments, a number of accessory circuits 40 may be provided between the critical nodes of the filter circuit to improve the performance of the filter. Fig. 18 is a schematic circuit diagram of the auxiliary circuit 40 connected in series in the filter circuit, in fig. 18, the first terminal RX located at the leftmost side is a receiving end, the second terminal TX located at the rightmost side is a transmitting end, the third terminal ANT between the first terminal RX and the second terminal TX is an antenna end, a plurality of resonant units 21 are disposed between the receiving end and the antenna end and connected by the trace 22, and in combination with fig. 12, a plurality of resonant units 21 are also disposed between the transmitting end and the antenna end and connected by the trace 22, and the structure of each resonant unit 21 may be the same or different. Wherein between the transmitting end and the antenna end, resonance units 21g, 21h, 21i, and 21j connected in series in this order are included, one end of the element portion 41 is connected between the antenna end and a node of the resonance unit 21g, and the other end of the element portion 41 is connected between the resonance unit 21i and a node of the resonance unit 21 j.

Fig. 12 illustrates an exemplary layout projection of the conductive pattern 20, and also illustrates the relative positions of the front projection of the accessory circuit 40 and the front projection of the resonant cell 21, in conjunction with fig. 1, without the dielectric layer 30. In this example, in conjunction with the schematic circuit diagram of fig. 18, the element portion 41 is connected in series in the conductive pattern 20 as shown in fig. 12, for example, a capacitor or an inductor is connected in series, as can be seen from fig. 12, the space position surrounded by the adjacent resonant units 21g, 21h, 21i and 21j is relatively narrow, but the orthographic projection of the opening 31 needs to be laminated on the position area, and a larger area for covering the auxiliary circuit 40 exists in the area away from the position, in which the trace 22 occupies a part of the surface area of the piezoelectric substrate 10, a part of the piezoelectric substrate 10 can be exposed, and the auxiliary circuit 40 can be disposed on the trace 22 and/or the piezoelectric substrate 10. Specifically, in this example, the trace 22 is located directly below the element portion 41 in the direction from the dielectric layer 30 toward the piezoelectric substrate 10, the trace 22, the piezoelectric substrate 10 and the partial reflection grating 212 are located below the connection portion 42, the portion of the connection portion 42 that is forward projected extends in the direction close to the forward projection of the aperture 31 and passes through the forward projection of the reflection grating 212, more specifically, the lead 421 on one side of the element portion 41 is located below the piezoelectric substrate 10 and the trace 22, the lead 421 is located below the other side of the element portion 41 is located below the piezoelectric substrate 10, and the lead 421 has a certain width, the forward projection of the lead 421 is respectively adjacent to the forward projection of the reflection grating 212 of the resonant unit 21g and the forward projection of the reflection grating 212 of the resonant unit 21i, the forward projection of the lead 421 is located on the side of the reflection grating 212 away from the interdigital transducer 211, the trace 22 and the piezoelectric substrate 10 are located below the aperture 31, and the aperture 31 achieves the upper and lower electrical interconnection of the dielectric layer 30, so that the element portion 41 can be electrically connected to the conductive pattern 20 through the connection portion 42.

Referring to fig. 1, 5 and 6, in some embodiments, the distance between the front projection of the auxiliary circuit 40 and the front projection of the resonant unit 21 is greater than 1 μm, which effectively reduces the influence of the auxiliary circuit 40 on the acoustic performance of the resonant unit 21, and improves the performance and stability of the filter.

In some embodiments, the distance between the front projection of the sub-circuit 40 and the front projection of the interdigital transducer 211 is greater than 1 μm along the thickness direction of the piezoelectric substrate 10, which can reduce the influence of the sub-circuit 40 on the acoustic performance of the interdigital transducer 211 and improve the performance and stability of the filter.

As shown in fig. 1 and 2, in some embodiments, dielectric layer 30 includes a temperature compensation layer 32 and an accessory circuit 40 is disposed on temperature compensation layer 32. The temperature compensation layer 32 is provided in this embodiment, which can reduce the frequency shift caused by temperature change, and effectively improve the temperature stability of the filter. The material of the temperature compensation layer 32 may be at least one of silicon oxide, silicon nitride, silicon oxynitride, tellurium dioxide, silicon oxyfluoride, and the like.

As shown in fig. 1 and 2, in some embodiments, the dielectric layer 30 further includes a protective layer 33, and the protective layer 33 covers the temperature compensation layer 32. The protective layer 33 may include at least one of a passivation layer, a frequency modulation layer, and a flying lead layer, and the accessory circuit 40 may cover the passivation layer, the frequency modulation layer, and the flying lead layer when the accessory circuit 40 is disposed on the temperature compensation layer 32. The passivation layer can be made of aluminum nitride, aluminum oxide and the like, and can play a role in protecting the filter from being affected by water vapor and the like. The material of the frequency modulation layer can be silicon nitride, and the frequency modulation layer can protect the filter and can adjust the frequency. The placement of the flying lead layer may be such that the circuit is spatially spanned during fabrication of the accessory circuit 40, and the flying lead layer may be silicon dioxide. In some embodiments, the accessory circuit 40 may be disposed on a multilayer structure formed by stacking at least two of the temperature compensation layer 32, the passivation layer, the frequency modulation layer, and the flying lead layer.

In some embodiments, referring to fig. 1, the side of the dielectric layer 30 away from the piezoelectric substrate 10 has a flat area, which is understood to be a flat surface on the dielectric layer 30, and the auxiliary circuit 40 is disposed on the flat area, so that the auxiliary circuit 40 is manufactured with higher reliability. Preferably, the element portion 41 is provided on the flat region, so that the performance of the accessory circuit 40 can be ensured.

Referring to fig. 1 and2, in some embodiments, a piezoelectric substrate 10 includes a substrate 11 and a piezoelectric layer 12, the piezoelectric layer 12 is disposed on the substrate 11, a conductive pattern 20 is formed on the piezoelectric layer 12, and a dielectric layer 30 is formed on the piezoelectric layer 12. The temperature coefficient of the substrate 11 is smaller than that of the piezoelectric layer 12, so that the performance and stability of the filter can be improved. In embodiments where the dielectric layer 30 includes a temperature compensation layer 32, the temperature compensation layer 32 is laminated on the piezoelectric layer 12.

In some embodiments, and in conjunction with fig. 2, substrate 11 may be monocrystalline silicon, polycrystalline silicon, quartz, glass, or the like.

In some embodiments, the thickness of the substrate 11 is greater than the thickness of the piezoelectric layer 12 to help improve the stability of the piezoelectric substrate 10. Wherein the acoustic speed or impedance of the substrate 11 is higher than the acoustic speed or impedance of the piezoelectric layer 12 to reduce longitudinal leakage of acoustic energy.

In other embodiments, referring to fig. 1 and 2, the piezoelectric substrate 10 may be a piezoelectric layer 12 (piezoelectric substrate), the piezoelectric layer 12 may be a single-layer or multi-layer piezoelectric material, specifically may be aluminum nitride, zinc oxide, lead zirconate titanate (PZT) or rare earth element doped materials with a certain atomic ratio of the foregoing materials, and the piezoelectric layer 12 may be a single-crystal piezoelectric material, for example, single-crystal aluminum nitride, lithium niobate, lithium tantalate, quartz, or the like, which is not limited in this example.

In some embodiments, with reference to fig. 2, an intermediate layer may or may not be present between the substrate 11 and the piezoelectric layer 12, and if present, may be set to a significantly higher or lower impedance than the acoustic impedance of the piezoelectric layer; the intermediate layer may also be provided as a composite layer having alternating high and low acoustic impedance materials that may form an acoustic reflection structure below the piezoelectric layer 12 to reduce longitudinal leakage of acoustic energy. Wherein the longitudinal direction is the thickness direction of the piezoelectric layer 12. In addition, the intermediate layer may be made of a material having temperature compensation characteristics, thereby further improving the temperature compensation effect.

With reference to fig. 1 and 5, the present embodiment further provides a radio frequency front end module, which includes the surface acoustic wave filter 1 in any of the foregoing embodiments. The radio frequency front end module of this embodiment adopts the above-mentioned surface acoustic wave filter 1, both can reduce the encapsulation size, can also improve the stability of accessory circuit 40 characteristic, improves the yield and the stability of filter, simultaneously, also can reduce the occupation to encapsulation base plate space, reduces the encapsulation base plate layer number, reduces the cost of packaging material, in addition, still improves the flexibility ratio that accessory circuit 40's position set up, reduces the influence to resonance unit 21 acoustic performance, improves the filter performance.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the application, and all equivalent structural changes made by the specification and drawings of the present application or direct/indirect application in other related technical fields are included in the scope of the present application.

Claims

1. A surface acoustic wave filter, comprising:

A piezoelectric substrate;

the accessory circuit is electrically connected with the conductive pattern.

2. The surface acoustic wave filter according to claim 1, wherein the accessory circuit includes an element portion and a connection portion, the element portion being electrically connected to the conductive pattern through the connection portion;

3. The surface acoustic wave filter according to claim 2, wherein the resonating unit includes an interdigital transducer and two reflection gratings located on both sides of the interdigital transducer, the reflection gratings having outer regions remote from the interdigital transducer;

4. The surface acoustic wave filter according to claim 3, wherein the reflection grating includes a plurality of reflection fingers arranged at intervals along an arrangement direction of two reflection gratings, and at least ten reflection fingers are spaced between an orthographic projection of the connection portion and an orthographic projection of the interdigital transducer.

5. The surface acoustic wave filter according to any one of claims 2 to 4, wherein the element portion includes at least one capacitor electrically connected in series or parallel with the conductive pattern and/or at least one inductor electrically connected in series or parallel with the conductive pattern.

6. The surface acoustic wave filter according to any one of claims 2 to 4, wherein the dielectric layer is provided with an opening, and the connection portion is electrically connected to the conductive pattern through the opening.

7. The surface acoustic wave filter according to claim 6, wherein an inner diameter of the opening is gradually reduced from the dielectric layer toward the piezoelectric substrate.

8. The surface acoustic wave filter according to claim 3 or 4, wherein the plurality of resonance units includes a first resonance unit and a second resonance unit including any of the resonance units other than the first resonance unit among the plurality of resonance units;

9. The surface acoustic wave filter according to claim 1, wherein the thickness of the dielectric layer is 100nm or more.

10. The surface acoustic wave filter according to claim 9, wherein the sub-circuit is at least partially overlapped with the wiring in a thickness direction of the piezoelectric substrate, and a distance between a portion where the sub-circuit and the wiring overlap with each other is 200 nm or more; and/or the number of the groups of groups,

11. The surface acoustic wave filter according to claim 1, wherein a space is formed between an orthographic projection of the accessory circuit and an orthographic projection of the resonating unit in a thickness direction of the piezoelectric substrate.

12. The surface acoustic wave filter according to claim 11, wherein a distance between an orthographic projection of the accessory circuit and an orthographic projection of the resonating unit is greater than 1 μm.

13. The surface acoustic wave filter of claim 1, wherein the dielectric layer comprises a temperature compensation layer, the accessory circuit being disposed on the temperature compensation layer.

14. The surface acoustic wave filter according to claim 1, wherein a side of the dielectric layer remote from the piezoelectric substrate has a flat region, and the accessory circuit is disposed on the flat region.

15. The surface acoustic wave filter according to claim 1, wherein the piezoelectric substrate includes a substrate and a piezoelectric layer provided on the substrate, the conductive pattern is formed on the piezoelectric layer, and the dielectric layer is formed on the piezoelectric layer.

16. A radio frequency front end module comprising a surface acoustic wave filter as claimed in any one of claims 1 to 15.