CN118041246A - Low-voltage adjustable high-precision oscillator - Google Patents
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Abstract
The invention provides a low-voltage adjustable high-precision oscillator, which comprises: the low-voltage accurate current source receives the power supply voltage and the reference voltage and provides current output and a first reference voltage; the trimming main circuit receives the power supply voltage and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a first current signal; the trimming branch circuit receives the power supply voltage and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a second current signal; and the current chopping oscillation circuit receives the first current signal, the second current signal and the first reference voltage and generates a clock signal. The low-voltage adjustable high-precision oscillator reduces the consumption of one threshold voltage on the premise of not adding a large inductor, so that the low-voltage adjustable high-precision oscillator can still provide an adjustment function under the application of lower voltage; the chopper structure is added, and the precision of the system is far higher than that of a traditional RC oscillator under low pressure.
Description
Technical Field
The invention relates to the field of integrated circuit design, in particular to a low-voltage adjustable high-precision oscillator.
Background
An oscillator, which is a clock signal circuit, is an important component of many electronic systems. With the rapid development of integrated circuits, oscillators play an extremely important role in digital and digital-analog hybrid integrated circuits, and thus, a highly stable and highly accurate, integratable oscillator is required. The oscillator can generate a periodic signal by means of self-oscillation of a circuit only under the condition of no external input signal. In CMOS (Complementary Metal Oxide Semiconductor ) technology, fully integrated oscillators can be divided into three main classes: ring oscillators, LC oscillators and RC oscillators, but have the following disadvantages:
(1) The ring oscillator is usually implemented by adopting a plurality of cascaded inverter structures to form a positive feedback loop. Its outstanding advantages are easy integration and wide tuning range, however its disadvantages are also apparent: the phase noise performance is poor, the method is generally not suitable for application with high requirements on time, and when an operational amplifier is adopted to form a ring oscillator, the power consumption and the area consumption of the operational amplifier are large.
(2) LC oscillators employ passive inductors and capacitors. This type of circuit provides better phase noise performance and has a certain attraction in terms of low power design, but introduces a large inductance into the circuit, which is disadvantageous for on-chip integration.
(3) The frequency of the RC oscillator is greatly changed along with the manufacturing process, the power supply voltage and the ambient temperature, the offset voltage, the delay and the resistance of the comparator are changed, burrs or clutters are generated by clock coupling, temperature drift and the like, the clock frequency is shifted under the common influence of the factors, and the stability of the clock is poor and cannot meet the requirements of a chip on the high precision, the high stability and the low power supply voltage of the clock signal.
Referring to fig. 1, a conventional RC oscillator without trimming mainly comprises an RC charge-discharge network, a comparator and a logic circuit. RC charge current I ref is typically replicated by a current mirror, one path through resistor R to generate reference voltage V r connected to the negative input of the comparator; the other current charges the capacitor C with constant current to generate a slope voltage V e which is connected to the input of the positive end of the comparator. When the slope voltage V e is larger than the reference voltage V r, the comparator turns over, and when a clock signal of the square wave clock signal F out.Fout generated by the subsequent logic circuit is at a high level, the switch is closed, and the charge of the capacitor is discharged to the ground; when the F out clock signal is at a low level, the switch is turned off, the capacitor is charged, and the stable square wave clock signal can be generated by repeating the above steps.
Ideally, the clock period is calculated as formula (1) and formula (2):
(1)
(2)
Wherein, R is a resistance value, C is a capacitance value,/>, for an oscillation periodIs the voltage across the capacitor.
However, the non-ideal factor can cause the clock period to deviate from the reference value of the RC, and the non-trimming RC oscillator circuit is affected by temperature, voltage and noise, so that the clock frequency is offset, and the stability of the clock is poor.
Referring to fig. 2, a current source of a conventional tunable RC oscillator is shown, in which the voltage drop from power to ground is equal to the power supply voltage, as shown in equation (3):
VDD=VR+2Vdsat+VTHP(3)
The voltage drop V R is the voltage drop on the tail resistor, vd sat is the saturation voltage drop of the PMOS transistor, V THP is the threshold voltage of the PMOS transistor, and the voltage drop V R on the resistor needs to be within the input range of the op-amp, so that the conventional tunable RC oscillator cannot work at a low voltage of 0.9V, which makes the oscillator difficult to apply at a low voltage.
Disclosure of Invention
Aiming at the problems in the prior art, the low-voltage adjustable high-precision oscillator is provided, and the adjustable RC oscillator can be realized at a low voltage of below 1V.
The technical scheme adopted by the invention is as follows: a low voltage tunable high precision oscillator comprising:
The low-voltage accurate current source receives the power supply voltage and the reference voltage and provides current output and a first reference voltage;
The trimming main circuit receives the power supply voltage and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a first current signal;
The trimming branch circuit receives the power supply voltage and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a second current signal; and
The current chopper oscillation circuit receives the first current signal, the second current signal and the first reference voltage and generates a clock signal.
Further, the low-voltage accurate current source comprises a first MOS tube, a second MOS tube, a third MOS tube, an error amplifier, a first resistor, a second resistor and a frequency compensation capacitor; wherein,
The first end of the first MOS tube receives the power supply voltage, the control end of the first MOS tube is grounded, the second end of the first MOS tube is connected to the first end of the second MOS tube, the second end of the second MOS tube is connected to the first end of the third MOS tube, and the second end of the third MOS tube is grounded after being serially connected with the first resistor and the second resistor in sequence; a first reference voltage is led out between the second end of the second MOS tube and the first end of the third MOS tube; the inverting input end of the error amplifier is connected to the second end of the second MOS tube and receives the first reference voltage, the non-inverting input end of the error amplifier receives the external reference voltage, and the output end of the error amplifier is connected to the control end of the third MOS tube; the first end of the frequency compensation capacitor is connected to the second end of the second MOS tube, and the second end of the frequency compensation capacitor is connected to a common node of the first resistor and the second resistor; and a bias voltage is led out from a common node of the second end of the third MOS tube and the first resistor and is connected to the control end of the second MOS tube in a pressing mode, so that the second MOS tube generates stable current.
Further, the trimming main circuit comprises 1 normally-on branch and n+1 identical trimmable branches; the normally-on branch comprises a fourth MOS tube and a fifth MOS tube, and each adjustable branch comprises a sixth MOS tube and a seventh MOS tube; in the normally-on branch, the first end of the fourth MOS tube receives the power supply voltage, the second end of the fourth MOS tube is connected to the first end of the fifth MOS tube, the control end of the fourth MOS tube is connected to the ground, the control end of the fifth MOS tube is connected to the control end of the third MOS tube in the low-voltage accurate current source, and the supplied current is copied; in the n+1 adjustable branches, a first end of a sixth MOS tube receives a power supply voltage, a second end of the sixth MOS tube is connected to a first end of a seventh MOS tube, a control end of the sixth MOS tube receives an external codeword control signal, and a control end of the seventh MOS tube is connected to a control end of a third MOS tube in a low-voltage accurate current source and replicates supplied current; the second end of the fifth MOS tube in the normally-on branch is connected with the second end of the seventh MOS tube in the N+1 adjustable branch, and then a first current signal is output; wherein N is a natural number greater than 1.
Further, the trimming branch circuit and the trimming branch circuit have the same composition, receive the same external codeword control signal, copy the current provided by the low-voltage accurate current source, and output a second current signal.
Further, the current chopping oscillation circuit includes:
The current chopping module receives the first current signal and the second current signal, and performs chopping processing on the first current signal and the second current signal according to the control of the first chopping control signal and the second chopping control signal to generate a first chopping current and a second chopping current;
the oscillation generation module receives the first chopping current and the second chopping current, is controlled by a clock signal CLK, an inverted clock signal CLKN and a first reference voltage, and generates an oscillation clock signal; and
The clock output module receives the oscillation clock signal and outputs a first chopping control signal, a second chopping control signal, an inverted clock signal CLKN and a clock signal CLK.
Further, the current chopping module comprises a first chopping switch, a second chopping switch, a third chopping switch and a fourth chopping switch; wherein,
First ends of the first chopping switch and the second chopping switch receive a first current signal, and first ends of the third chopping switch and the fourth chopping switch receive a second current signal; the second end of the first chopping switch is connected with the second end of the third chopping switch to output first chopping current, and the second end of the second chopping switch is connected with the second end of the fourth chopping switch to output second chopping current; the control ends of the first chopping switch and the fourth chopping switch receive a first chopping control signal, and the control ends of the second chopping switch and the third chopping switch receive a second chopping control signal.
Further, the oscillation generating module comprises an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a first capacitor, a second capacitor, a first comparator, a second comparator, a first nor gate and a second nor gate; wherein,
The first end of the eighth MOS tube receives the first chopping current, the second end of the eighth MOS tube is connected to the first end of the ninth MOS tube, the second end of the ninth MOS tube is connected to the ground, and the control ends of the eighth MOS tube and the ninth MOS tube receive the clock signal CLK; the first end of the tenth MOS tube receives the second chopping current, the second end of the tenth MOS tube is connected to the first end of the eleventh MOS tube, the second end of the eleventh MOS tube is connected to the ground, and the control ends of the tenth MOS tube and the eleventh MOS tube receive the inverted clock signal CLKN;
The first input end of the first comparator receives a first reference voltage, the second input end of the first comparator is connected to a common node of the eighth MOS tube and the ninth MOS tube, and the output end of the first comparator is connected to the first input end of the first NOR gate;
the first input end of the second comparator is connected to a common node of the tenth MOS tube and the eleventh MOS tube, the second input end of the second comparator receives the first reference voltage, and the output end of the second comparator is connected to the second input end of the second NOR gate;
The first end of the first capacitor is connected to the first input end of the second comparator, and the second end of the first capacitor is grounded; the first end of the second capacitor is connected to the second input end of the first comparator, and the second end of the second capacitor is grounded;
the second input end of the first NOR gate is connected to the output end of the second NOR gate, the first input end of the second NOR gate is connected to the output end of the first NOR gate, and the output end of the first NOR gate outputs oscillating current.
Further, the clock output module comprises a chopping clock generating module, a first NOT gate and a second NOT gate, wherein the chopping clock generating module comprises an input end, a first output end, a second output end and a third output end, the input end receives oscillating current, the first output end outputs a first chopping control signal, the second output end outputs a second chopping control signal, and the third output end is connected with the first NOT gate and the second NOT gate in series in sequence and is used for outputting a clock signal CLK; the output of the first NOT outputs the inverted clock signal CLKN and the output of the second NOT outputs the clock signal CLK.
Further, the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor, the sixth MOS transistor, and the seventh MOS transistor are PMOS transistors, and the first end, the second end, and the control end of the PMOS transistors correspond to the source, the drain, and the gate, respectively.
Further, the eighth MOS transistor and the tenth MOS transistor are PMOS transistors, and the first end, the second end and the control end thereof correspond to the source electrode, the drain electrode and the gate electrode respectively; the ninth MOS tube and the eleventh MOS tube are NMOS tubes, and the first end, the second end and the control end of the ninth MOS tube respectively correspond to the drain electrode, the source electrode and the grid electrode.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows: the invention adopts a novel topological structure to provide a high-precision adjustable oscillator for an on-chip integrated circuit on the premise of not adding a large inductance. Because the novel low-voltage reference current generating structure reduces the consumption of a threshold voltage, the trimming function can be provided under the application of lower voltage; and the current chopping structure in the oscillator is added at the output of the current source, so that current imbalance caused by process mismatch can be eliminated in low-voltage application, a low-imbalance current source is provided for the oscillator, and frequency fluctuation caused by imbalance can be reduced. The adjustable high-precision oscillator provided by the invention provides a system with precision far higher than that of a traditional RC oscillator under low pressure.
Drawings
Fig. 1 is a schematic diagram of a conventional RC oscillator.
FIG. 2 is a schematic diagram of a conventional tunable RC oscillator current source.
Fig. 3 is a schematic diagram of a low-voltage tunable high-precision oscillator according to the present invention.
Fig. 4 is a schematic diagram of a current source of a low-voltage tunable high-precision oscillator according to the present invention.
Fig. 5 is a schematic diagram of a current chopper oscillator of the low-voltage tunable high-precision oscillator according to the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar modules or modules having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention. On the contrary, the embodiments of the invention include all alternatives, modifications and equivalents as may be included within the spirit and scope of the appended claims.
In order to realize the high-precision oscillator on the inductance-free chip, the embodiment provides the adjustable RC oscillator, so that the consumption of a threshold voltage is reduced on the basis of the traditional adjustable RC oscillator, and the low-voltage adjustment can be realized in a low-voltage scene below 1V.
Referring to fig. 3, the low-voltage tunable high-precision oscillator includes a low-voltage precise current source, a tuning main current, a tuning branch current, and a current chopping oscillation circuit. Specifically:
The low-voltage accurate current source receives the power supply voltage VDD and the external reference voltage Vref and provides current output and a first reference voltage VFB; compared with the traditional structure, the low-voltage accurate current source reduces the threshold voltage loss of a PMOS tube, so that high-precision current output can be provided under the condition of low power supply voltage VDD.
The trimming main circuit receives a power supply voltage VDD and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a first current signal Ic1;
the trimming branch circuit receives the power supply voltage VDD and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a second current signal Ic2;
The trimming main circuit and the trimming branch circuit form a trimming current source group, the current source frequency of the trimming current source group can be programmed after the chip is manufactured through digital trimming, the reliability of the oscillator is improved, and meanwhile, current is provided for a later-stage oscillator.
The current chopper oscillation circuit receives the first current signal Ic1, the second current signal Ic2 and the first reference voltage VFB, and generates a clock signal.
Referring to fig. 4, this embodiment proposes a specific example of a low-voltage accurate current source.
The low-voltage accurate current source comprises a first MOS tube PM1, a second MOS tube PM2, a third MOS tube PM3, an error amplifier, a first resistor R1, a second resistor R2 and a frequency compensation capacitor C3;
the first end of the first MOS tube PM1 receives the power supply voltage VDD, the control end of the first MOS tube PM1 is grounded, the second end of the first MOS tube PM1 is connected to the first end of the second MOS tube PM2, the second end of the second MOS tube PM2 is connected to the first end of the third MOS tube PM3, and the second end of the third MOS tube PM3 is grounded after being serially connected with the first resistor R1 and the second resistor R2 in sequence; a first reference voltage VFB is led out between the second end of the second MOS tube PM2 and the first end of the third MOS tube PM 3; the inverting input end of the error amplifier is connected to the second end of the second MOS tube PM2 and receives the first reference voltage VFB, the non-inverting input end of the error amplifier receives the external reference voltage Vref, and the output end of the error amplifier is connected to the control end of the third MOS tube PM 3; the first end of the frequency compensation capacitor C3 is connected to the second end of the second MOS tube PM2, and the second end of the frequency compensation capacitor C3 is connected to a common node of the first resistor R1 and the second resistor R2; and a bias voltage VBP is led out from a common node of the second end of the third MOS tube and the first resistor and is connected to the control end of the second MOS tube PM2, so that the second MOS tube PM2 generates stable current.
The current source circuit adopted by the traditional relaxation oscillator capable of being trimmed has fixed voltage drop of V R+2Vdsat+VTHP due to structural limitation, and the gate drain voltage of the tail current PMOS tube is changed along with temperature, so that the copied current has larger temperature drift. In the low-voltage accurate current source provided in this embodiment, a PMOS source follower is adopted, and the drain voltage of the tail current tube PM2 is made to follow the reference voltage Vref (the voltage is a zero temperature drift reference voltage from the bandgap reference source) through negative feedback, and meanwhile, the gate of PM2 is connected to the drain of PM3 through a low-voltage cascode connection method. The voltage drop from the power supply to ground at this point is shown in equation (4):
VDD≈VR+2Vdsat(4)
Wherein V R is the voltage drop on the resistor, vd sat is the saturation voltage of PM2 and PM3, so that the voltage drop of a threshold voltage is saved, and meanwhile, the current with lower temperature drift is obtained.
With continued reference to fig. 4, the trimming main circuit includes 1 normally-on branch and n+1 identical trimmable branches; the normally-on branch comprises a fourth MOS tube PM4 and a fifth MOS tube PM5, and each adjustable branch comprises a sixth MOS tube PM6 and a seventh MOS tube PM7; in the normally-on branch, a first end of a fourth MOS tube PM4 receives a power supply voltage, a second end of the fourth MOS tube PM4 is connected to a first end of a fifth MOS tube PM5, a control end of the fourth MOS tube PM4 is grounded, a control end of the fifth MOS tube PM5 is connected to a control end of a third MOS tube PM3 in a low-voltage accurate current source, and provided current is copied; in the n+1 tunable branches, a first end of a sixth MOS tube PM6 receives a power supply voltage, a second end of the sixth MOS tube PM6 is connected to a first end of a seventh MOS tube PM7, a control end of the sixth MOS tube PM6 receives an external codeword control signal, and a control end of the seventh MOS tube PM7 is connected to a control end of a third MOS tube PM3 in the low-voltage accurate current source, and the supplied current is replicated; the second end of the fifth MOS tube PM5 in the normally-on branch is connected with the second end of the seventh MOS tube PM7 in the N+1 adjustable branch, and then a first current signal Ic1 is output; wherein N is a natural number greater than 1.
In the trimming main circuit, the sixth MOS tube PM6 of each N+1 control branch circuits receives the codeword control signals of T <0>, T <1>, … and T < N >, respectively, and controls the on-off of the current bit current. In this embodiment, the n+1 tunable branches generate different currents according to the received codeword control signal, and the current ratio generated by each tunable branch is 2 0：21：22：…：2N. In practical applications, the circuit size ratio of the n+1 tunable branches is also 2 0：21：22：…：2N.
To counteract offset errors introduced by the process, trimming bypass circuits are added in this embodiment to generate independent currents for generating the chopping currents. With continued reference to fig. 4, the same external codeword control signal is received and the current provided by the low-voltage accurate current source is duplicated to output a second current signal Ic2, which is identical to the trimming branch circuit. It should be noted that in this embodiment, the codeword control signal received by the trimming branch circuit is the same as that of the trimming main circuit, and thus the current ratio generated by n+1 trimming branches in the trimming branch circuit according to the received codeword control signal is also 2 0：21：22：…：2N. In practical applications, the circuit size ratio of the n+1 tunable branches is also 2 0：21：22：…：2N.
Referring to fig. 5, a specific example of the current chopper oscillation circuit is presented in this embodiment.
The current chopping oscillation circuit comprises a current chopping module, an oscillation generation module and a clock output module. Specifically:
The current chopping module receives the first current signal Ic1 and the second current signal Ic2, and CHOPs the first current signal Ic1 and the second current signal Ic2 according to the control of the first chopping control signal CHOP1 and the second chopping control signal CHOP2 to generate a first chopping current and a second chopping current;
The oscillation generation module receives the first chopping current and the second chopping current, and is controlled by a clock signal CLK, an inverted clock signal CLKN and a first reference voltage VFB to generate an oscillation clock signal CLK'; it should be noted that the oscillating clock signal CLK' is different in frequency from the clock CLK output by the clock output module.
The clock output module receives the oscillation clock signal CLK' and outputs a first chopping control signal CHOP1, a second chopping control signal CHOP2, an inverted clock signal CLKN and the clock signal CLK.
With continued reference to fig. 5, the current chopping module includes a first chopping switch S1, a second chopping switch S2, a third chopping switch S3, and a fourth chopping switch S4; wherein the first ends of the first chopping switch S1 and the second chopping switch S2 receive a first current signal Ic1, and the first ends of the third chopping switch S3 and the fourth chopping switch S4 receive a second current signal Ic2; the second end of the first chopping switch S1 is connected with the second end of the third chopping switch S3 to output a first chopping current, and the second end of the second chopping switch S2 is connected with the second end of the fourth chopping switch S4 to output a second chopping current; the control ends of the first chopping switch S1 and the fourth chopping switch S4 receive a first chopping control signal CHOP1, and the control ends of the second chopping switch S2 and the third chopping switch S3 receive a second chopping control signal CHOP2.
The oscillation generating module comprises an eighth MOS tube PM8, a ninth MOS tube NM1, a tenth MOS tube PM10, an eleventh MOS tube NM2, a first capacitor C1, a second capacitor C2, a first comparator COMP1, a second comparator COMP2, a first NOR gate and a second NOR gate; the first end of the eighth MOS tube PM8 receives the first chopping current, the second end of the eighth MOS tube PM8 is connected to the first end of the ninth MOS tube NM1, the second end of the ninth MOS tube NM1 is grounded, and the control ends of the eighth MOS tube PM8 and the ninth MOS tube NM1 receive a clock signal CLK; the first end of the tenth MOS tube PM10 receives the second chopping current, the second end of the tenth MOS tube PM10 is connected to the first end of the eleventh MOS tube NM2, the second end of the eleventh MOS tube NM2 is grounded, and the control ends of the tenth MOS tube PM10 and the eleventh MOS tube NM2 receive the inverted clock signal CLKN; the first input end of the first comparator COMP1 receives the first reference voltage VFB, the second input end of the first comparator COMP1 is connected to a common node of the eighth MOS tube PM8 and the ninth MOS tube NM1, and the output end of the first comparator COMP1 is connected to the first input end of the first nor gate; the first input end of the second comparator COMP2 is connected to a common node of the tenth MOS transistor PM10 and the eleventh MOS transistor NM2, the second input end of the second comparator COMP2 receives the first reference voltage VFB, and the output end of the second comparator COMP2 is connected to the second input end of the second nor gate; a first end of the first capacitor C1 is connected to a first input end of the second comparator COMP2, and a second end of the first capacitor C1 is grounded; the first end of the second capacitor C2 is connected to the second input end of the first comparator COMP1, and the second end of the second capacitor C2 is grounded; the second input end of the first NOR gate is connected to the output end of the second NOR gate, the first input end of the second NOR gate is connected to the output end of the first NOR gate, and the output end of the first NOR gate outputs oscillating current.
The clock output module comprises a chopping clock generation module, a first NOT gate and a second NOT gate, wherein the chopping clock generation module comprises an input end, a first output end, a second output end and a third output end, the input end receives oscillating current, the first output end outputs a first chopping control signal CHOP1, the second output end outputs a second chopping control signal CHOP2, and the third output end is connected with the first NOT gate and the second NOT gate in series in sequence and is used for outputting a clock signal CLK; the output of the first NOT outputs the inverted clock signal CLKN and the output of the second NOT outputs the clock signal CLK.
In the current chopping oscillation circuit, a chopping clock generation module in the oscillator generates a chopping control signal with the frequency being several times of the frequency of an oscillator output CLK, so that a chopping switch in the current chopping module is subjected to the chopping control signal, and a first chopping current and a second chopping current alternately supply current to a first capacitor C1 and a second capacitor C2 respectively so as to offset current generated by process mismatch.
In the low-voltage tunable high-precision oscillator provided in this embodiment, the first MOS transistor PM1, the second MOS transistor PM2, the third MOS transistor PM3, the fourth MOS transistor PM4, the fifth MOS transistor PM5, the sixth MOS transistor PM6, and the seventh MOS transistor PM7 are PMOS transistors, and the first end, the second end, and the control end thereof correspond to the source, the drain, and the gate, respectively. Correspondingly, the eighth MOS tube PM8 and the tenth MOS tube PM10 are PMOS tubes, and the first end, the second end and the control end of the eighth MOS tube PM8 respectively correspond to the source electrode, the drain electrode and the grid electrode; the ninth MOS transistor NM1 and the eleventh MOS transistor NM2 are NMOS transistors, and the first end, the second end, and the control end of the ninth MOS transistor NM1 and the eleventh MOS transistor NM2 respectively correspond to the drain, the source, and the gate.
It should be noted that the low-voltage adjustable high-precision oscillator provided by the invention comprises an adjustable current source part and a current chopping oscillation circuit part, the two parts can be independently used or combined, and any use mode is within the protection scope of the invention.
The adjustable current source reduces the consumption of a threshold voltage on the basis of the power supply of the traditional adjustable oscillator, and can provide a high-precision oscillator for the integrated circuit on the low-voltage chip.
The current chopping oscillation circuit provided by the invention is used for eliminating current imbalance caused by process mismatch during low-voltage application, providing a low-imbalance current source for an oscillator, and reducing frequency fluctuation caused by imbalance.
The invention provides a high-precision adjustable oscillator for an on-chip integrated circuit on the premise of not adding a large inductor. The novel low-voltage reference current generation structure reduces the consumption of a threshold voltage, so that the trimming function can be provided under the application of lower voltage, and the current chopping structure inside the oscillator is added at the output of the current source, so that the trimming high-precision oscillator with the precision far higher than that of the traditional RC oscillator can be provided for the system under low voltage.
The specific meaning of the above terms in the present invention will be understood in detail by those skilled in the art; the accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (10)
1. A low voltage tunable high precision oscillator, comprising:
The low-voltage accurate current source receives the power supply voltage and the reference voltage and provides current output and a first reference voltage;
The trimming main circuit receives the power supply voltage and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a first current signal;
The trimming branch circuit receives the power supply voltage and an externally input codeword control signal, digitally trims the current output by the low-voltage accurate current source, and generates a second current signal;
the current chopper oscillation circuit receives the first current signal, the second current signal and the first reference voltage and generates a clock signal.
2. The low-voltage tunable high-precision oscillator of claim 1, wherein the low-voltage precision current source comprises a first MOS transistor, a second MOS transistor, a third MOS transistor, an error amplifier, a first resistor, a second resistor, and a frequency compensation capacitor; wherein,
The first end of the first MOS tube receives the power supply voltage, the control end of the first MOS tube is grounded, the second end of the first MOS tube is connected to the first end of the second MOS tube, the second end of the second MOS tube is connected to the first end of the third MOS tube, and the second end of the third MOS tube is grounded after being serially connected with the first resistor and the second resistor in sequence; a first reference voltage is led out between the second end of the second MOS tube and the first end of the third MOS tube; the inverting input end of the error amplifier is connected to the second end of the second MOS tube and receives the first reference voltage, the non-inverting input end of the error amplifier receives the external reference voltage, and the output end of the error amplifier is connected to the control end of the third MOS tube; the first end of the frequency compensation capacitor is connected to the second end of the second MOS tube, and the second end of the frequency compensation capacitor is connected to a common node of the first resistor and the second resistor; and a bias voltage is led out from a common node of the second end of the third MOS tube and the first resistor and is connected to the control end of the second MOS tube in a pressing mode, so that the second MOS tube generates stable current.
3. The low voltage tunable high precision oscillator of claim 2, wherein the tuning main circuit comprises 1 normally on branch and n+1 identical tunable branches; the normally-on branch comprises a fourth MOS tube and a fifth MOS tube, and each adjustable branch comprises a sixth MOS tube and a seventh MOS tube; in the normally-on branch, the first end of the fourth MOS tube receives the power supply voltage, the second end of the fourth MOS tube is connected to the first end of the fifth MOS tube, the control end of the fourth MOS tube is connected to the ground, the control end of the fifth MOS tube is connected to the control end of the third MOS tube in the low-voltage accurate current source, and the supplied current is copied; in the n+1 adjustable branches, a first end of a sixth MOS tube receives a power supply voltage, a second end of the sixth MOS tube is connected to a first end of a seventh MOS tube, a control end of the sixth MOS tube receives an external codeword control signal, and a control end of the seventh MOS tube is connected to a control end of a third MOS tube in a low-voltage accurate current source and replicates supplied current; the second end of the fifth MOS tube in the normally-on branch is connected with the second end of the seventh MOS tube in the N+1 adjustable branch, and then a first current signal is output; wherein N is a natural number greater than 1.
4. The low voltage tunable high precision oscillator according to claim 3, wherein the tuning subcircuit and the tuning subcircuit are identical in composition, receive the same external codeword control signal and duplicate a current provided by the low voltage precision current source, and output a second current signal.
5. The low-voltage tunable high-precision oscillator according to any one of claims 1 to 4, wherein the current chopping oscillation circuit comprises:
The current chopping module receives the first current signal and the second current signal, and performs chopping processing on the first current signal and the second current signal according to the control of the first chopping control signal and the second chopping control signal to generate a first chopping current and a second chopping current;
the oscillation generation module receives the first chopping current and the second chopping current, is controlled by a clock signal CLK, an inverted clock signal CLKN and a first reference voltage, and generates an oscillation clock signal; and
The clock output module receives the oscillation clock signal and outputs a first chopping control signal, a second chopping control signal, an inverted clock signal CLKN and a clock signal CLK.
6. The low voltage tunable high precision oscillator of claim 5, wherein the current chopping module comprises a first chopping switch, a second chopping switch, a third chopping switch, and a fourth chopping switch; wherein,
First ends of the first chopping switch and the second chopping switch receive a first current signal, and first ends of the third chopping switch and the fourth chopping switch receive a second current signal; the second end of the first chopping switch is connected with the second end of the third chopping switch to output first chopping current, and the second end of the second chopping switch is connected with the second end of the fourth chopping switch to output second chopping current; the control ends of the first chopping switch and the fourth chopping switch receive a first chopping control signal, and the control ends of the second chopping switch and the third chopping switch receive a second chopping control signal.
7. The low-voltage tunable high-precision oscillator according to claim 5, wherein the oscillation generation module comprises an eighth MOS transistor, a ninth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, a first capacitor, a second capacitor, a first comparator, a second comparator, a first nor gate, a second nor gate; wherein,
The first end of the eighth MOS tube receives the first chopping current, the second end of the eighth MOS tube is connected to the first end of the ninth MOS tube, the second end of the ninth MOS tube is connected to the ground, and the control ends of the eighth MOS tube and the ninth MOS tube receive the clock signal CLK; the first end of the tenth MOS tube receives the second chopping current, the second end of the tenth MOS tube is connected to the first end of the eleventh MOS tube, the second end of the eleventh MOS tube is connected to the ground, and the control ends of the tenth MOS tube and the eleventh MOS tube receive the inverted clock signal CLKN;
The first input end of the first comparator receives a first reference voltage, the second input end of the first comparator is connected to a common node of the eighth MOS tube and the ninth MOS tube, and the output end of the first comparator is connected to the first input end of the first NOR gate;
the first input end of the second comparator is connected to a common node of the tenth MOS tube and the eleventh MOS tube, the second input end of the second comparator receives the first reference voltage, and the output end of the second comparator is connected to the second input end of the second NOR gate;
The first end of the first capacitor is connected to the first input end of the second comparator, and the second end of the first capacitor is grounded; the first end of the second capacitor is connected to the second input end of the first comparator, and the second end of the second capacitor is grounded;
the second input end of the first NOR gate is connected to the output end of the second NOR gate, the first input end of the second NOR gate is connected to the output end of the first NOR gate, and the output end of the first NOR gate outputs oscillating current.
8. The low-voltage tunable high-precision oscillator according to claim 5, wherein the clock output module comprises a chopping clock generation module, a first not gate and a second not gate, the chopping clock generation module comprises an input end, a first output end, a second output end and a third output end, the input end receives the oscillating current, the first output end outputs a first chopping control signal, the second output end outputs a second chopping control signal, and the third output end is sequentially connected with the first not gate and the second not gate in series and is used for outputting a clock signal CLK; the output of the first NOT outputs the inverted clock signal CLKN and the output of the second NOT outputs the clock signal CLK.
9. The low-voltage tunable high-precision oscillator according to claim 4, wherein the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor, the sixth MOS transistor, and the seventh MOS transistor are PMOS transistors, and the first end, the second end, and the control end correspond to the source, the drain, and the gate, respectively.
10. The low-voltage tunable high-precision oscillator according to claim 7, wherein the eighth MOS transistor and the tenth MOS transistor are PMOS transistors, and the first end, the second end, and the control end of the eighth MOS transistor correspond to the source, the drain, and the gate, respectively; the ninth MOS tube and the eleventh MOS tube are NMOS tubes, and the first end, the second end and the control end of the ninth MOS tube respectively correspond to the drain electrode, the source electrode and the grid electrode.
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| US20200259474A1 (en) * | 2019-02-08 | 2020-08-13 | Stmicroelectronics S.R.L. | Amplification interface, and corresponding measurement system and method for calibrating an amplification interface |
| CN112311360A (en) * | 2020-02-18 | 2021-02-02 | 成都华微电子科技有限公司 | High-precision oscillator without reference clock |
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| CN116707497A (en) * | 2023-08-08 | 2023-09-05 | 成都电科星拓科技有限公司 | Tunable low-speed clock duty cycle skew trimming circuit, method and timing circuit |
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| US20200259474A1 (en) * | 2019-02-08 | 2020-08-13 | Stmicroelectronics S.R.L. | Amplification interface, and corresponding measurement system and method for calibrating an amplification interface |
| CN112311360A (en) * | 2020-02-18 | 2021-02-02 | 成都华微电子科技有限公司 | High-precision oscillator without reference clock |
| CN114389580A (en) * | 2021-12-27 | 2022-04-22 | 芯海科技（深圳）股份有限公司 | Resistor module, clock circuit, integrated circuit, and electronic device |
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