CN117976693A - Chip structure, manufacturing method and display device - Google Patents

Chip structure, manufacturing method and display device Download PDF

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Publication number
CN117976693A
CN117976693A CN202410196401.2A CN202410196401A CN117976693A CN 117976693 A CN117976693 A CN 117976693A CN 202410196401 A CN202410196401 A CN 202410196401A CN 117976693 A CN117976693 A CN 117976693A
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China
Prior art keywords
sub
layer
type gan
color conversion
pixel
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CN202410196401.2A
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Chinese (zh)
Inventor
李伟
玄明花
张粲
王灿
曹占锋
王路
王明星
舒适
李翔
牛晋飞
张晶晶
杨明坤
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to CN202410196401.2A priority Critical patent/CN117976693A/en
Publication of CN117976693A publication Critical patent/CN117976693A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements

Abstract

The invention discloses a chip structure, a manufacturing method and a display device, wherein the chip structure of one embodiment comprises a plurality of sub-pixels, including an epitaxial wafer and a color conversion layer cover plate attached to the light emitting side of the epitaxial wafer, wherein the epitaxial wafer comprises a light emitting functional layer of each sub-pixel; the color conversion layer cover plate comprises a color conversion layer attached to the light emergent side of the epitaxial wafer and a color film layer arranged on one side, far away from the epitaxial wafer, of the color conversion layer. The chip structure provided by the invention can solve the problem of chip fragility caused by thinning of the epitaxial wafer substrate in the prior art, simultaneously improves the transfer efficiency of Micro-LEDs, improves the preparation precision, can effectively improve the external quantum efficiency of red light and green light, prevents the problem of crosstalk between adjacent sub-pixels, and has practical application prospect.

Description

Chip structure, manufacturing method and display device
The application is a divisional application of the application application with the application number 202111004407.8 and the name of a chip structure, a manufacturing method and a display device, which is filed by the inventor at the date of 2021 and 08 and 30.
Technical Field
The invention relates to the technical field of display, in particular to a chip structure, a manufacturing method and a display device.
Background
Micro-LED display device is a new generation display technology, and has the advantages of high brightness, high luminous efficiency, low power consumption, high response speed and the like. However, when the Micro-LED is applied to a display device, there are also problems of mass transfer, yield of products, and the like.
Disclosure of Invention
In order to solve at least one of the above problems, a first embodiment of the present invention provides a chip structure comprising a plurality of sub-pixels including an epitaxial wafer and a color conversion layer cover plate bonded to a light emitting side of the epitaxial wafer, wherein
The epitaxial wafer comprises a light-emitting functional layer of each sub-pixel;
the color conversion layer cover plate comprises a color conversion layer attached to the light emergent side of the epitaxial wafer and a color film layer arranged on one side, far away from the epitaxial wafer, of the color conversion layer.
For example, in some embodiments of the present application provide a chip structure, the epitaxial wafer includes a first sub-pixel light emitting functional layer, a second sub-pixel light emitting functional layer, a third sub-pixel light emitting functional layer, a common cathode, and a transparent conductive layer, wherein
The first sub-pixel luminescence functional layer comprises a first n-type GaN, a first quantum well, a first p-type GaN and a first anode which are stacked;
The second sub-pixel luminescence functional layer comprises a second n-type GaN, a second quantum well, a second p-type GaN and a second anode which are stacked;
the third sub-pixel luminescence functional layer comprises third n-type GaN, a third quantum well, third p-type GaN and a third anode which are stacked;
the common cathode comprises cathode N-type GaN, cathode N electrode metal, a cathode electrode and a connecting metal electrically connected with the cathode N electrode metal which are arranged in a stacked manner;
The transparent conductive layer covers the first n-type GaN of the first sub-pixel light emitting function layer, the second n-type GaN of the second sub-pixel light emitting function layer, the third n-type GaN of the third sub-pixel light emitting function layer, the cathode n-type GaN of the common cathode and the connecting metal.
For example, in some embodiments of the present application provide a chip structure, the transparent conductive layer and/or the connection metal has a zigzag shape.
For example, in the chip structure provided in some embodiments of the present application, the transparent conductive layer and/or the connection metal are shaped like a Chinese character 'hui'.
For example, in some embodiments of the application provide a chip structure in which the first quantum well, the second quantum well, and the third quantum well are blue quantum wells,
The color conversion layer includes a first defining dam, and first, second and third opening regions defined by the first defining dam, wherein,
The first opening area is used for setting a first red quantum dot conversion part corresponding to the first sub-pixel luminescence function layer, the orthographic projection of the first opening area on the color conversion layer cover plate covers the orthographic projection of the first sub-pixel luminescence function layer on the color conversion layer cover plate,
The second opening area is used for setting a first green quantum dot conversion part corresponding to the second sub-pixel luminescence function layer, the orthographic projection of the second opening area on the color conversion layer cover plate covers the orthographic projection of the second sub-pixel luminescence function layer on the color conversion layer cover plate,
The third opening area is used for setting a first scattering particle part corresponding to the third sub-pixel luminescence function layer, the orthographic projection of the third opening area on the color conversion layer cover plate covers the orthographic projection of the third sub-pixel luminescence function layer on the color conversion layer cover plate,
Wherein the opening area of the first opening area is larger than or equal to the opening area of the second opening area, and the opening area of the second opening area is larger than or equal to the opening area of the third opening area;
The color film layer includes a black matrix, a first red filter film corresponding to a first red quantum dot conversion part defined by the black matrix, a first green filter film corresponding to a first green quantum dot conversion part, and a first blue filter film corresponding to a first scattering particle part.
For example, in the chip structure provided in some embodiments of the present application, the epitaxial wafer includes a fourth sub-pixel light emitting functional layer, a fifth sub-pixel light emitting functional layer, and a sixth sub-pixel light emitting functional layer, where
The fourth sub-pixel light emitting functional layer comprises a fourth N-type GaN, a fourth quantum well, a fourth p-type GaN and a fourth anode, which are stacked on the fourth N-type GaN, and a fourth cathode N electrode metal and a fourth cathode, which are stacked on the fourth N-type GaN;
the fifth sub-pixel light emitting functional layer comprises fifth N-type GaN, a fifth quantum well stacked on the fifth N-type GaN, fifth p-type GaN, a fifth anode, a fifth cathode N electrode metal stacked on the fifth N-type GaN, and a fifth cathode;
the sixth sub-pixel light emitting functional layer includes a sixth N-type GaN, a sixth quantum well stacked on the sixth N-type GaN, a sixth p-type GaN and a sixth anode, and a sixth cathode N-electrode metal and a sixth cathode stacked on the sixth N-type GaN.
For example, in some embodiments of the application provide a chip structure in which the fourth quantum well, the fifth quantum well and the sixth quantum well are blue quantum wells,
The color conversion layer includes a second defining dam, and fourth, fifth and sixth open areas defined by the second defining dam, wherein,
The fourth opening area is used for setting a second red quantum dot conversion part corresponding to the fourth sub-pixel luminescence function layer, the orthographic projection of the fourth opening area on the color conversion layer cover plate covers the orthographic projection of the fourth sub-pixel luminescence function layer on the color conversion layer cover plate,
The fifth opening area is used for setting a second green quantum dot conversion part corresponding to the fifth sub-pixel luminescence function layer, the orthographic projection of the fifth opening area on the color conversion layer cover plate covers the orthographic projection of the fifth sub-pixel luminescence function layer on the color conversion layer cover plate,
The sixth opening area is used for setting a second scattering particle part corresponding to the sixth sub-pixel luminescence functional layer, and the orthographic projection of the sixth opening area on the color conversion layer cover plate covers the orthographic projection of the sixth sub-pixel luminescence functional layer on the color conversion layer cover plate;
Wherein an opening area of the fourth opening region is equal to or larger than an opening area of the fifth opening region, and an opening area of the fifth opening region is equal to or larger than an opening area of the sixth opening region;
the color film layer includes a black matrix, a second red filter film corresponding to a second red quantum dot conversion part defined by the black matrix, a second green filter film corresponding to a second green quantum dot conversion part, and a second blue filter film corresponding to a second scattering particle part.
For example, in the chip structure provided in some embodiments of the present application, the thickness of the first or second defining dam is 10 μm or more and 30 μm or less;
and/or
The first limiting dam or the second limiting dam is a shading type limiting dam or a reflecting type limiting dam.
For example, in the chip structure provided in some embodiments of the present application, the chip structure further includes a bonding adhesive for bonding the epitaxial wafer and the color conversion layer cover plate;
The thickness of the laminating adhesive is more than or equal to 1 mu m and less than or equal to 10 mu m;
The width of the first or second limiting dam is 5 μm or more and 75 μm or less.
A second embodiment of the present invention provides a display device including the chip structure described in the first embodiment.
A third embodiment of the present invention provides a method for manufacturing the chip structure according to the first embodiment, including:
forming an epitaxial wafer comprising a light-emitting functional layer of each sub-pixel;
Forming a color conversion layer cover plate, wherein the color conversion layer cover plate comprises a color conversion layer and a color film layer;
and attaching the color conversion layer of the color conversion layer cover plate to the light emergent side of the epitaxial wafer to form an independent chip structure.
For example, in the manufacturing method provided in some embodiments of the present application, the forming the epitaxial wafer including the light emitting functional layer of each sub-pixel further includes:
Forming a light emitting function layer of a first sub-pixel, a light emitting function layer of a second sub-pixel, a light emitting function layer of a third sub-pixel, and a common cathode on a first substrate;
transferring the epitaxial wafer to a second substrate through bonding glue;
Peeling the first substrate;
Forming a transparent conductive layer electrically connecting the light emitting function layer of the first sub-pixel, the light emitting function layer of the second sub-pixel, the light emitting function layer of the third sub-pixel and the common cathode;
the forming of the color conversion layer cover plate further includes: sequentially forming a color film layer and a color conversion layer on a third substrate;
The attaching the color conversion layer of the color conversion layer cover plate to the light emitting side of the epitaxial wafer and forming an independent chip structure further comprises:
Attaching the color conversion layer of the color conversion layer cover plate to the transparent conductive layer of the epitaxial wafer through attaching glue;
the second substrate of the epitaxial wafer is removed through de-bonding, or the third substrate of the color conversion layer cover plate of the chip structure is stripped;
Laser cutting to form independent chip structures;
and stripping the third substrate of the color conversion layer cover plate of the chip structure, or removing the second substrate of the epitaxial wafer by de-bonding.
For example, in the manufacturing method provided in some embodiments of the present application, the forming the epitaxial wafer including the light emitting functional layer of each sub-pixel further includes:
forming a light emitting functional layer of a fourth sub-pixel, a fifth sub-pixel, and a sixth sub-pixel on a fourth substrate, the light emitting functional layer including N-type GaN, a quantum well stacked on the N-type GaN, p-type GaN, and an anode electrode, and a cathode N-electrode metal stacked on the N-type GaN, and a cathode electrode;
transferring the epitaxial wafer to a fifth substrate through bonding glue;
peeling the fourth substrate;
The forming of the color conversion layer cover plate further includes: sequentially forming a color film layer and a color conversion layer on a sixth substrate;
The attaching the color conversion layer of the color conversion layer cover plate to the light emitting side of the epitaxial wafer and forming an independent chip structure further comprises:
attaching the color conversion layer of the color conversion layer cover plate to the luminous functional layer of each sub-pixel of the epitaxial wafer through attaching glue;
removing the fifth substrate of the epitaxial wafer by means of de-bonding, or stripping the sixth substrate of the color conversion layer cover plate of the chip structure;
Laser cutting to form independent chip structures;
and stripping the sixth substrate of the color conversion layer cover plate of the chip structure, or removing the fifth substrate of the epitaxial wafer by de-bonding.
The beneficial effects of the invention are as follows:
Aiming at the existing problems at present, the invention formulates a chip structure, a manufacturing method and a display device, wherein in one embodiment, the epitaxial wafer and the color conversion layer cover plate which are manufactured independently are bonded to form the chip structure, and meanwhile, the epitaxial wafer substrate and the color conversion layer cover plate substrate are removed, so that on one hand, the transfer efficiency of Micro-LEDs is improved, the thickness of the chip is reduced, the manufacturing precision and the product yield are improved, and the problem of chip fragility caused by thinning of the epitaxial wafer substrate in the prior art can be solved; on the other hand, the external quantum efficiency of red light and green light is effectively improved through the color conversion layer of the color conversion layer cover plate, the crosstalk problem between adjacent sub-pixels is prevented, the display effect of the Micro-LED display device can be improved, further user experience is improved, and the Micro-LED display device has practical application prospect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a chip structure according to an embodiment of the invention;
FIG. 2 shows a top view of a chip structure according to an embodiment of the invention;
FIG. 3 shows a cross-sectional view of a chip structure according to an embodiment of the invention;
FIGS. 4a-4b show schematic views of a transparent conductive layer and a bonding metal according to one embodiment of the present invention;
figures 5a-5k illustrate schematic views of the fabrication and decomposition of an epitaxial wafer according to one embodiment of the present invention;
FIGS. 6a-6d are schematic diagrams illustrating exploded views of a color conversion layer cover plate according to one embodiment of the present invention;
FIG. 7 is a schematic view showing the bonding of the epitaxial wafer and the color conversion layer cover plate according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of light emitting functional layer spacing and cross-color prevention according to one embodiment of the present invention;
FIG. 9 shows a top view of a chip structure according to another embodiment of the invention;
FIG. 10 shows a cross-sectional view of a chip structure according to another embodiment of the invention;
FIGS. 11a-11j are schematic views illustrating an exploded view of the fabrication of an epitaxial wafer according to another embodiment of the present invention;
fig. 12 is a schematic view showing the adhesion of the epitaxial wafer and the color conversion layer cover plate according to another embodiment of the present invention;
Fig. 13 shows a flow chart of a method of fabrication according to an embodiment of the invention.
Detailed Description
In order to more clearly illustrate the present invention, the present invention will be further described with reference to preferred embodiments and the accompanying drawings. Like parts in the drawings are denoted by the same reference numerals. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and that this invention is not limited to the details given herein.
It should be noted that, as used herein, "on … …", "formed on … …", and "disposed on … …" may mean that one layer is directly formed or disposed on another layer, or that one layer is indirectly formed or disposed on another layer, i.e., that other layers are present between the two layers. In this document, unless otherwise indicated, the term "in the same layer" is used to mean that two layers, components, members, elements, or portions may be formed by the same patterning process, and that the two layers, components, members, elements, or portions are generally formed of the same material. In this context, unless otherwise indicated, the expression "patterning process" generally includes the steps of coating of photoresist, exposure, development, etching, stripping of photoresist, and the like. The expression "one patterning process" means a process of forming a patterned layer, feature, component, etc. using a single mask.
In the prior art, considering the batch transfer problem and the laser cutting problem of the Micro-LED manufacturing process, an epitaxial wafer substrate thinning scheme is generally adopted to reduce the chip thickness of the Micro-LED, however, the thinned epitaxial wafer has a fragile problem during laser cutting, and the yield of the Micro-LED chip is seriously affected.
In view of the above problems, as shown in fig. 1, an embodiment of the present invention provides a chip structure including a plurality of sub-pixels, which is characterized by including an epitaxial wafer and a color conversion layer cover plate attached to a light emitting side of the epitaxial wafer, wherein
The epitaxial wafer comprises a light-emitting functional layer of each sub-pixel;
the color conversion layer cover plate comprises a color conversion layer attached to the light emergent side of the epitaxial wafer and a color film layer arranged on one side, far away from the epitaxial wafer, of the color conversion layer.
In this embodiment, the epitaxial wafer and the color conversion layer cover plate are manufactured independently, specifically, the epitaxial wafer is grown on a sapphire substrate or a silicon substrate, and the color conversion layer cover plate is formed on a glass substrate; the epitaxial wafer and the color conversion layer cover plate which are manufactured independently are attached to form a chip structure, and meanwhile, the epitaxial wafer substrate and the color conversion layer cover plate substrate are removed, so that on one hand, the transfer efficiency of the Micro-LED is improved, the thickness of the chip is reduced, the preparation precision and the product yield are improved, and the problem that the chip is fragile due to the fact that the epitaxial wafer substrate is thinned in the prior art can be solved; on the other hand, the external quantum efficiency of red light and green light is effectively improved through the color conversion layer of the color conversion layer cover plate, the crosstalk problem between adjacent sub-pixels is prevented, the display effect of the Micro-LED display device can be improved, further user experience is improved, and the Micro-LED display device has practical application prospect.
In a specific example, as shown in fig. 2 and 3, fig. 2 is a top view of the chip structure of the present embodiment, and fig. 3 is a cross-sectional view of AA' of fig. 2, wherein the epitaxial wafer 10 includes a first sub-pixel light emitting functional layer 11, a second sub-pixel light emitting functional layer 15, a third sub-pixel light emitting functional layer 16, a common cathode 12, and a transparent conductive layer 14, wherein
The first sub-pixel light emitting functional layer 11 includes a first n-type GaN111, a first quantum well 112, a first p-type GaN113, and a first anode 115, which are stacked;
The second sub-pixel luminescence functional layer comprises a second n-type GaN, a second quantum well, a second p-type GaN and a second anode which are stacked;
the third sub-pixel luminescence functional layer comprises third n-type GaN, a third quantum well, third p-type GaN and a third anode which are stacked;
the common cathode 12 includes cathode N-type GaN121, cathode N-electrode metal 122, and cathode electrode 124, which are stacked, and connection metal 123 electrically connected to the cathode N-electrode metal 122;
the transparent conductive layer 14 covers the first n-type GaN111 of the first sub-pixel light emitting function layer 11, the second n-type GaN of the second sub-pixel light emitting function layer, the third n-type GaN of the third sub-pixel light emitting function layer, the cathode n-type GaN121 of the common cathode 12, and the connection metal 123.
In the present embodiment, the epitaxial wafer includes the light emitting functional layer and the common cathode of each sub-pixel, and the light emitting functional layer and the common cathode of each sub-pixel are electrically connected through the connection metal 123 of the transparent conductive layer 14 and the common cathode. And the first quantum well, the second quantum well and the third quantum well are all blue quantum wells, namely the light-emitting functional layers of all the sub-pixels of the epitaxial wafer emit blue light.
As shown in fig. 2 and 3, the color conversion layer cover plate includes a color conversion layer attached to the light emitting side of the epitaxial wafer, and a color film layer disposed on the side of the color conversion layer away from the epitaxial wafer.
Specifically, the color conversion layer includes a first defining dam 34, and first, second, and third opening regions defined by the first defining dam.
The first opening area is used for setting a first red quantum dot conversion part corresponding to the first sub-pixel luminescence function layer, and orthographic projection of the first opening area on the color conversion layer cover plate covers orthographic projection of the first sub-pixel luminescence function layer on the color conversion layer cover plate. The second opening area is used for setting a first green quantum dot conversion part corresponding to the second sub-pixel luminescence function layer, and orthographic projection of the second opening area on the color conversion layer cover plate covers orthographic projection of the second sub-pixel luminescence function layer on the color conversion layer cover plate. The third opening area is used for setting a first scattering particle part corresponding to the third sub-pixel luminescence function layer, and orthographic projection of the third opening area on the color conversion layer cover plate covers orthographic projection of the third sub-pixel luminescence function layer on the color conversion layer cover plate.
In this embodiment, the color conversion layer defines, by the first limiting dam, an opening area provided corresponding to each sub-pixel light emitting functional layer, each opening area being respectively used for placing a red quantum dot light emitting material, a green quantum dot light emitting material, and a scattering material corresponding to blue light. Thereby utilizing blue light emitted by each sub-pixel luminous functional layer of the epitaxial wafer to respectively excite quantum dot luminous materials of each color to form different colors, and utilizing the scattering materials to further uniformly emit blue light.
Specifically, the color conversion layer converts blue light emitted from the epitaxial wafer.
For example, the first sub-pixel luminescence functional layer of the epitaxial wafer corresponds to the red quantum dot conversion part on the color conversion layer, and then blue light emitted by the first sub-pixel luminescence functional layer excites the red quantum dot luminescence material of the red quantum dot conversion part to form red light.
Considering the emission direction of blue light emitted by the first sub-pixel light-emitting functional layer and the light utilization rate of the blue light emitted by the first sub-pixel light-emitting functional layer, the first opening area carrying the red quantum dot light-emitting material is set to be larger than that of the first sub-pixel light-emitting functional layer, namely, the orthographic projection of the first opening area on the color conversion layer cover plate covers the orthographic projection of the first sub-pixel light-emitting functional layer on the color conversion layer cover plate, so that the light utilization rate of the light emitted by the first sub-pixel light-emitting functional layer is effectively improved.
For another example, the second sub-pixel light emitting functional layer of the epitaxial wafer corresponds to the green quantum dot conversion part on the color conversion layer, and then blue light emitted by the second sub-pixel light emitting functional layer excites the green quantum dot light emitting material of the green quantum dot conversion part to form green light. And the orthographic projection of the second opening area corresponding to the green quantum dot conversion part on the color conversion layer cover plate is arranged to cover the orthographic projection of the second sub-pixel luminous functional layer on the color conversion layer cover plate.
For another example, the third sub-pixel light-emitting functional layer of the epitaxial wafer corresponds to the first scattering particle portion on the color conversion layer, and blue light emitted by the third sub-pixel light-emitting functional layer is scattered by the first scattering particle portion to form uniform blue light, so that the display effect of the Micro-LED is further improved. And the orthographic projection of the third opening area corresponding to the scattering of the first scattering particles on the color conversion layer cover plate is arranged to cover the orthographic projection of the third sub-pixel luminous functional layer on the color conversion layer cover plate.
The quantum dot luminescent material in this embodiment may be CdSe quantum dot material, inP quantum dot material, perovskite quantum dot material or fluorescent material.
In an alternative embodiment, the thickness of the first limiting dam is 10 μm or more and 30 μm or less, and the thicknesses of the quantum dot conversion part and the scattering particle part are 5 μm or more and 25 μm or less.
In this embodiment, as shown in fig. 3, the thickness of the first limiting dam is greater than the thickness of the first red quantum dot conversion portion, and also greater than the thickness of the first green quantum dot conversion portion, and also greater than the thickness of the first scattering particle portion. Specifically, the thickness of the first limiting dam 34 is greater than the thickness of the quantum dot conversion part or the scattering particle part in the opening region, and the color conversion layer further includes a quantum dot inorganic encapsulation layer 36 covering the first limiting dam, the first red quantum dot conversion part, the first green quantum dot conversion part, and the first scattering particle part, thereby forming a color conversion layer cover plate having a pit structure.
In view of the pit structure formed by the color conversion layer, in order to dispose each sub-pixel light emitting function layer within a pit and prevent abnormal electrical connection of the pixel light emitting function layer of each sub-pixel in the epitaxial wafer to the common cathode due to the first limiting dam when bonding with the epitaxial wafer, in an alternative embodiment, as shown in fig. 4a, the transparent conductive layer is disposed in a zigzag structure, or the connection metal is disposed in a zigzag structure, or the transparent conductive layer and the connection metal are disposed in a zigzag structure.
In the present embodiment, by defining the shapes of the transparent conductive layer and the connection metal, it is possible to ensure the assembly stability of the light emitting function layer of each sub-pixel and the corresponding color conversion layer, and the normal electrical connection of the light emitting function layer of each sub-pixel and the common cathode.
In another alternative embodiment, as shown in fig. 4b, the transparent conductive layer is arranged in a zigzag structure, or the connection metal is arranged in a zigzag structure, or the transparent conductive layer and the connection metal are arranged in a zigzag structure.
In the present embodiment, by defining the shapes of the transparent conductive layer and the connection metal, it is possible to ensure the assembly stability of the light emitting function layer of each sub-pixel and the corresponding color conversion layer, and the normal electrical connection of the light emitting function layer of each sub-pixel and the common cathode.
In an alternative embodiment, the first limiting dam is a light shielding type limiting dam or a reflective type limiting dam.
In this embodiment, in order to further prevent crosstalk of light of two adjacent sub-pixels, the material of the first defining dam is defined.
Specifically, the first limiting dam uses a shading type material, namely, the first limiting dam absorbs light rays incident to the first limiting dam, so that the incident light rays are prevented from entering adjacent sub-pixels, and the crosstalk prevention function is realized.
Or the first limiting dam uses a reflecting material, namely the first limiting dam reflects the light rays entering the first limiting dam, so that the incident light rays are prevented from entering the adjacent sub-pixels, and the light utilization rate is further improved on the basis of realizing the crosstalk prevention function.
Or the first limiting dam is made of transparent materials, reflection metal is arranged on the transparent materials of the first limiting dam, and light rays entering the first limiting dam are reflected by the reflection metal, so that the incident light rays are prevented from entering adjacent sub-pixels, and the light utilization rate is further improved on the basis of achieving the crosstalk prevention function.
In an alternative embodiment, the opening area of the first opening area is greater than or equal to the opening area of the second opening area, and the opening area of the second opening area is greater than or equal to the opening area of the third opening area.
In the present embodiment, the opening area of each sub-pixel is further set.
In a specific example, when the opening areas of the first opening region, the second opening region, and the third opening region are set to be the same, the luminance of each sub-pixel is adjusted by adjusting the current of the driving transistor of each sub-pixel in consideration of the luminance conversion rate of the different quantum dot conversion portion of the color conversion layer.
In consideration of the limitation of current adjustment of the driving transistor, the light emission luminance of the respective pixels is further adjusted with different opening areas.
In another specific example, the opening area of the first opening region is set to be the largest, the opening area of the third opening region is set to be the smallest, i.e., the opening area of the first opening region is larger than the opening area of the second opening region, and the opening area of the second opening region is larger than the opening area of the third opening region, i.e., the luminance of each sub-pixel is adjusted by adjusting the opening area of the color conversion layer of each sub-pixel.
It should be noted that, the opening area of each opening area is not specifically limited in the present application, and a person skilled in the art should select an appropriate opening area according to the actual application requirement to realize that the brightness of each sub-pixel is adjusted as a design criterion, which is not described herein.
The color conversion layer cover plate further comprises a color film layer arranged on one side, far away from the epitaxial wafer, of the color conversion layer. In an alternative embodiment, the color film layer includes a black matrix, a first red filter film corresponding to a first red quantum dot conversion part defined by the black matrix, a first green filter film corresponding to a first green quantum dot conversion part, and a first blue filter film corresponding to a first scattering particle part.
In this embodiment, the light-emitting effect of the Micro-LED chip is further defined by providing a color film layer, and the color film layer further filters the red light, the green light and the blue light emitted from the color conversion layer, so as to further prevent the color cross problem of the chip.
As shown in fig. 2, the Micro-LED chip has a square structure in which a common cathode 12 is disposed at the upper left corner of the drawing, and the remaining three sub-pixels are disposed at the upper right corner, the lower right corner, and the lower left corner, respectively. Specifically, the distance between the epitaxial wafer 10 and the chip edge is a, the distance between each electrode Pad and the epitaxial wafer edge is b, the distance between the cathode N Pad and each anode P Pad is equal to or greater than c, and the distance between two adjacent anode P pads is greater than d. According to the illustrated longitudinal length and lateral length, taking the distance of the illustrated longitudinal length as an example, the side length of the Micro-LED chip is the length of the light emitting functional layer 11 of the first sub-pixel + the length of the light emitting functional layer 15 of the second sub-pixel + the distance d+2 times the distance d between the two.
Meanwhile, considering the position distribution of the light emitting layers of the sub-pixels, the light emitting region and the anode of the third sub-pixel 16 are separately arranged, so that the light emitting region of the first sub-pixel 11, the light emitting region of the second sub-pixel 15 and the light emitting region of the third sub-pixel 16 are averagely arranged at different positions of the Micro-LED chip, thereby further improving the display effect of the Micro-LED chip.
In one specific example, as shown in FIGS. 5a-5k, as shown in FIGS. 6a-6d, a complete process of Micro-LED chips is described as shown in FIG. 7.
First, an epitaxial wafer including a light-emitting functional layer of each sub-pixel is formed.
In this embodiment, blue LEDs partitioned by pixels are fabricated on a 4-inch wafer, and one pixel includes three sub-pixels, i.e., three blue LEDs.
Forming a light emitting function layer of a first sub-pixel, a light emitting function layer of a second sub-pixel, a light emitting function layer of a third sub-pixel and a common cathode on a first substrate;
as shown in fig. 5a, a surface treatment is performed on a sapphire or silicon wafer substrate 17 and a GaN buffer layer 18, an N-type GaN layer 111, a quantum well layer 112, and a P-type GaN layer 113 are sequentially deposited.
As shown in fig. 5b, a photoresist 116 is formed on the P-type GaN layer 113.
As shown in fig. 5c, the p-type GaN layer, the quantum well layer and part of the N-type GaN layer in the region between the sub-pixels and the negative electrode region are removed through a photolithography-etching process, so that independent sub-pixels are formed; namely, first n-type GaN111, first quantum well 112, and first p-type GaN113 are formed.
As shown in fig. 5d, the independent N-type GaN layer 121 is formed as a common cathode through a photolithography-etching process; i.e., cathode n-type GaN121 is formed.
As shown in fig. 5e, a P-electrode metal layer 114 is formed on the P-type GaN layer 113, and the P-electrode metal layer 114 is made of ITO.
As shown in fig. 5f, an N-electrode metal layer 122 and a connection metal 123 electrically connected to the cathode N-electrode metal 122 are formed on the cathode N-type GaN 121. Then, a DBR layer 13 is formed to cover the light emitting function layer of each sub-pixel and the common cathode, and a via hole is etched in the DBR layer 13.
As shown in fig. 5g, a Bonding pad is formed on the DBR layer 13, fills the via hole, and forms an anode 115 and a cathode electrode 124, respectively.
And secondly, transferring the epitaxial wafer to a second substrate through bonding glue.
As shown in fig. 5h, the epitaxial wafer is bonded to the second substrate 40 by the bonding adhesive 41.
Third, stripping the first substrate;
as shown in fig. 5i, the first substrate 17 is peeled off using a laser.
As shown in fig. 5j, the GaN buffer layer 18 is etched away by a dry etching process, exposing the first n-type GaN111 and the cathode n-type GaN121.
And a fourth step of forming a transparent conductive layer electrically connecting the light emitting function layer of the first sub-pixel, the light emitting function layer of the second sub-pixel, the light emitting function layer of the third sub-pixel and the common cathode.
As shown in fig. 5k, a transparent conductive layer 14 is formed on the exposed first n-type GaN111 and cathode n-type GaN121, the transparent conductive layer 14 being ITO.
To this end, an epitaxial wafer carried with the second substrate 40 is formed, the epitaxial wafer being arranged in pixel regions, each pixel including three sub-pixels and a common cathode, the light emitting functional layer of each sub-pixel being electrically connected to the common cathode through a transparent conductive layer.
And secondly, forming a color conversion layer cover plate, wherein the color conversion layer cover plate comprises a color conversion layer and a color film layer.
In this embodiment, a 4-inch glass substrate corresponding to a 4-inch wafer for manufacturing an epitaxial wafer is used to form a color conversion layer cover plate, which includes color films and color conversion layers corresponding to the sub-pixels of each pixel, wherein the color film layer includes a black matrix and a color filter within an opening area defined by the black matrix, and the color conversion layer includes a first limiting dam and a quantum dot conversion portion within the opening area defined by the first limiting dam.
And fifthly, sequentially forming a color film layer and a color conversion layer on the third substrate.
As shown in fig. 6a, color-less PI 31 is formed on a glass substrate 38 by coating and post-baking, and a black matrix BM 32 is formed by coating, exposing, developing, post-baking, and the like, and a first red filter film 33, a first green filter film 33, and a first blue filter film 33 defined by the black matrix 32.
As shown in fig. 6b, a first limiting dam Bank34 is formed on the black matrix BM 32 by coating, exposing, developing, post-baking, etc., and the first limiting dam defines a first opening area, a second opening area and a third opening area.
As shown in fig. 6c, the quantum dot layer is manufactured in the first opening region, the second opening region and the third opening region by coating, exposing, developing, post-baking, or the like, or by inkjet printing. The first opening area corresponds to the red sub-pixel, a first red quantum dot conversion part is formed in the first opening area, and a red quantum dot luminescent material is arranged in the first opening area; the second opening area corresponds to the green sub-pixel, a first green quantum dot conversion part is formed in the second opening area, and a green quantum dot luminescent material is arranged in the second opening area; the third opening region corresponds to the blue sub-pixel, and a first scattering particle portion is formed in the first opening region and is provided with scattering particles.
As shown in fig. 6d, a quantum dot inorganic encapsulation layer 36 is deposited by CVD, i.e. an inorganic encapsulation layer is formed covering the color conversion layer cover plate.
And finally, attaching the color conversion layer of the color conversion layer cover plate to the light emergent side of the epitaxial wafer to form an independent chip structure.
And sixthly, attaching the color conversion layer of the color conversion layer cover plate to the transparent conductive layer of the epitaxial wafer through attaching glue.
As shown in fig. 7, the transparent conductive layer 14 of the epitaxial wafer is coated with a bonding adhesive 20, and the color conversion layer cover plate 30 and the epitaxial wafer are bonded by the bonding adhesive 20.
Note that, in this embodiment, since each sub-pixel shares a common cathode, referring to fig. 2 and 3, the first limiting dam 34 of the color conversion layer cover 30 forms an opening area as shown in the drawing, and when the epitaxial wafer 10 is attached to the color conversion layer cover 30, the light emitting functional layer of each sub-pixel is aligned with the pit formed by the first limiting dam 34 and the quantum dot conversion portion, and the common cathode corresponds to the first limiting dam.
In an alternative embodiment, the thickness of the laminating adhesive is greater than or equal to 1 μm and less than or equal to 10 μm, in particular, the thickness of the laminating adhesive is 5 μm, and the width of the first limiting dam is greater than or equal to 5 μm and less than or equal to 75 μm, in particular, the width of the first limiting dam is 68.6 μm.
In this embodiment, as shown in fig. 8, the interval between light emitting functional layers and the cross color prevention are illustrated, wherein the refractive index of n-type GaN111 of the light emitting function 11 is 2.45, the refractive index of SiON36 of the quantum dot inorganic package layer is 1.8, the refractive index of the adhesive OCR20 is 1.45, and the refractive index of the quantum well 112 is 2.54.
The included angle, film thickness and optical path distance of the light rays emitted from the light-emitting functional layer relative to the vertical line are shown in the following table:
in this embodiment, θ1=80° θ2=53.6°, and the spacing S between two adjacent quantum dot conversion portions is:
S＝d1+d2-(d4-d3)/2＝hOCR*tanθ1+hSiON*tanθ2-(d4-d3)/2；
Where d1 is the side length of the side corresponding to the included angle θ1, d2 is the side length of the side corresponding to the included angle θ2, d3 is the width of the light emitting functional layer 11 of each sub-pixel, d4 is the width of the quantum dot conversion portion (in this embodiment, the width of the quantum dot conversion portion 35), h OCR is the thickness of the bonding adhesive OCR20, and h SiON is the thickness of the quantum dot inorganic encapsulation layer SiON 36.
To ensure the crosstalk prevention problem of the adjacent two sub-pixels, the width of the first defining dam is 5 μm or more and 75 μm or less when the thickness of the laminating adhesive is 1 μm or more and 10 μm or less. In the range, according to the refractive index of the n-type GaN with the light emitting function, the refractive index of the quantum dot inorganic packaging layer, the refractive index of the laminating adhesive and the refractive index of the quantum well, the cross-color crosstalk problem between two adjacent sub-pixels can be prevented within the thickness range of the laminating adhesive and the width range of the limiting dam by adjusting the included angles theta 1 and theta 2.
And seventhly, de-bonding to remove the second substrate of the epitaxial wafer or stripping the third substrate of the color conversion layer cover plate of the chip structure.
Eighth, laser cutting to form independent chip structures.
And ninth, stripping the third substrate of the color conversion layer cover plate of the chip structure, or removing the second substrate of the epitaxial wafer by means of de-bonding.
As shown in fig. 3, in a specific example, after the epitaxial wafer and the color conversion layer cover plate are attached:
a) A de-bonding process is performed to remove the second substrate 40.
B) And (3) performing laser cutting on the epitaxial wafer manufactured on the four-inch wafer and the color conversion layer cover plate manufactured on the 4-inch glass, and cutting into an independent Micro-LED chip structure.
C) Finally, the third substrate 38 is laser-peeled, and then a blue film or UV film 37 is attached to the Color-less PI 31, forming a Micro-LED chip structure as shown in FIG. 3.
In another specific example, after the epitaxial wafer and the color conversion layer cover plate are attached:
a) The laser peels off the third substrate 38.
B) And (3) performing laser cutting on the epitaxial wafer manufactured on the four-inch wafer and the color conversion layer cover plate manufactured on the 4-inch glass, and cutting into an independent Micro-LED chip structure.
C) A blue or UV film 37 was attached to Color-less PI 31.
D) Finally, a debonding process is performed to remove the second substrate 40, forming a Micro-LED chip structure as shown in fig. 3.
To this end, a Micro-LED chip structure as shown in fig. 3 was formed.
In another specific embodiment, as shown in fig. 9 and 10, fig. 9 is a top view of the chip structure of the present embodiment, and fig. 10 is a cross-sectional view of BB' of fig. 9, wherein the epitaxial wafer 10 includes a fourth sub-pixel light-emitting functional layer 1001, a fifth sub-pixel light-emitting functional layer 1002 and a sixth sub-pixel light-emitting functional layer 1003, and the epitaxial wafer 10 includes
The fourth sub-pixel light emitting functional layer 1001 includes a fourth N-type GaN10011, a fourth quantum well 10012, a fourth p-type GaN10013, and a fourth anode 10015 stacked on the fourth N-type GaN10011, and a fourth cathode N-electrode metal 10016 and a fourth cathode 10017 stacked on the fourth N-type GaN 10011;
the fifth sub-pixel light emitting functional layer comprises fifth N-type GaN, a fifth quantum well stacked on the fifth N-type GaN, fifth p-type GaN, a fifth anode, a fifth cathode N electrode metal stacked on the fifth N-type GaN, and a fifth cathode;
the sixth sub-pixel light emitting functional layer includes a sixth N-type GaN, a sixth quantum well stacked on the sixth N-type GaN, a sixth p-type GaN and a sixth anode, and a sixth cathode N-electrode metal and a sixth cathode stacked on the sixth N-type GaN.
In this embodiment, the epitaxial wafer includes a light-emitting functional layer of each sub-pixel, and the light-emitting functional layer of each sub-pixel includes an anode and a cathode. And the fourth quantum well, the fifth quantum well and the sixth quantum well are all blue quantum wells, namely the light-emitting functional layers of all the sub-pixels of the epitaxial wafer emit blue light.
As shown in fig. 9 and 10, the color conversion layer cover plate includes a color conversion layer attached to the light outgoing side of the epitaxial wafer, and a color film layer disposed on the side of the color conversion layer away from the epitaxial wafer.
Specifically, the color conversion layer includes a second defining dam 304, and fourth, fifth, and sixth opening areas defined by the second defining dam.
The fourth opening area is used for setting a second red quantum dot conversion part corresponding to the fourth sub-pixel luminescence function layer, and orthographic projection of the fourth opening area on the color conversion layer cover plate covers orthographic projection of the fourth sub-pixel luminescence function layer on the color conversion layer cover plate.
The fifth opening area is used for setting a second green quantum dot conversion part corresponding to the fifth sub-pixel luminescence function layer, and orthographic projection of the fifth opening area on the color conversion layer cover plate covers orthographic projection of the fifth sub-pixel luminescence function layer on the color conversion layer cover plate.
The sixth opening area is used for setting a second scattering particle part corresponding to the sixth sub-pixel luminescence functional layer, and orthographic projection of the sixth opening area on the color conversion layer cover plate covers orthographic projection of the sixth sub-pixel luminescence functional layer on the color conversion layer cover plate.
In this embodiment, the color conversion layer defines, by the second limiting dam, an opening area provided corresponding to each sub-pixel light emitting functional layer, each opening area being respectively used for placing a red quantum dot light emitting material, a green quantum dot light emitting material, and a scattering material corresponding to blue light. Thereby utilizing blue light emitted by each sub-pixel luminous functional layer of the epitaxial wafer to respectively excite quantum dot luminous materials of each color to form different colors, and utilizing the scattering materials to further uniformly emit blue light.
The specific implementation is similar to the previous embodiment, and will not be repeated here.
In consideration of luminance conversion ratios of different quantum dot conversion sections of the color conversion layer, in an alternative embodiment, an opening area of the fourth opening region is equal to or larger than an opening area of the fifth opening region, and an opening area of the fifth opening region is equal to or larger than an opening area of the sixth opening region.
In the present embodiment, the luminance of each sub-pixel is adjusted by adjusting the current of the driving transistor of each sub-pixel and the different opening area corresponding to each pixel. The specific implementation is similar to the previous embodiment, and will not be repeated here.
Since the light emitting functional layer of each sub-pixel of the epitaxial wafer in this embodiment includes the anode and the corresponding cathode, the color conversion layer corresponding to each sub-pixel forms a pit structure of the second limiting dam and the corresponding quantum dot conversion portion and scattering particle portion, and the pit structure corresponds to the light emitting functional layer of the entire sub-pixel, that is, the pit mechanism covering the anode and the cathode of each sub-pixel. When the light-emitting functional layer is bonded to the epitaxial wafer, the assembly stability of the light-emitting functional layer and the corresponding color conversion layer of each sub-pixel can be ensured.
The color conversion layer cover plate further comprises a color film layer arranged on one side, far away from the epitaxial wafer, of the color conversion layer. In an alternative embodiment, the color film layer includes a black matrix, a second red filter film corresponding to a second red quantum dot conversion part defined by the black matrix, a second green filter film corresponding to a second green quantum dot conversion part, and a second blue filter film corresponding to a second scattering particle part.
In this embodiment, the light-emitting effect of the Micro-LED chip is further defined by providing a color film layer, and the color film layer further filters the red light, the green light and the blue light emitted from the color conversion layer, so as to further prevent the color cross problem of the chip.
As shown in fig. 9, the Micro-LED chip has a square structure, wherein three sub-pixels are respectively and sequentially and averagely arranged at the upper, middle and lower positions, so that the display effect of the Micro-LED chip is further improved. Specifically, the distance between the epitaxial wafer 10 and the chip edge is a, the distance between each electrode Pad and the epitaxial wafer edge is b, the distance between the cathode N Pad and each anode P Pad is equal to or greater than d, and the distance between the light emitting functional layers of each sub-pixel is equal to or greater than e.
In one specific example, as shown in FIGS. 9-11, a complete process of Micro-LED chips is described.
First, an epitaxial wafer including a light-emitting functional layer of each sub-pixel is formed.
In this embodiment, blue LEDs partitioned by pixels are fabricated on a 4-inch wafer, and one pixel includes three sub-pixels, i.e., three blue LEDs.
1) A light emitting functional layer of the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel is formed on the fourth substrate.
As shown in fig. 11a, a surface treatment is performed on a sapphire or silicon wafer substrate 1007 and a GaN buffer layer 1008, an N-type GaN layer 10011, a quantum well layer 10012, and a P-type GaN layer 10013 are sequentially deposited.
As shown in fig. 11b, a photoresist 10016 is formed on the P-type GaN layer 10013.
As shown in fig. 11c, the p-type GaN layer, the quantum well layer and a part of the N-type GaN layer in the region between the sub-pixels and the negative electrode region are removed through a photolithography-etching process, so that independent sub-pixels are formed; namely, a fourth n-type GaN10011, a fourth quantum well 10012, and a fourth p-type GaN10013 are formed.
As shown in fig. 11d, a P-electrode metal layer 10014 is formed on the P-type GaN layer 10013, and the P-electrode metal layer 10014 is made of ITO.
As shown in fig. 11e, an N-electrode metal layer 10016 is formed on the N-type GaN 10011.
As shown in fig. 11f, a DBR layer 10018 is formed to cover the light emitting function layer of each sub-pixel, and a via hole is etched on the DBR layer 10018.
As shown in fig. 11g, a Bonding pad is formed on the DBR layer 10018, filling the via hole, and forming an anode electrode 10015 and a cathode electrode 10017, respectively.
2) And transferring the epitaxial wafer to a fifth substrate through bonding glue.
As shown in fig. 11h, the epitaxial wafer is bonded to the fifth substrate 40 by the bonding adhesive 41. 3) And stripping the fourth substrate.
As shown in fig. 11i, the fourth substrate 1007 is peeled off using a laser.
As shown in fig. 11j, gaN buffer layer 1008 is exposed.
And secondly, forming a color conversion layer cover plate, wherein the color conversion layer cover plate comprises a color conversion layer and a color film layer.
4) And sequentially forming a color film layer and a color conversion layer on the sixth substrate.
In this embodiment, a 4-inch glass substrate corresponding to a 4-inch wafer for manufacturing an epitaxial wafer is used to form a color conversion layer cover plate, which includes color films and color conversion layers corresponding to the sub-pixels of each pixel, wherein the color film layer includes a black matrix and a color filter within an opening area defined by the black matrix, and the color conversion layer includes a first limiting dam and a quantum dot conversion portion within the opening area defined by the first limiting dam.
Similar to the previous embodiments shown in fig. 6a-6d, color-less PI 301 is fabricated on a glass substrate 308 by coating and post-baking, a black matrix BM 302 is fabricated by coating, exposing, developing, post-baking, and the like, and a filter film 303 defined by the black matrix 302 is formed as shown in fig. 10 and 12.
The black matrix BM 302 is formed by coating, exposing, developing, post-baking, and the like, to form a second defining dam Bank304, where the second defining dam defines a fourth opening region, a fifth opening region, and a sixth opening region.
And the quantum dot layers are manufactured in the fourth opening area, the fifth opening area and the sixth opening area by adopting modes of coating, exposure, development, post-baking and the like or an ink-jet printing mode. The fourth opening area corresponds to the red sub-pixel, a second red quantum dot conversion part is formed in the fourth opening area, and a red quantum dot luminescent material is arranged; the fifth opening area corresponds to the green sub-pixel, a second green quantum dot conversion part is formed in the fifth opening area, and a green quantum dot luminescent material is arranged; the sixth opening region corresponds to the blue sub-pixel, and a second scattering particle portion is formed in the sixth opening region, and scattering particles are provided.
And depositing a quantum dot inorganic packaging layer 306 by adopting a CVD (chemical vapor deposition) mode, namely forming the inorganic packaging layer covering the color conversion layer cover plate.
And finally, attaching the color conversion layer of the color conversion layer cover plate to the light emergent side of the epitaxial wafer to form an independent chip structure.
5) Attaching the color conversion layer of the color conversion layer cover plate to the luminous functional layer of each sub-pixel of the epitaxial wafer through attaching glue;
As shown in fig. 10 and 12, a bonding paste 20 is applied to the GaN buffer layer 1008 of the epitaxial wafer, and the color conversion layer cap plate 30 and the epitaxial wafer are bonded by the bonding paste 20.
It should be noted that, since each sub-pixel has an anode and a corresponding cathode, referring to fig. 9 and 10, the second limiting dam 304 of the color conversion layer cover 30 forms an opening area as shown in the drawing, and when the epitaxial wafer 10 is attached to the color conversion layer cover 30, the light emitting functional layer of each sub-pixel is aligned with the pit formed by the second limiting dam 304 and the quantum dot conversion portion, and compared with the previous embodiments, the light emitting area is increased.
6) Removing the fifth substrate of the epitaxial wafer by means of de-bonding, or stripping the sixth substrate of the color conversion layer cover plate of the chip structure;
7) Laser cutting to form independent chip structures;
8) And stripping the sixth substrate of the color conversion layer cover plate of the chip structure, or removing the fifth substrate of the epitaxial wafer by de-bonding.
As shown in fig. 10 and 12, in a specific example, after the epitaxial wafer and the color conversion layer cover plate are attached:
a) A debonding process is performed to remove the fifth substrate 40.
B) And (3) performing laser cutting on the epitaxial wafer manufactured on the four-inch wafer and the color conversion layer cover plate manufactured on the 4-inch glass, and cutting into an independent Micro-LED chip structure.
C) Finally, the sixth substrate 308 is laser-peeled, and then a blue film or UV film 307 is attached to the Color-less PI 301, forming a Micro-LED chip structure as shown in FIG. 10.
In another specific example, after the epitaxial wafer and the color conversion layer cover plate are attached:
a) The laser peels off the sixth substrate 308.
B) And (3) performing laser cutting on the epitaxial wafer manufactured on the four-inch wafer and the color conversion layer cover plate manufactured on the 4-inch glass, and cutting into an independent Micro-LED chip structure.
C) A blue or UV film 307 was attached to Color-less PI 301.
D) Finally, a debonding process is performed to remove the fifth substrate 40, forming a Micro-LED chip structure as shown in fig. 10.
To this end, a Micro-LED chip structure as shown in fig. 10 is formed.
Based on the above chip structure, an embodiment of the present invention further provides a display device, including the above chip structure. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame or a navigator.
Corresponding to the chip structure provided by the above embodiments, an embodiment of the present application further provides a manufacturing method for manufacturing the chip structure, and since the manufacturing method provided by the embodiment of the present application corresponds to the chip structure provided by the above several embodiments, the foregoing embodiment is also applicable to the manufacturing method provided by the embodiment, and will not be described in detail in the present embodiment.
As shown in fig. 13, an embodiment of the present application further provides a method for manufacturing the chip structure, including: forming an epitaxial wafer comprising a light-emitting functional layer of each sub-pixel; forming a color conversion layer cover plate, wherein the color conversion layer cover plate comprises a color conversion layer and a color film layer; and attaching the color conversion layer of the color conversion layer cover plate to the light emergent side of the epitaxial wafer to form an independent chip structure.
According to the manufacturing method provided by the embodiment, the epitaxial wafer substrate and the color conversion layer cover plate which are manufactured independently are attached to form a chip structure, and meanwhile, the epitaxial wafer substrate and the color conversion layer cover plate substrate are removed, so that on one hand, the transfer efficiency of the Micro-LED is improved, the thickness of the chip is reduced, the manufacturing precision and the product yield are improved, and the problem that the chip is fragile due to the fact that the epitaxial wafer substrate is thinned in the prior art can be solved; on the other hand, the external quantum efficiency of red light and green light is effectively improved through the color conversion layer of the color conversion layer cover plate, the crosstalk problem between adjacent sub-pixels is prevented, the display effect of the Micro-LED display device can be improved, further user experience is improved, and the Micro-LED display device has practical application prospect.
In an alternative embodiment, the forming the epitaxial wafer including the light emitting functional layer of each sub-pixel further includes: forming a light emitting function layer of a first sub-pixel, a light emitting function layer of a second sub-pixel, a light emitting function layer of a third sub-pixel, and a common cathode on a first substrate; transferring the epitaxial wafer to a second substrate through bonding glue; peeling the first substrate; forming a transparent conductive layer electrically connecting the light emitting function layer of the first sub-pixel, the light emitting function layer of the second sub-pixel, the light emitting function layer of the third sub-pixel and the common cathode; the forming of the color conversion layer cover plate further includes: sequentially forming a color film layer and a color conversion layer on a third substrate; the attaching the color conversion layer of the color conversion layer cover plate to the light emitting side of the epitaxial wafer and forming an independent chip structure further comprises: attaching the color conversion layer of the color conversion layer cover plate to the transparent conductive layer of the epitaxial wafer through attaching glue; the second substrate of the epitaxial wafer is removed through de-bonding, or the third substrate of the color conversion layer cover plate of the chip structure is stripped; laser cutting to form independent chip structures; and stripping the third substrate of the color conversion layer cover plate of the chip structure, or removing the second substrate of the epitaxial wafer by de-bonding.
In this embodiment, an independent chip structure is formed by bonding an epitaxial wafer and a color conversion layer cover plate which are respectively manufactured, specifically, the epitaxial wafer includes a light emitting functional layer and a common cathode of each sub-pixel, and the light emitting functional layer and the common cathode of each sub-pixel are electrically connected through a connection metal of the transparent conductive layer and the common cathode. Then, the epitaxial wafer and the corresponding color conversion layer cover plate are bonded and then subjected to chip cutting to form a chip structure with a substrate removed, and the chip structure has the characteristics of high transfer efficiency of Micro-LEDs, thin chip thickness, high preparation precision, high product yield and the like, and can solve the problem of chip fragility caused by thinning of the epitaxial wafer substrate in the prior art; on the other hand, the external quantum efficiency of red light and green light is effectively improved, the crosstalk problem between adjacent sub-pixels is prevented, and the display effect of the Micro-LED display device can be improved.
In another alternative embodiment, the forming the epitaxial wafer including the light emitting function layer of each sub-pixel further includes: forming a light emitting functional layer of a fourth sub-pixel, a fifth sub-pixel, and a sixth sub-pixel on a fourth substrate, the light emitting functional layer including N-type GaN, a quantum well stacked on the N-type GaN, p-type GaN, and an anode electrode, and a cathode N-electrode metal stacked on the N-type GaN, and a cathode electrode; transferring the epitaxial wafer to a fifth substrate through bonding glue; peeling the fourth substrate; the forming of the color conversion layer cover plate further includes: sequentially forming a color film layer and a color conversion layer on a sixth substrate; the attaching the color conversion layer of the color conversion layer cover plate to the light emitting side of the epitaxial wafer and forming an independent chip structure further comprises: attaching the color conversion layer of the color conversion layer cover plate to the luminous functional layer of each sub-pixel of the epitaxial wafer through attaching glue; removing the fifth substrate of the epitaxial wafer by means of de-bonding, or stripping the sixth substrate of the color conversion layer cover plate of the chip structure; laser cutting to form independent chip structures; and stripping the sixth substrate of the color conversion layer cover plate of the chip structure, or removing the fifth substrate of the epitaxial wafer by de-bonding.
In this embodiment, an independent chip structure is formed by bonding an epitaxial wafer and a color conversion layer cover plate which are respectively manufactured, specifically, the epitaxial wafer includes a light emitting functional layer of each sub-pixel, each light emitting functional layer includes an anode and a corresponding cathode, and the light emitting functional layer of each sub-pixel and the common cathode are electrically connected through a connection metal of the transparent conductive layer and the common cathode. Then, the epitaxial wafer and the corresponding color conversion layer cover plate are bonded and then subjected to chip cutting to form a chip structure with a substrate removed, and the chip structure has the characteristics of high transfer efficiency of Micro-LEDs, thin chip thickness, high preparation precision, high product yield and the like, and can solve the problem of chip fragility caused by thinning of the epitaxial wafer substrate in the prior art; on the other hand, the external quantum efficiency of red light and green light is effectively improved, the crosstalk problem between adjacent sub-pixels is prevented, and the display effect of the Micro-LED display device can be improved.
It should be understood that the foregoing examples of the present invention are provided merely for clearly illustrating the present invention and are not intended to limit the embodiments of the present invention, and that various other changes and modifications may be made therein by one skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.

Claims (35)

1. A chip structure is characterized in that,
Comprises an epitaxial wafer and a color conversion layer cover plate positioned on the light emitting side of the epitaxial wafer, wherein
The epitaxial wafer comprises a light-emitting functional layer of a plurality of sub-pixels;
The color conversion layer cover plate includes a color conversion layer.
2. The chip structure of claim 1, wherein the epitaxial wafer comprises a fourth sub-pixel light emitting functional layer, a fifth sub-pixel light emitting functional layer, and a sixth sub-pixel light emitting functional layer;
The fourth sub-pixel luminescence functional layer comprises a fourth n-type GaN, a fourth quantum well, a fourth p-type GaN and a fourth anode, wherein the fourth quantum well, the fourth p-type GaN and the fourth anode are stacked on the fourth n-type GaN;
The fifth sub-pixel luminescence functional layer comprises fifth n-type GaN, a fifth quantum well, fifth p-type GaN and a fifth anode, wherein the fifth quantum well, the fifth p-type GaN and the fifth anode are stacked on the fifth n-type GaN;
The sixth sub-pixel light emitting functional layer includes a sixth n-type GaN, a sixth quantum well stacked on the sixth n-type GaN, a sixth p-type GaN, and a sixth anode.
3. The chip structure of claim 2, wherein the fourth quantum well, the fifth quantum well, and the sixth quantum well are all blue quantum wells.
4. The chip structure of claim 2, wherein the fourth n-type GaN, the fifth n-type GaN, and the sixth n-type GaN are co-layer disposed.
5. The chip structure of claim 2, wherein the fourth n-type GaN, the fifth n-type GaN, and the sixth n-type GaN are formed by a same fabrication process.
6. The chip structure of claim 2, wherein the epitaxial wafer further comprises a GaN buffer layer located on the epitaxial wafer proximate to the color conversion layer cover plate,
The GaN buffer layer comprises a first buffer part overlapped with the fourth quantum well, a second buffer part overlapped with the fifth quantum well and a third buffer part overlapped with the sixth quantum well, and further comprises a connecting part, part of the connecting part is positioned between the first buffer part and the second buffer part, and part of the connecting part is positioned between the second buffer part and the third buffer part.
7. The chip structure of claim 6, wherein a portion of the connection portion is disposed around the first buffer portion, the second buffer portion, and the third buffer portion.
8. The chip structure of claim 6, wherein the orthographic projection of the fourth n-type GaN on the GaN buffer layer extension plane, the orthographic projection of the fifth n-type GaN on the GaN buffer layer extension plane, and the orthographic projection of the sixth n-type GaN on the GaN buffer layer extension plane are all located inside the GaN buffer layer.
9. The chip structure of claim 2, wherein the fourth sub-pixel light emitting functional layer further comprises a fourth cathode N-electrode metal and a fourth cathode disposed overlying the fourth N-type GaN.
10. The chip structure of claim 9, wherein the fifth sub-pixel light emitting functional layer further comprises a fifth cathode N-electrode metal and a fifth cathode disposed overlying the fifth N-type GaN;
the sixth sub-pixel light emitting functional layer further includes a sixth cathode N-electrode metal and a sixth cathode stacked on the sixth N-type GaN.
11. The chip structure according to claim 10, wherein the fourth sub-pixel light-emitting functional layer, the fifth sub-pixel light-emitting functional layer, and the sixth sub-pixel light-emitting functional layer are arranged side by side in order;
The fourth anode, the fifth cathode and the sixth anode are arranged along the column direction, the fourth cathode, the fifth anode and the sixth cathode are arranged along the column direction, the fourth anode and the fourth cathode are arranged along the row direction, the fifth anode and the fifth cathode are arranged along the row direction, and the sixth anode and the sixth cathode are arranged along the row direction.
12. The chip structure of claim 9, wherein the epitaxial layer further comprises a DBR layer overlying the fourth p-type GaN and the fourth cathode N-electrode metal;
The DBR layer comprises a first via hole and a first cathode via hole, the fourth anode is electrically connected with the fourth p-type GaN through the first via hole, and the fourth cathode is electrically connected with the fourth cathode N electrode through the first cathode via hole.
13. The chip structure of claim 2, wherein the epitaxial layer further comprises a DBR layer covering the fourth p-type GaN, the fifth p-type GaN, the sixth p-type GaN;
The DBR layer comprises a first via hole, a second via hole and a third via hole, the fourth anode is electrically connected with the fourth p-type GaN through the first via hole, the fifth anode is electrically connected with the fifth p-type GaN through the second via hole, and the sixth anode is electrically connected with the fifth p-type GaN through the third via hole.
14. The chip structure of claim 2, wherein the fourth p-type GaN and the fourth anode are electrically connected by an ITO layer, the fifth p-type GaN and the fourth anode are electrically connected by an ITO layer, and the fifth p-type GaN and the fourth anode are electrically connected by an ITO layer.
15. The chip structure of claim 1, wherein the epitaxial wafer comprises a common cathode, and the light emitting functional layers of the plurality of sub-pixels are electrically connected to the common cathode, respectively.
16. The chip structure of claim 15, wherein the common cathode comprises a cathode electrode, the light emitting functional layers of the plurality of sub-pixels comprise a first sub-pixel light emitting functional layer comprising a first anode, a second sub-pixel light emitting functional layer comprising a second anode, a third sub-pixel light emitting functional layer comprising a third anode;
The common cathode, the first anode, the second anode and the third anode are arranged in a two-row two-column array.
17. The chip structure of claim 15, wherein the light emitting functional layers of the plurality of sub-pixels comprise a first sub-pixel light emitting functional layer, a second sub-pixel light emitting functional layer, a third sub-pixel light emitting functional layer;
The first sub-pixel luminescence functional layer comprises a first n-type GaN, a first quantum well, a first p-type GaN and a first anode which are stacked;
The second sub-pixel luminescence functional layer comprises a second n-type GaN, a second quantum well, a second p-type GaN and a second anode which are stacked;
the third sub-pixel luminescence functional layer comprises third n-type GaN, a third quantum well, third p-type GaN and a third anode which are stacked;
The common cathode includes cathode N-type GaN, cathode N electrode metal and cathode electrode which are stacked.
18. The chip structure of claim 17, wherein the common cathode further comprises a connection metal electrically connected to the cathode N-electrode metal, the connection metal being electrically connected to the light emitting functional layer of the first sub-pixel, the second sub-pixel light emitting functional layer, and the third sub-pixel light emitting functional layer, respectively.
19. The chip structure of claim 17, wherein the epitaxial wafer comprises a transparent conductive layer covering the first n-type GaN of the first sub-pixel light emitting functional layer, the second n-type GaN of the second sub-pixel light emitting functional layer, the third n-type GaN of the third sub-pixel light emitting functional layer, the cathode n-type GaN of the common cathode, and a connection metal.
20. The chip structure of claim 17, wherein the epitaxial layer further comprises a DBR layer covering the first p-type GaN, the second p-type GaN, the third p-type GaN;
The DBR layer comprises a fourth via hole, a fifth via hole and a sixth via hole, the first anode is electrically connected with the first p-type GaN through the fourth via hole, the second anode is electrically connected with the second p-type GaN through the fifth via hole, and the third anode is electrically connected with the third p-type GaN through the sixth via hole;
The DBR layer further includes a second cathode via through which the cathode electrode is electrically connected to the cathode N electrode metal.
21. The chip structure of claim 17, wherein the first p-type GaN and the first anode are electrically connected by an ITO layer, the second p-type GaN and the second anode are electrically connected by an ITO layer, and the third p-type GaN and the third anode are electrically connected by an ITO layer.
22. The chip structure of any one of claims 1-21, wherein the epitaxial wafer and the color conversion layer cover plate are bonded by a bonding adhesive.
23. The chip structure of claim 22, wherein the thickness of the adhesive is 1 μm or more and 10 μm or less.
24. The chip structure according to any one of claims 1 to 21, wherein,
The color conversion layer comprises a limiting dam, a first target opening area, a second target opening area and a third opening area, wherein the first target opening area, the second target opening area and the third opening area are defined by the limiting dam;
The luminous functional layers of the plurality of sub-pixels comprise a first target sub-pixel luminous functional layer, a second target sub-pixel luminous functional layer and a third target sub-pixel luminous functional layer;
the light emitted by the first target sub-pixel light-emitting functional layer passes through the first target opening area to form red light, the light emitted by the second target sub-pixel light-emitting functional layer passes through the second target opening area to form green light, and the light emitted by the third target sub-pixel light-emitting functional layer passes through the third target opening area to keep blue light.
25. The chip structure of claim 24, wherein the first target opening region is configured to provide a red quantum dot conversion portion corresponding to the first target sub-pixel light emitting functional layer, and the second target opening region is configured to provide a green quantum dot conversion portion corresponding to the second target sub-pixel light emitting functional layer.
26. The chip structure of claim 24, wherein the third target opening region is configured to provide a scattering particle portion corresponding to the third target sub-pixel light-emitting functional layer.
27. The chip structure of claim 24, wherein the first target sub-pixel light emitting functional layer is a first sub-pixel light emitting functional layer, the second target sub-pixel light emitting functional layer is a second sub-pixel light emitting functional layer, the third target sub-pixel light emitting functional layer is a third sub-pixel light emitting functional layer, or
The first target sub-pixel light-emitting functional layer is a fourth sub-pixel light-emitting functional layer, the second target sub-pixel light-emitting functional layer is a fifth sub-pixel light-emitting functional layer, and the third target sub-pixel light-emitting functional layer is a sixth sub-pixel light-emitting functional layer.
28. The chip structure of claim 24, wherein the opening area of the first opening region, the opening area of the second opening region, and the opening area of the third opening region are not identical.
29. The chip structure of claim 24, wherein the orthographic projection of the first target opening area on the color conversion layer cover plate covers the orthographic projection of the first target sub-pixel luminescence function layer on the color conversion layer cover plate, and/or,
The orthographic projection of the second target opening area on the color conversion layer cover plate covers the orthographic projection of the second target sub-pixel luminescence function layer on the color conversion layer cover plate, and/or,
And the orthographic projection of the third target opening area on the color conversion layer cover plate covers the orthographic projection of the third target sub-pixel luminous functional layer on the color conversion layer cover plate.
30. The chip structure of claim 24, wherein the color conversion layer cover plate further comprises a color film layer disposed on a side of the color conversion layer away from the epitaxial wafer;
The color film layer includes a black matrix, a red filter film corresponding to a first target opening area defined by the black matrix, a green filter film corresponding to a second target opening area, and a blue filter film corresponding to a third target opening area.
31. The chip structure of claim 30, wherein the color conversion layer cover plate comprises a colorless PI layer on a side of the color film layer remote from the color conversion layer.
32. The chip structure of any one of claims 1-21, wherein an orthographic projection of the epitaxial wafer on the color conversion layer cover plate is located inside the color conversion layer cover plate, and a certain distance exists between any point on an outer contour of the orthographic projection of the epitaxial wafer on the color conversion layer cover plate and the outer contour of the color conversion layer cover plate.
33. A display device comprising the chip structure of any one of claims 1-32;
Wherein each of the chip structures includes a plurality of sub-pixels, and the chip structures serve as one pixel of the display device.
34. A method of fabricating a chip structure, comprising:
Forming an epitaxial wafer comprising a light-emitting functional layer of a plurality of sub-pixels;
forming a color conversion layer cover plate, wherein the color conversion layer cover plate comprises a color conversion layer;
and attaching the color conversion layer of the color conversion layer cover plate to the light emergent side of the epitaxial wafer to form an independent chip structure.
35. The method of claim 34, wherein the step of determining the position of the probe is performed,
The epitaxial wafer for forming the light-emitting functional layer comprising each sub-pixel further comprises:
Forming a light emitting function layer and a common cathode of the plurality of sub-pixels on a first substrate;
transferring the epitaxial wafer to a second substrate through bonding glue;
Peeling the first substrate;
the forming of the color conversion layer cover plate further includes: sequentially forming a color film layer and a color conversion layer on a third substrate;
The attaching the color conversion layer of the color conversion layer cover plate to the light emitting side of the epitaxial wafer and forming an independent chip structure further comprises:
attaching the color conversion layer of the color conversion layer cover plate to the epitaxial wafer through attaching glue;
the second substrate of the epitaxial wafer is removed through de-bonding, or the third substrate of the color conversion layer cover plate of the chip structure is stripped;
laser dicing forms individual chip structures.
CN202410196401.2A 2021-08-30 2021-08-30 Chip structure, manufacturing method and display device Pending CN117976693A (en)

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