CN117937965B - Neutral point potential balance control method, electronic device, and computer-readable storage medium - Google Patents
Neutral point potential balance control method, electronic device, and computer-readable storage medium Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4833—Capacitor voltage balancing
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
- H02M7/53876—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
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Abstract
The invention discloses a neutral point potential balance control method, electronic equipment and a storage medium, wherein the neutral point potential balance control method is applied to a three-level three-phase four-bridge arm inverter and comprises the following steps: in each control period, acquiring a first real-time voltage, a second real-time voltage, each capacitor voltage and each inductor current; calculating a voltage difference value between the first real-time voltage and the second real-time voltage, and calculating a product result of capacitance voltage and inductance current corresponding to each single phase; determining a neutral point potential balance symbol according to the product results corresponding to the three phases respectively; determining neutral point potential balance zero sequence components of the three phases according to the voltage difference value, the neutral point potential balance symbol and preset neutral point potential balance parameters; the neutral point potential balance zero sequence components of the three phases are respectively and correspondingly overlapped on the three-phase modulation waves, so that the voltage balance of the positive bus and the negative bus of the inverter can be realized under the complex load, and the safe operation of the inverter is ensured.
Description
Technical Field
The invention relates to the technical field of inverters, in particular to a neutral point potential balance control method, electronic equipment and a computer readable storage medium.
Background
The three-phase four-bridge arm inverter can flexibly provide three-phase four-wire, three-phase three-wire and even single-phase power interfaces according to actual needs, improves electromagnetic compatibility performance and reliability of an inverter system and the like, and is widely applied to multiple occasions such as charging and discharging of an electric automobile, grid-connected power generation of new energy, motor driving and the like. The current three-phase four-bridge arm inverter mostly adopts a pulse width modulation technology to realize accurate control of output voltage or current, and electromagnetic interference caused by neutral points to earth leakage current can be reduced, but the balance influence of positive and negative bus voltages is not considered, so that midpoint potential cannot be balanced. Therefore, how to realize the voltage balance of the positive bus and the negative bus of the inverter becomes a technical problem to be solved.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, the invention provides a neutral point potential balance control method, electronic equipment and a computer readable storage medium, which can realize the voltage balance of positive and negative buses of an inverter.
In a first aspect, an embodiment of the present invention provides a midpoint potential balance control method applied to a three-level three-phase four-leg inverter, where the three-level three-phase four-leg inverter includes: the direct-current input unit comprises a direct-current power supply, a positive bus capacitor and a negative bus capacitor, wherein the positive bus capacitor and the negative bus capacitor are connected in series to form a positive bus branch and a negative bus branch, and the positive bus branch and the negative bus branch are connected with the direct-current power supply in parallel;
the power unit comprises four inversion switch units, and each inversion switch unit is connected with the output end of the direct current input unit;
The alternating current filtering unit comprises at least three filter units, each filter unit corresponds to one single phase, each filter unit comprises a first filtering inductor and a filtering capacitor, one end of the first filtering inductor is connected with the output end of a corresponding inverting switch unit, and the other end of the first filtering inductor is connected with the filtering capacitor so as to filter and output three-phase modulated waves;
The method comprises the following steps: in each control period, respectively acquiring a first real-time voltage at two ends of the positive bus capacitor, a second real-time voltage at two ends of the negative bus capacitor, capacitor voltages at two ends of each filter capacitor and inductance currents flowing through each first filter inductor;
Calculating a voltage difference value between the first real-time voltage and the second real-time voltage, and calculating a product result of the capacitor voltage and the inductor current corresponding to each single phase;
Determining a midpoint potential balance symbol according to the product results corresponding to the three phases respectively;
Determining neutral point potential balance zero sequence components of three phases according to the voltage difference value, the neutral point potential balance symbol and preset neutral point potential balance parameters;
And correspondingly superposing the neutral-point potential balance zero sequence components of the three phases on the modulation waves of the three phases respectively.
Optionally, in an embodiment of the present invention, the determining a midpoint potential balance sign according to the product results corresponding to three phases includes: when the product result corresponding to one single phase is greater than or equal to zero, determining that the neutral point potential balance symbol is positive;
Or alternatively
When the product result corresponding to one single phase is smaller than zero, determining that the neutral point potential balance sign is negative;
The midpoint potential balance symbol is recorded as ：；
Wherein,For each single phase the inductor current is corresponding,For each single phase the corresponding capacitor voltage,Representing three phasesThe phase of the liquid phase is selected,Representing three phasesThe phase of the liquid phase is selected,Representing three phasesAnd (3) phase (C).
Optionally, in one embodiment of the present invention, the determining a neutral point potential balance zero sequence component of the three phases according to the voltage difference value, the neutral point potential balance symbol and a preset neutral point potential balance parameter includes: calculating the product of the voltage difference value, the midpoint potential balance symbol and a preset midpoint potential balance parameter to obtain a three-phase midpoint potential balance zero sequence component;
the neutral potential balance zero sequence component of the three phases is recorded as ：；
Wherein,For the voltage difference value to be the same,Is the neutral point potential balance parameter.
Alternatively, in one embodiment of the invention,Wherein, the method comprises the steps of, wherein,For the ac side rated voltage,Is the modulation ratio.
Optionally, in one embodiment of the present invention, before calculating the voltage difference between the first real-time voltage and the second real-time voltage, the method further includes: and respectively carrying out low-pass filtering processing on the first real-time voltage and the second real-time voltage so as to eliminate high-frequency interference of the first real-time voltage and the second real-time voltage.
Optionally, in one embodiment of the present invention, before the acquiring the first real-time voltage across the positive bus capacitor, the second real-time voltage across the negative bus capacitor, the capacitor voltage across each of the filter capacitors, and the inductor current flowing through each of the first filter inductors, the method further includes: and superposing a preset first zero sequence component on the three-phase modulation wave so as to update the three-phase modulation wave.
Optionally, in an embodiment of the present invention, the first zero sequence component is:；
Wherein, Is thatThe phase-modulated wave is transmitted to the optical element,Is thatThe phase-modulated wave is transmitted to the optical element,Is thatPhase modulated waves.
In a second aspect, an embodiment of the present invention provides an electronic device, including: at least one processor;
at least one memory for storing at least one program;
the midpoint potential balance control method according to the first aspect is implemented when at least one of the programs is executed by at least one of the processors.
In a third aspect, an embodiment of the present invention provides a computer-readable storage medium in which a processor-executable program is stored, the processor-executable program being for implementing the midpoint potential balance control method according to the first aspect when executed by a processor.
The three-level three-phase four-bridge arm inverter, the midpoint potential balance control method, the electronic equipment and the computer readable storage medium provided by the invention are used for respectively sampling the positive bus capacitor, the negative bus capacitor, each filter capacitor and each first filter inductor to calculate a voltage difference value and a midpoint potential balance symbol, then determining a midpoint potential balance zero sequence component according to the voltage difference value, the midpoint potential balance symbol and a preset midpoint potential balance parameter, and further realizing the voltage balance of the positive bus and the negative bus of the inverter under complex load in a mode of superposing the midpoint potential balance zero sequence component on a modulation wave, thereby reducing risks and defects caused by unbalanced positive and negative bus voltages and ensuring the safe operation of the inverter.
Drawings
Fig. 1 is a schematic circuit diagram of a three-level three-phase four-leg inverter according to an embodiment of the present invention;
FIG. 2 is a flowchart of a method for controlling neutral point potential balance according to an embodiment of the present invention;
Fig. 3 is a flowchart of step S3000 in fig. 2;
fig. 4 (a) is an equivalent circuit schematic diagram of the action of the small vector POO in the case where the current direction is positive;
fig. 4 (b) is an equivalent circuit schematic diagram of the effect of the small vector POO in the case where the current direction is negative;
fig. 5 (a) is an equivalent circuit schematic diagram of the action of the small vector ONN in the case where the current direction is positive;
fig. 5 (b) is an equivalent circuit schematic diagram of the effect of the small vector ONN in the case where the current direction is negative;
fig. 6 is a flowchart before step S1000 in fig. 2;
FIG. 7 is a schematic diagram of a neutral point potential balance control method according to an embodiment of the present invention;
Fig. 8 is a flowchart of step S4000 in fig. 2;
fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
It should be noted that although functional block division is performed in a device diagram and a logic sequence is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart.
The invention provides a neutral point potential balance control method, electronic equipment and a computer readable storage medium, wherein the neutral point potential balance control method comprises the following steps: in each control period, respectively acquiring a first real-time voltage at two ends of a positive bus capacitor, a second real-time voltage at two ends of a negative bus capacitor, capacitor voltages at two ends of each filter capacitor and inductance currents flowing through each first filter inductor; calculating a voltage difference value between the first real-time voltage and the second real-time voltage, and calculating a product result of capacitance voltage and inductance current corresponding to each single phase; determining a neutral point potential balance symbol according to the product results corresponding to the three phases respectively; determining neutral point potential balance zero sequence components of the three phases according to the voltage difference value, the neutral point potential balance symbol and preset neutral point potential balance parameters; and correspondingly overlapping the neutral-point potential balance zero sequence components of the three phases to the three-phase modulation waves respectively. According to the invention, the positive bus capacitor, the negative bus capacitor, each filter capacitor and each first filter inductor are respectively sampled to calculate the voltage difference value and the midpoint potential balance symbol, then the midpoint potential balance zero sequence component can be determined according to the voltage difference value, the midpoint potential balance symbol and the preset midpoint potential balance parameter, and further the positive bus voltage balance and the negative bus voltage balance of the inverter can be realized under complex load in a mode of superposing the midpoint potential balance zero sequence component on a modulation wave, so that risks and defects caused by unbalanced positive bus voltage and negative bus voltage are reduced, and safe operation of the inverter is ensured.
Fig. 1 is a schematic circuit diagram of a three-level three-phase four-leg inverter according to an embodiment of the present invention.
As shown in fig. 1, the three-level three-phase four-leg inverter includes, but is not limited to: the direct current input unit 100 comprises a direct current power supply Vdc, a positive bus capacitor Cup and a negative bus capacitor Cdw, wherein the positive bus capacitor Cup and the negative bus capacitor Cdw are connected in series to form a positive bus branch and a negative bus branch, the positive bus branch is connected with the direct current power supply Vdc in parallel, the positive bus capacitor Cup is arranged on a positive bus, the negative bus capacitor Cdw is arranged on a negative bus, the specific specifications of the positive bus capacitor Cup and the negative bus capacitor Cdw are various, and the positive bus capacitor Cup and the negative bus capacitor Cdw can be correspondingly arranged according to specific scenes, and are not limited herein;
The power unit 200 includes four inverter switch units, each of which is connected to an output end of the dc input unit 100, wherein the first three inverter switch units correspond to three phases, that is, each inverter switch unit corresponds to one single phase, the fourth inverter switch unit corresponds to a bridge arm N, each inverter switch unit is formed by connecting four switch tubes (e.g., QA1, QA2, QA3, QA4, or QB1, QB2, QB3, QB4, or QC1, QC2, QC3, QC4, or QN1, QN2, QN3, QN 4) and two diode combinations, and specifications of the switch tubes and diodes corresponding to the respective inverter switch units may be set to be the same;
The ac filter unit 300 includes at least three filter units, each corresponding to one single phase, each including a first filter inductance (e.g., LA1, LB1 or LC1 shown in fig. 1) and a filter capacitance (e.g., CA, CB or CC shown in fig. 1), one end of the first filter inductance is connected to an output terminal of a corresponding one of the inverter switch units, and the other end of the first filter inductance is connected to the filter capacitance to filter and output a modulated wave of three phases.
In an embodiment, the ac filter unit 300 is provided with four filter units in total, where one filter unit (for example, LN1, CN shown in fig. 1) corresponds to the bridge arm N and is connected to the inverter switch unit corresponding to the bridge arm N in the power unit 200, it should be noted that, in a practical application scenario, the number of filter units may be changed correspondingly according to the change of the number of bridge arms, and the basic operation principle of the filter units is the same no matter how many the number of filter units become, which is not limited herein.
In an embodiment, the filter unit may further include, but is not limited to, a second filter inductor (for example, LA2, LB2, LC2 or LN2 shown in fig. 1), where one end of the second filter inductor is connected to the first filter inductor and the filter capacitor, and the other end of the second filter inductor is connected to the output end of the three-level three-phase four-bridge arm inverter, where it can be seen that the setting of the second filter inductor may optimize the filtering output effect of the filter unit, so that the output three-phase modulated wave is more stable.
The three-level three-phase four-bridge arm inverter and the application scenario described in the embodiments of the present invention are for more clearly describing the technical solution of the embodiments of the present invention, and do not constitute a limitation to the technical solution provided in the embodiments of the present invention, and those skilled in the art can know that, with the evolution of the three-level three-phase four-bridge arm inverter and the appearance of a new application scenario, the technical solution provided in the embodiments of the present invention is also applicable to similar technical problems.
It will be appreciated by those skilled in the art that the three-level three-phase four-leg inverter shown in fig. 1 is not limiting of the embodiments of the present invention, and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
Based on the structure of the three-level three-phase four-bridge arm inverter, various embodiments of the midpoint potential balance control method are provided.
Fig. 2 is a flowchart of a neutral point potential balance control method according to an embodiment of the invention. As shown in fig. 2, the midpoint potential balance control method may be applied to, but is not limited to, the three-level three-phase four-leg inverter shown in fig. 1, including, but not limited to, steps S1000 to S5000.
Step S1000: in each control period, respectively obtaining a first real-time voltage Uup at two ends of a positive bus capacitor Cup, a second real-time voltage Udw at two ends of a negative bus capacitor Cdw, capacitor voltages at two ends of each filter capacitor and inductance currents flowing through each first filter inductor, wherein the sampling mode and the sampling period can be selected by a person skilled in the art according to specific scenes, and the sampling mode and the sampling period are not limited herein;
step S2000: calculating a voltage difference value between the first real-time voltage Uup and the second real-time voltage Udw, and calculating a product result of the capacitance voltage and the inductance current corresponding to each single phase;
Step S3000: determining a neutral point potential balance symbol according to the product results corresponding to the three phases respectively;
step S4000: determining neutral point potential balance zero sequence components of the three phases according to the voltage difference value, the neutral point potential balance symbol and preset neutral point potential balance parameters;
Step S5000: and correspondingly overlapping the neutral-point potential balance zero sequence components of the three phases to the three-phase modulation waves respectively.
In the step, the positive bus capacitor Cup, the negative bus capacitor Cdw, each filter capacitor and each first filter inductor are respectively sampled to calculate a voltage difference value and a midpoint potential balance symbol, then a midpoint potential balance zero sequence component can be determined according to the voltage difference value, the midpoint potential balance symbol and a preset midpoint potential balance parameter, and further the positive bus voltage balance and the negative bus voltage balance of the inverter can be realized under a complex load in a mode of superposing the midpoint potential balance zero sequence component on a modulation wave, so that risks and defects caused by unbalanced positive bus voltage and unbalanced positive bus voltage are reduced, and safe operation of the inverter is ensured.
It should be noted that, in the above embodiment, the calculated neutral point potential balance zero sequence component corresponds to a control period, that is, in different control periods, the calculated neutral point potential balance zero sequence component may be different, and the neutral point potential balance zero sequence component is dynamically superimposed on the modulated wave, because the embodiment can continuously calculate and superimpose, the neutral point potential can be always maintained at a relatively balanced level, which can further improve the safety and stability of the inverter; the number of the control periods may be multiple, and may be set accordingly according to an actual application scenario, for example, the corresponding control period may be set under 50Hz of the mains supply, and so on, which is not limited herein.
In an embodiment, before calculating the voltage difference between the first real-time voltage Uup and the second real-time voltage Udw, the first real-time voltage Uup and the second real-time voltage Udw may be, but are not limited to, low-pass filtered to eliminate high-frequency interference of the first real-time voltage Uup and the second real-time voltage Udw, so as to improve accuracy of subsequent calculation and reduce errors.
As shown in fig. 3, step S3000 may include, but is not limited to, step S3100, according to one embodiment of the present invention.
Step S3100: when the product result corresponding to one single phase is greater than or equal to zero, determining that the neutral point potential balance symbol is positive; or when the product result corresponding to one single phase is smaller than zero, determining that the neutral point potential balance sign is negative.
In the step, the corresponding midpoint potential balance sign can be correspondingly determined by judging the positive and negative signs of the achievement results corresponding to each single phase, so that the judgment is simple and convenient, and the results are reliable.
Specifically, the midpoint potential balance symbol is denoted as：；
Wherein,For each single phase (LA 1, LB1 or LC1 shown in figure 1) the corresponding inductor current,For each single phase (CA, CB or CC as shown in figure 1) the corresponding capacitor voltage,Representing three phasesThe phase of the liquid phase is selected,Representing three phasesThe phase of the liquid phase is selected,Representing three phasesAnd (3) phase (C).
It should be noted that, the product of the inductor current and the capacitor voltage is calculated here, mainly considering the influence of the small vector on the midpoint potential; regarding the small vector, taking two switching states of POO and ONN as an example, as can be seen from the level vector diagram distributions of fig. 4 (a), 4 (b), 5 (a) and 5 (b), the small vector POO and the small vector ONN may be equivalent to the same vector in the figure, and the contributions of the two small vectors to the inverter output are the same.
As shown in fig. 4 (a), when the current direction is positive, the current is divided by the direct current voltage-dividing capacitor under the action of the positive small vector POOThe loop formed will flow current into midpoint O,/>Reduction,/>Ascending; as shown in FIG. 4 (b), when the current direction is changed, a current is flown from the midpoint O by the positive small vector POO,/>Ascending,/>And (3) lowering. Similarly, as shown in FIG. 5 (a), when the current direction is positive, under the action of the negative small vector ONN, the current is divided by the DC voltage division capacitor/>The loop formed will draw current from the midpoint O,/>Reduction,/>Ascending; as shown in FIG. 5 (b), when the current direction is changed, a current is flown into the midpoint O by the negative small vector ONN,/>Ascending,/>And (3) lowering. That is, a current is generated in the midpoint of the small vector, which causes fluctuation of the midpoint potential, and changing the direction of the current adversely affects the voltage effect of the dc voltage dividing capacitor in the loop.
In practical engineering application, the mode of using SVPWM for SPWM+zero sequence injection is simplified, so that when the positive and negative bus voltage balance control is carried out, the bus voltage balance can be considered to be controlled by adopting the zero sequence injection mode. In the above analysis POO represents the modulation wave as positive and ONN represents the modulation wave as negative, both acting on the positive and negative buses in opposite directions. When the current direction is positive or negative, the effect of the small vector is also adversely affected, so this embodiment proposes: when the current direction is positive, the neutral point potential balance zero sequence component with positive sign is injected, and when the current direction is negative, the neutral point potential balance zero sequence component with negative sign is injected.
It should be noted that, the above only considers the influence of pure active current, when reactive current is generated, then there is a part of forward current and a part of reverse current in one modulation wave, at this time, in the related art, only the current direction is simply relied on to distinguish what direction of zero sequence component is injected, and the positive and negative of the product of capacitor voltage and inductor current proposed in this embodiment represent the direction of zero sequence component that should be injected, so that the problem that the judgment of the direction of zero sequence component in the scene of generating reactive current is unclear can be solved, and compared with the related art, the application scene of this embodiment is wider, and the application effect is better.
As shown in fig. 6, in an embodiment of the present invention, step S1000 may be preceded by a step S6000.
Step S6000: and superposing the preset first zero sequence component on the three-phase modulation wave to update the three-phase modulation wave.
In this step, for the three-phase modulated wave obtained by the inverter loop, in order to improve the bus voltage utilization rate, a mode of zero sequence injection saddle wave is adopted, and a preset first zero sequence component is superimposed on the three-phase modulated wave to update the three-phase modulated wave, so as to obtain a new three-phase modulated wave, where the first zero sequence component is:；
Wherein, Is thatThe phase-modulated wave is transmitted to the optical element,Is thatThe phase-modulated wave is transmitted to the optical element,Is thatPhase modulated waves.
Specifically, as shown in fig. 7, the hierarchical processing of the three-phase modulation wave is realized through the first superposition of the first zero-sequence component and the second superposition of the neutral-point potential balance zero-sequence component, so that the voltage balance of the positive bus and the negative bus of the inverter can be realized under the complex load, the risks and the defects caused by the unbalanced voltage of the positive bus and the negative bus are reduced, and the safe operation of the inverter is ensured.
As shown in fig. 8, step S4000 may include, but is not limited to, step S4100.
Step S4100: and calculating the product of the voltage difference value, the midpoint potential balance symbol and a preset midpoint potential balance parameter to obtain a three-phase midpoint potential balance zero sequence component.
In this step, since the midpoint potential balance symbol corresponding to each single phase is calculated, the three-phase midpoint potential balance zero sequence component, that is, the three-phase midpoint potential balance zero sequence component, can be recorded as：；
Wherein,In order to be a voltage difference value,，Is a neutral point potential balance parameter.
It can be seen that for the purpose of balancing the midpoint potential, that is, to makeSmall enough to approach zero, then it is necessary to makeThe larger the value, the faster the neutral-point potential balance speed, but the inverter system is also subject to a greater risk of instability, and thereforeThe actual selection of the values needs to be comprehensively considered according to actual conditions, for example, along with the increase of the number of the parallel machines,The upper limit of the value should be correspondingly reduced, and the final coefficient should be close to the utilization rate of the DC voltage to ensure that the modulation wave does not deviate too far in consideration of the adjustment of the balance bus of the modulation wave based on the zero sequence injection mode, so that the device can be provided；
Wherein,For the ac side rated voltage,Is the modulation ratio.
It is understood that in order to adjust the voltage balance of the positive and negative buses to increase the speed, the voltage balance of the positive and negative buses can be adjustedThe values increase by a modest amount, but should not be much greater than the parameters provided by the above embodiments; when in multi-parallel operation, the fluctuation of the middle point of the bus can influence the zero sequence circulation of the multi-parallel operation,The larger the value is, the faster the regulating speed of the neutral point potential of the bus is, the larger the zero sequence circulation is, the unstable inverter system is prone to be caused, and therefore, the proper amount of the inverter system should be reduced when the parallel operation is carried out in a plurality of modesValues to ensure inverter system stability.
Fig. 9 is a schematic structural diagram of an electronic device 1000 according to an embodiment of the present invention. As shown in fig. 9, the electronic device 1000 includes a memory 1100, a processor 1200. The number of the memories 1100 and the processors 1200 may be one or more, and one memory 1100 and one processor 1200 are exemplified in fig. 9; the memory 1100 and the processor 1200 in the device may be connected by a bus or otherwise, for example in fig. 9.
The memory 1100 is used as a computer readable storage medium for storing a software program, a computer executable program, and a module, such as program instructions/modules corresponding to the neutral point potential balance control method according to any one of the embodiments of the present invention. The processor 1200 implements the midpoint potential balance control method described above by running software programs, instructions, and modules stored in the memory 1100.
The memory 1100 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for functions. In addition, memory 1100 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some examples, memory 1100 may further include memory located remotely from processor 1200, which may be connected to the device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
An embodiment of the present invention also provides a computer-readable storage medium storing computer-executable instructions for performing the midpoint potential balance control method as provided in any embodiment of the present invention.
An embodiment of the present invention also provides a computer program product, including a computer program or computer instructions, where the computer program or computer instructions are stored in a computer readable storage medium, and a processor of the computer device reads the computer program or the computer instructions from the computer readable storage medium, and the processor executes the computer program or the computer instructions, so that the computer device performs the midpoint potential balance control method as provided in any embodiment of the present invention.
The electronic device and the application scenario described in the embodiments of the present invention are for more clearly describing the technical solution of the embodiments of the present invention, and do not constitute a limitation on the technical solution provided by the embodiments of the present invention, and those skilled in the art can know that, with the evolution of the electronic device and the appearance of a new application scenario, the technical solution provided by the embodiments of the present invention is applicable to similar technical problems.
Those of ordinary skill in the art will appreciate that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof.
In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
As used in this specification, the terms "component," "module," "system," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, an object, an executable, a thread of execution, a program, or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components may reside within a process or thread of execution and a component may be localized on one computer or distributed between 2 or more computers. Furthermore, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local or remote processes such as in accordance with a signal having one or more data packets (e.g., data from two components interacting with one another in a local system, distributed system, or across a network such as the internet with other systems by way of the signal).
Claims (7)
1. The neutral-point potential balance control method is characterized by being applied to a three-level three-phase four-leg inverter, wherein the three-level three-phase four-leg inverter comprises:
The direct-current input unit comprises a direct-current power supply, a positive bus capacitor and a negative bus capacitor, wherein the positive bus capacitor and the negative bus capacitor are connected in series to form a positive bus branch and a negative bus branch, and the positive bus branch and the negative bus branch are connected with the direct-current power supply in parallel;
the power unit comprises four inversion switch units, and each inversion switch unit is connected with the output end of the direct current input unit;
The alternating current filtering unit comprises at least three filter units, each filter unit corresponds to one single phase, each filter unit comprises a first filtering inductor and a filtering capacitor, one end of the first filtering inductor is connected with the output end of a corresponding inverting switch unit, and the other end of the first filtering inductor is connected with the filtering capacitor so as to filter and output three-phase modulated waves;
The method comprises the following steps:
In each control period, respectively acquiring a first real-time voltage at two ends of the positive bus capacitor, a second real-time voltage at two ends of the negative bus capacitor, capacitor voltages at two ends of each filter capacitor and inductance currents flowing through each first filter inductor;
Calculating a voltage difference value between the first real-time voltage and the second real-time voltage, and calculating a product result of the capacitor voltage and the inductor current corresponding to each single phase;
Determining a midpoint potential balance symbol according to the product results corresponding to the three phases respectively;
Determining neutral point potential balance zero sequence components of three phases according to the voltage difference value, the neutral point potential balance symbol and preset neutral point potential balance parameters;
Correspondingly superposing the neutral-point potential balance zero sequence components of the three phases onto the modulation waves of the three phases respectively;
Wherein the determining the midpoint potential balance symbol according to the product results corresponding to the three phases respectively comprises:
When the product result corresponding to one single phase is greater than or equal to zero, determining that the neutral point potential balance symbol is positive;
Or alternatively
When the product result corresponding to one single phase is smaller than zero, determining that the neutral point potential balance sign is negative;
The midpoint potential balance symbol is denoted sign (x):
Wherein I Lx is the inductor current corresponding to each single phase, V Cx is the capacitor voltage corresponding to each single phase, a represents a phase a of the three phases, B represents a phase B of the three phases, and C represents a phase C of the three phases;
the determining the neutral point potential balance zero sequence component of the three phases according to the voltage difference value, the neutral point potential balance symbol and the preset neutral point potential balance parameter comprises the following steps:
Calculating the product of the voltage difference value, the midpoint potential balance symbol and a preset midpoint potential balance parameter to obtain a three-phase midpoint potential balance zero sequence component;
The neutral potential balance zero sequence component of the three phases is marked as V ox:
V ox = sign (x) ·Δu·k, x = a or B or C;
wherein Deltau is the voltage difference and k is the neutral point potential balance parameter.
2. The midpoint potential balance control method according to claim 1, wherein:
k＝1/(Un*Kspwm)；
Wherein Un is the ac side rated voltage, kspwm is the modulation ratio.
3. The midpoint potential balance control method of claim 1, further comprising, prior to the calculating the voltage difference between the first real-time voltage and the second real-time voltage:
and respectively carrying out low-pass filtering processing on the first real-time voltage and the second real-time voltage so as to eliminate high-frequency interference of the first real-time voltage and the second real-time voltage.
4. The method of claim 1, wherein before the step of obtaining the first real-time voltages across the positive bus capacitor, the second real-time voltages across the negative bus capacitor, the capacitor voltages across the filter capacitors, and the inductor currents flowing through the first filter inductors, respectively, further comprises:
and superposing a preset first zero sequence component on the three-phase modulation wave so as to update the three-phase modulation wave.
5. The neutral point potential balance control method according to claim 4, wherein the first zero sequence component is:
Wherein u a is an a-phase modulated wave, u b is a B-phase modulated wave, and u c is a C-phase modulated wave.
6. An electronic device, comprising:
At least one processor;
at least one memory for storing at least one program;
The midpoint potential balance control method according to any one of claims 1 to 5 is realized when at least one of the programs is executed by at least one of the processors.
7. A computer-readable storage medium in which a processor-executable program is stored, the processor-executable program being for implementing the midpoint potential balance control method according to any one of claims 1 to 5 when executed by a processor.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203103983U (en) * | 2012-12-31 | 2013-07-31 | 山东大学 | Hybrid-clamping type three-level three-phase four-wire photovoltaic system based on 3D-SPWM |
| KR20170051943A (en) * | 2015-11-03 | 2017-05-12 | 주식회사 윌링스 | Switch control method and device of three-phase three-level inverter for elimination of the leakage current and dc side voltage balancing |
| CN111865126A (en) * | 2020-07-23 | 2020-10-30 | 珠海格力电器股份有限公司 | Neutral point potential balance control method, device, medium and motor of three-level inverter |
| CN111900889A (en) * | 2020-07-29 | 2020-11-06 | 上海岩芯电子科技有限公司 | Neutral point potential control method for direct-current bus of three-phase four-wire three-level inverter |
| WO2023066407A1 (en) * | 2022-05-26 | 2023-04-27 | 中车青岛四方车辆研究所有限公司 | Method and apparatus for controlling three-phase four-bridge-arm auxiliary converter |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002050989A1 (en) * | 2000-12-07 | 2002-06-27 | Kabushiki Kaisha Yaskawa Denki | Three-level neutral point clamping pwm inverter and neutral point voltage controller |
| CN109905048B (en) * | 2017-12-08 | 2021-01-26 | 台达电子企业管理（上海）有限公司 | Neutral point voltage balance control method for three-level circuit |
-
2024
- 2024-03-25 CN CN202410341041.0A patent/CN117937965B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203103983U (en) * | 2012-12-31 | 2013-07-31 | 山东大学 | Hybrid-clamping type three-level three-phase four-wire photovoltaic system based on 3D-SPWM |
| KR20170051943A (en) * | 2015-11-03 | 2017-05-12 | 주식회사 윌링스 | Switch control method and device of three-phase three-level inverter for elimination of the leakage current and dc side voltage balancing |
| CN111865126A (en) * | 2020-07-23 | 2020-10-30 | 珠海格力电器股份有限公司 | Neutral point potential balance control method, device, medium and motor of three-level inverter |
| CN111900889A (en) * | 2020-07-29 | 2020-11-06 | 上海岩芯电子科技有限公司 | Neutral point potential control method for direct-current bus of three-phase four-wire three-level inverter |
| WO2023066407A1 (en) * | 2022-05-26 | 2023-04-27 | 中车青岛四方车辆研究所有限公司 | Method and apparatus for controlling three-phase four-bridge-arm auxiliary converter |
Non-Patent Citations (2)
| Title |
|---|
| Mohammad Sharifzadeh et al..Hybrid SHM–SHE Modulation Technique for a Four-Leg NPC Inverter With DC Capacitor Self-Voltage Balancing.IEEE Transactions on Industrial Electronics.2015,第第62卷卷(第第02期期),第4890-4899页. * |
| 朱婷婷 等.一种三电平三相四桥臂逆变器中点电位平衡策略.电工技术学报.2012,第27卷(第06期),第77-82页. * |
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