CN117855266A - GaN-based HEMT device with low ohmic contact resistivity and preparation method thereof - Google Patents

GaN-based HEMT device with low ohmic contact resistivity and preparation method thereof Download PDF

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CN117855266A
CN117855266A CN202311724363.5A CN202311724363A CN117855266A CN 117855266 A CN117855266 A CN 117855266A CN 202311724363 A CN202311724363 A CN 202311724363A CN 117855266 A CN117855266 A CN 117855266A
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gan
layer
based hemt
heterojunction
undoped
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潘磊
卢双赞
柳俊
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Hubei Jiufengshan Laboratory
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Hubei Jiufengshan Laboratory
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention provides a GaN-based HEMT device with low ohmic contact resistivity and a preparation method thereof, wherein the GaN-based HEMT device comprises a substrate, a buffer layer, an undoped u-GaN layer, a heavily doped n+ GaN layer and a heterojunction; the buffer layer is arranged on the substrate; the undoped u-GaN layer is arranged on the buffer layer; the heavily doped n+ GaN layer is arranged on the undoped u-GaN layer, and a groove is formed in the middle of the heavily doped n+ GaN layer; the heterojunction is arranged in the groove, and the bottom of the heterojunction is contacted with the upper surface of the undoped u-GaN layer. The device is used for epitaxially growing an n+ GaN layer in advance, so that the Si doping concentration in the grown GaN has no correlation with the layout of the device and the design of a photomask, and the consistency of an epitaxial process is good; and a two-dimensional electron gas conducting channel is formed by introducing a GaN-based heterojunction through secondary epitaxy, and compared with the conventional heavily doped n+ GaN source drain secondary epitaxy technology, the heterogeneous interface atomic separation and diffusion caused by regrowth can be avoided, so that good two-dimensional electron gas transmission characteristics are maintained.

Description

GaN-based HEMT device with low ohmic contact resistivity and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a GaN-based HEMT device with low ohmic contact resistivity and a preparation method thereof.
Background
The high electron mobility transistor (High Electron Mobility Transistor, HEMT) has the advantages of high frequency, high voltage, high temperature and the like, and is a future development direction of solid-state microwave power devices and power electronic devices. The GaN-based HEMT has the advantages of large forbidden bandwidth, high breakdown field intensity, high saturated electron drift rate, good chemical stability and the like, and becomes a core device for realizing high-frequency, high-power and high-efficiency application scenes.
The key of the high-performance GaN HEMT device is to increase the saturation current density (I dmax ) And decreasing knee voltage (V) knee ) Both can be achieved by reducing the source-drain series resistance. The source-drain series resistor comprises a channel resistor and a source-drain ohmic contact resistor Rc, so that the channel resistor can be reduced through reasonable epitaxial structure and device structure design on one hand, and the source-drain ohmic contact resistor can be reduced on the other hand, and particularly under the condition of device size miniaturization, the source-drain ohmic contact becomes a key factor for determining device performance.
In recent years, the use of secondary epitaxy to grow an N-type heavily doped GaN layer in a source-drain ohmic contact region becomes an important technology for reducing the ohmic contact resistance of a GaN-based HEMT, and the technology utilizes heavily doped GaN to contact with metal, so that the formed metal-semiconductor contact barrier width is very narrow, large current is facilitated to be generated by electron tunneling, and extremely low ohmic contact resistance smaller than 0.1 ohm-mm can be realized even though an unannealed ohmic metal layer is adopted.
The N-type GaN secondary epitaxy can be realized by Molecular Beam Epitaxy (MBE) and Metal Organic Chemical Vapor Deposition (MOCVD) technologies, silicon or germanium is adopted as an N-type doping source, and in the GaN secondary epitaxy process, atomic separation and diffusion are easily caused by high-temperature growth, so that the polarization effect of the existing heterogeneous interface is weakened, and the characteristic degradation of two-dimensional electron gas (2 DEG) is caused. In addition, high doses of Si or Ge atoms incorporated can also cause distortion of the GaN lattice, leading to degradation of GaN crystal quality and surface morphology.
In summary, the existing HEMT device technology is difficult to achieve both low ohmic contact and good 2DEG characteristics and material surface morphology, and based on this, the invention provides a GaN-based HEMT device with low ohmic contact resistivity and a preparation method thereof.
Disclosure of Invention
Based on the above description, the invention provides a GaN-based HEMT device with low ohmic contact resistivity and a preparation method thereof, so that the prepared GaN-based HEMT device can be provided with low ohmic contact and good 2DEG characteristics.
The technical scheme for solving the technical problems is as follows:
in a first aspect, the present invention provides a GaN-based HEMT device having low ohmic contact resistivity, comprising: the semiconductor device comprises a substrate, a buffer layer, an undoped u-GaN layer, a heavily doped n+ GaN layer and a heterojunction;
the buffer layer is arranged on the substrate;
the undoped u-GaN layer is arranged on the buffer layer;
the heavily doped n+ GaN layer is arranged on the undoped u-GaN layer, and a groove is formed in the middle of the heavily doped n+ GaN layer;
the heterojunction is arranged in the groove, and the bottom of the heterojunction is in contact with the upper surface of the undoped u-GaN layer.
On the basis of the technical scheme, the invention can be improved as follows.
Further, the GaN-based HEMT device with low ohmic contact resistivity further comprises a source electrode and a drain electrode;
the source electrode and the drain electrode are arranged on the undoped u-GaN layer in an inter-spaced mode and are respectively located on two sides of the heterojunction.
Further, the GaN-based HEMT device with low ohmic contact resistivity further comprises a first isolation layer and a second isolation layer;
the first isolation layer and the second isolation layer are respectively arranged on two sides of the heavily doped n+ GaN layer in an ion implantation mode.
Further, the GaN-based HEMT device with low ohmic contact resistivity further comprises a gate;
the grid electrode is arranged on the upper surface of the heterojunction.
Further, the heterojunction comprises a channel layer, an insertion layer and a barrier layer;
the channel layer is arranged on the upper surface of the undoped u-GaN at the groove;
the insertion layer is arranged on the channel layer;
the barrier layer is disposed on the interposer layer.
Further, the channel layer is a GaN channel layer;
the insertion layer is an AlN insertion layer;
the barrier layer is AlGaN, inAlN, inAlGaN or an AlN barrier layer.
In a second aspect, the present invention further provides a method for manufacturing the GaN-based HEMT device with low ohmic contact resistivity according to the first aspect, including:
sequentially growing a buffer layer, an undoped u-GaN layer and a heavily doped n+ GaN layer on a substrate from bottom to top to obtain a GaN-based HEMT base material;
growing a layer of SiO on the surface of a GaN-based HEMT substrate material 2 The film is used as a mask layer;
carrying out dry etching on the mask layer and the heavily doped n+ GaN layer to form a patterned epitaxial wafer with a groove structure;
loading the patterned epitaxial wafer into an epitaxial growth cavity to grow a heterojunction;
and removing the mask layer to form a GaN-based HEMT epitaxial structure.
On the basis of the technical scheme, the invention can be improved as follows.
Further, after forming the GaN-based HEMT epitaxial structure, the method further comprises:
carrying out photoetching, ohmic metal evaporation and metal stripping on the GaN-based HEMT epitaxial structure in sequence to form a source electrode and a drain electrode;
and photoetching, ion implantation and photoresist removal processes are sequentially adopted, so that device isolation is formed among HEMT devices.
Further, after forming the device isolation, further comprising:
and forming a grid electrode on the heterojunction between the source electrode and the drain electrode by adopting photoetching, grid metal evaporation and metal stripping in sequence.
Further, the growth heterojunction specifically includes:
and sequentially growing a channel layer, an insertion layer and a barrier layer in the groove region of the patterned epitaxial wafer.
Compared with the prior art, the technical scheme of the application has the following beneficial technical effects:
the GaN-based HEMT device with low ohmic contact resistivity is characterized in that a substrate, a buffer layer, an undoped u-GaN layer, a heavily doped n+ GaN layer and a heterojunction are arranged; the buffer layer is arranged on the substrate; the undoped u-GaN layer is arranged on the buffer layer; the heavily doped n+ GaN layer is arranged on the undoped u-GaN layer, and a groove is formed in the middle of the heavily doped n+ GaN layer; the heterojunction is arranged in the groove, and the bottom of the heterojunction is contacted with the upper surface of the undoped u-GaN layer.
Compared with the prior art, the GaN-based HEMT device with low ohmic contact resistivity and the preparation method thereof provided by the invention have the following advantages:
1. the heavily doped GaN epitaxial thin layer is formed by adopting the pre-epitaxy, which is beneficial to obtaining high doping concentration and good surface morphology, thereby reducing ohmic contact resistance, improving the transmission characteristic and frequency characteristic of the device and reducing power loss.
2. And n+GaN is epitaxially grown in advance, so that the Si doping concentration in the grown GaN has no correlation with the layout of the device and the design of a photomask, and the consistency of an epitaxial process is good.
3. And a two-dimensional electron gas conducting channel is formed by introducing a GaN-based heterojunction through secondary epitaxy, and compared with the conventional heavily doped n+ GaN source drain secondary epitaxy technology, the heterogeneous interface atomic separation and diffusion caused by regrowth can be avoided, so that good two-dimensional electron gas transmission characteristics are maintained.
Drawings
Fig. 1 is a schematic structural diagram of a GaN-based HEMT device with low ohmic contact resistivity according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a manufacturing flow of a GaN-based HEMT device with low ohmic contact resistivity according to an embodiment of the present invention;
in the drawings, the list of components represented by the various numbers is as follows:
1. a substrate;
2. a buffer layer;
3. an undoped u-GaN layer;
4. heavily doping the n+ GaN layer;
5. a heterojunction; 51. a channel layer; 52. an interposer layer; 53. a barrier layer;
6. a source electrode;
7. a drain electrode;
8. a first isolation layer;
9. a second isolation layer;
10. and a gate.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Examples of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The invention provides a novel GaN-based HEMT device with low ohmic contact resistivity. Embodiments of the present invention will be described in further detail with reference to the accompanying drawings and examples, which are provided to illustrate the present invention, but are not intended to limit the scope of the present invention.
In a first aspect, as shown in fig. 1, an embodiment of the present invention provides a GaN-based HEMT device with low ohmic contact resistivity, including: the semiconductor device comprises a substrate 1, a buffer layer 2, an undoped u-GaN layer 3, a heavily doped n+ GaN layer 4 and a heterojunction 5; the buffer layer 2 is provided on the substrate 1.
An undoped u-GaN layer 3 is provided on the buffer layer 2.
The heavily doped n+ GaN layer 4 is arranged on the undoped u-GaN layer 3, and a groove is formed in the middle of the heavily doped n+ GaN layer 4.
The heterojunction 5 is disposed in the recess, and the bottom of the heterojunction 5 is in contact with the upper surface of the undoped u-GaN layer 3. The heterojunction 5 is a GaN-based heterojunction.
The GaN-based HEMT device with low ohmic contact resistivity further includes a source electrode 6 and a drain electrode 7.
The source electrode 6 and the drain electrode 7 are arranged on the undoped u-GaN layer 3 at intervals and are respectively positioned on two sides of the heterojunction 5.
In an alternative embodiment, the GaN-based HEMT device with low ohmic contact resistivity further comprises a first spacer layer 8 and a second spacer layer 9.
The first isolation layer 8 and the second isolation layer 9 are respectively arranged at two sides of the heavily doped n+ GaN layer 4 by adopting an ion implantation mode.
In an alternative embodiment, the GaN-based HEMT device with low ohmic contact resistivity further comprises a gate 10; the gate 10 is provided on the upper surface of the heterojunction 5.
Wherein the heterojunction 5 comprises a channel layer 51, an insertion layer 52 and a barrier layer 53.
Specifically, the channel layer 51 is provided on the upper surface of undoped u-GaN at the recess; the insertion layer 52 is provided on the channel layer 51; the barrier layer 53 is provided on the interposer 52.
In a specific example, the channel layer 51 is a GaN channel layer 51.
The insertion layer 52 is an AlN insertion layer 52.
The barrier layer 53 is AlGaN, inAlN, inAlGaN or an AlN barrier layer 53. The specific choice of the barrier layer 53 may be selected according to actual needs, and is not particularly limited here.
In a second aspect, an embodiment of the present invention further provides a method for manufacturing a GaN-based HEMT device with low ohmic contact resistivity, as shown in fig. 2, where the method operates as follows:
step S1: and sequentially growing a buffer layer, an undoped u-GaN layer and a heavily doped n+ GaN layer on the substrate from bottom to top to obtain the GaN-based HEMT base material.
In some specific examples, the thickness of the N-type heavily doped n+ GaN layer is 50-500 nm, and the doping concentration of the N-type element is 1e 19-5 e20 cm -3 。
Step S2: growing a SiO layer on the surface of the GaN-based HEMT substrate material by adopting PECVD equipment 2 The film acts as a mask layer. Wherein SiO is 2 The thickness of the mask layer is 100～500nm。
Step S3: after pretreatment, gluing, exposure and development, the method comprises the steps of 2 And carrying out dry etching on the mask layer and the heavily doped n+ GaN layer to form the patterned epitaxial wafer with the groove structure.
Step S4: and photoresist removal and surface pretreatment are carried out on the patterned epitaxial wafer so as to remove impurities and moisture on the surface of the epitaxial wafer.
Step S5: loading the patterned epitaxial wafer into an epitaxial growth cavity, growing a heterojunction, and specifically, sequentially growing a GaN channel layer, an AlN insertion layer and an AlGaN (or InAlN or InAlGaN or AlN) barrier layer, namely, growing a GaN-based heterostructure in the groove in a secondary epitaxial manner.
Wherein the GaN channel layer has a thickness of 10-50 nm, the AlN insert layer has a thickness of 0-1 nm, and the AlGaN barrier layer has a thickness of 15-30 nm.
Step S6: wet etching to remove SiO 2 And a mask layer for forming a GaN-based HEMT epitaxial structure.
Step S7: and manufacturing a source-drain ohmic electrode: and carrying out photoetching, ohmic metal evaporation and metal stripping processes on the GaN-based HEMT epitaxial structure to form source/drain region ohmic contact electrodes.
Step S8: device isolation: and performing photoetching, ion implantation and photoresist removal processes to realize mutual isolation of devices and manufacturing a first isolation layer and a second isolation layer.
Step S9: manufacturing a grid electrode: and forming a gate metal electrode between the source electrode and the drain electrode by adopting photoetching, gate metal evaporation and metal stripping process technologies, so as to finish the manufacture of the whole GaN-based HEMT device with low ohmic contact resistance.
In summary, compared with the prior art, the GaN-based HEMT device with low ohmic contact resistivity and the preparation method thereof provided by the embodiment of the invention have the following advantages:
1. the heavily doped GaN epitaxial thin layer is formed by adopting the pre-epitaxy, which is beneficial to obtaining high doping concentration and good surface morphology, thereby reducing ohmic contact resistance, improving the transmission characteristic and frequency characteristic of the device and reducing power loss.
2. And n+GaN is epitaxially grown in advance, so that the Si doping concentration in the grown GaN has no correlation with the layout of the device and the design of a photomask, and the consistency of an epitaxial process is good.
3. And a two-dimensional electron gas conducting channel is formed by introducing a GaN-based heterojunction through secondary epitaxy, and compared with the conventional heavily doped n+ GaN source drain secondary epitaxy technology, the heterogeneous interface atomic separation and diffusion caused by regrowth can be avoided, so that good two-dimensional electron gas transmission characteristics are maintained.
In the description of the present specification, reference to the term "a particular example" or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the embodiments of the invention. In this specification, particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. A GaN-based HEMT device having a low ohmic contact resistivity, comprising: the semiconductor device comprises a substrate, a buffer layer, an undoped u-GaN layer, a heavily doped n+ GaN layer and a heterojunction;
the buffer layer is arranged on the substrate;
the undoped u-GaN layer is arranged on the buffer layer;
the heavily doped n+ GaN layer is arranged on the undoped u-GaN layer, and a groove is formed in the middle of the heavily doped n+ GaN layer;
the heterojunction is arranged in the groove, and the bottom of the heterojunction is in contact with the upper surface of the undoped u-GaN layer.
2. The GaN based HEMT device of claim 1, wherein said GaN based HEMT device with low ohmic contact resistivity further comprises a source and a drain;
the source electrode and the drain electrode are arranged on the undoped u-GaN layer in an inter-spaced mode and are respectively located on two sides of the heterojunction.
3. The GaN based HEMT device of claim 1, wherein the GaN based HEMT device of low ohmic contact resistivity further comprises a first spacer layer and a second spacer layer;
the first isolation layer and the second isolation layer are respectively arranged on two sides of the heavily doped n+ GaN layer in an ion implantation mode.
4. The GaN based HEMT device of claim 1, wherein said GaN based HEMT device with low ohmic contact resistivity further comprises a gate;
the grid electrode is arranged on the upper surface of the heterojunction.
5. The GaN-based HEMT device of claim 1, wherein the heterojunction comprises a channel layer, an insertion layer, and a barrier layer;
the channel layer is arranged on the upper surface of the undoped u-GaN at the groove;
the insertion layer is arranged on the channel layer;
the barrier layer is disposed on the interposer layer.
6. The GaN-based HEMT device of claim 5, wherein said channel layer is a GaN channel layer;
the insertion layer is an AlN insertion layer;
the barrier layer is AlGaN, inAlN, inAlGaN or an AlN barrier layer.
7. A method of manufacturing a GaN-based HEMT device having low ohmic contact resistivity according to any one of claims 1-6, comprising:
sequentially growing a buffer layer, an undoped u-GaN layer and a heavily doped n+ GaN layer on a substrate from bottom to top to obtain a GaN-based HEMT base material;
growing a layer of SiO on the surface of a GaN-based HEMT substrate material 2 The film is used as a mask layer;
carrying out dry etching on the mask layer and the heavily doped n+ GaN layer to form a patterned epitaxial wafer with a groove structure;
loading the patterned epitaxial wafer into an epitaxial growth cavity to grow a heterojunction;
and removing the mask layer to form a GaN-based HEMT epitaxial structure.
8. The method of manufacturing according to claim 7, further comprising, after forming the GaN-based HEMT epitaxial structure:
carrying out photoetching, ohmic metal evaporation and metal stripping on the GaN-based HEMT epitaxial structure in sequence to form a source electrode and a drain electrode;
and photoetching, ion implantation and photoresist removal processes are sequentially adopted, so that device isolation is formed among HEMT devices.
9. The method of manufacturing of claim 8, further comprising, after forming the device isolation:
and forming a grid electrode on the heterojunction between the source electrode and the drain electrode by adopting photoetching, grid metal evaporation and metal stripping in sequence.
10. The method of claim 7, wherein the growing heterojunction comprises:
and sequentially growing a channel layer, an insertion layer and a barrier layer in the groove region of the patterned epitaxial wafer.
CN202311724363.5A 2023-12-14 2023-12-14 GaN-based HEMT device with low ohmic contact resistivity and preparation method thereof Pending CN117855266A (en)

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